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31. 发明授权

US08786343B2 Method, apparatus and system for sensing a signal with automatic adjustments for changing signal levels 有权
标题翻译：用于检测信号的方法，装置和系统，其具有用于改变信号电平的自动调整
公开(公告)号：US08786343B2
公开(公告)日：2014-07-22
申请号：US13510202
申请日：2010-11-17
申请人： Derek H. Geer , Timothy John Smelter , John Gordon Thomas
发明人： Derek H. Geer , Timothy John Smelter , John Gordon Thomas
IPC分类号： H03K5/02 , H03K7/02
CPC分类号： H03K5/02 , H03K3/013 , H03K5/082
摘要： The present specification provides a method, apparatus and system for sensing a signal with automatic adjustments for changing signal levels. A novel fractional peak discriminator circuit is provided which can be incorporated into a system for measuring periodic signals from moving elements. The circuit can be used regardless of whether the periodic signals are detected using optics, magnetic detector or other methods.
摘要翻译：本说明书提供用于感测具有用于改变信号电平的自动调整的信号的方法，装置和系统。提供了一种新颖的分数峰鉴别器电路，其可以并入用于测量来自移动元件的周期信号的系统中。无论使用光学，磁检测器或其他方法检测到周期信号，都可以使用该电路。

32. 发明授权

US08766674B1 Current-mode buffer with output swing detector for high frequency clock interconnect 有权
标题翻译：具有输出摆幅检测器的电流模式缓冲器，用于高频时钟互连
公开(公告)号：US08766674B1
公开(公告)日：2014-07-01
申请号：US13834861
申请日：2013-03-15
申请人： QUALCOMM Incorporated
发明人： Dongmin Park , Li Liu , Sujiang Rong
IPC分类号： H03K3/00 , H03K7/02 , H03K5/02 , H03K17/16
CPC分类号： H03K5/08 , H03K6/02
摘要： A high-speed current-mode clock driver includes feedback circuitry to maintain the voltage swing of a biasing node within a defined range. The current-mode clock driver includes a PMOS and an NMOS transistor receiving an oscillating signal at their gate terminals. The drain terminals of the PMOS and NMOS transistors are respectively coupled to input terminals of first and second variable conductivity circuits whose output terminals are coupled to a common node. A control circuit increases the conductivities of the first and second variable conductivity circuits in response to decreases in voltage swing of the common node, and decreases the conductivities of the first and second variable conductivity circuits in response to increases in voltage swing of the common node. The first and second variable conductivity circuits are optionally PMOS and NMOS transistors respectively.
摘要翻译：高速电流模式时钟驱动器包括反馈电路，以将偏置节点的电压摆幅保持在限定的范围内。电流模式时钟驱动器包括在其栅极端子处接收振荡信号的PMOS和NMOS晶体管。 PMOS和NMOS晶体管的漏极端子分别耦合到输出端耦合到公共节点的第一和第二可变电导率电路的输入端。控制电路响应于公共节点的电压摆幅的减小而增加第一和第二可变电导率电路的电导率，并且响应于公共节点的电压摆幅的增加而降低第一和第二可变电导率电路的电导率。第一和第二可变电导率电路分别是PMOS和NMOS晶体管。

33. 发明申请

US20140002171A1 BODY-CONTACTED PARTIALLY DEPLETED SILICON ON INSULATOR TRANSISTOR 有权
标题翻译：在绝缘体晶体管上接触部分接触的硅
公开(公告)号：US20140002171A1
公开(公告)日：2014-01-02
申请号：US13535203
申请日：2012-06-27
申请人： George Nohra
发明人： George Nohra
IPC分类号： H01L27/12 , H03K5/02
CPC分类号： H03K17/687 , H03K2017/6875 , H03K2217/0018
摘要： Embodiments include an apparatus, system, and method related to a body-contacted partially depleted silicon on insulator (PDSOI) transistor that may be used in a switch circuit. In some embodiments, the switch circuit may include a discharge transistor to provide a discharge path for a body of a switch transistor. Other embodiments may be described and claimed.
摘要翻译：实施例包括与身体接触的部分耗尽的绝缘体上硅（PDSOI）晶体管相关的装置，系统和方法，其可以用在开关电路中。在一些实施例中，开关电路可以包括放电晶体管，以为开关晶体管的主体提供放电路径。可以描述和要求保护其他实施例。

34. 发明申请

US20130051090A1 CURRENT REFERENCE GENERATING CIRCUIT AND A CONSTANT CURRENT SWITCH MODE POWER SUPPLY CONTROL CIRCUIT AND METHOD THEREOF 有权
标题翻译：电流参考产生电路和恒流开关模式电源控制电路及其方法
公开(公告)号：US20130051090A1
公开(公告)日：2013-02-28
申请号：US13662231
申请日：2012-10-26
申请人： HANGZHOU SILAN MICROELECTRONICS CO., L
发明人： Xiaogao XIE , Jianxing WU
IPC分类号： H02M3/335 , H03K5/02
CPC分类号： H02M1/4258 , H05B33/0815 , Y02B70/126
摘要： A current reference generating circuit including a first multiplier module, configured to receive a rectified voltage waveform signal of a switch mode power supply and an output signal generated by an average current loop, and to generate a sinusoidal half-wave signal having the same frequency and phase as the rectified voltage waveform signal, the sinusoidal half-wave signal varies with the output signal generated by the average current loop. A second multiplier module, configured to receive the sinusoidal half-wave signal and a control signal to generate a pulse signal. An average current loop for comparing the average of the pulse signal to a predetermined average current loop reference signal. The circuit can generate a self-adapted reference signal that follows the primary-side current signal of main circuit of the switch mode power supply, which is then supplied to the constant current switch mode power supply control circuit with high power factor.
摘要翻译：一种电流参考发生电路，包括第一乘法器模块，用于接收开关模式电源的整流电压波形信号和由平均电流回路产生的输出信号，并产生具有相同频率的正弦半波信号，以及相位作为整流电压波形信号，正弦半波信号随平均电流环路产生的输出信号而变化。第二乘法器模块，被配置为接收正弦半波信号和控制信号以产生脉冲信号。平均电流回路，用于将脉冲信号的平均值与预定的平均电流回路参考信号进行比较。该电路可以产生跟随开关模式电源的主电路的初级侧电流信号的自适应参考信号，然后将其提供给具有高功率因数的恒流开关模式电源控制电路。

35. 发明授权

US07809085B2 Data recovery system for source synchronous data channels 有权
标题翻译：源同步数据通道数据恢复系统
公开(公告)号：US07809085B2
公开(公告)日：2010-10-05
申请号：US11623069
申请日：2007-01-13
申请人： Judith Ann Rea , Aidan Gerard Keady , John Anthony Keane , John Martin Horan
发明人： Judith Ann Rea , Aidan Gerard Keady , John Anthony Keane , John Martin Horan
IPC分类号： H03K9/00 , H04L27/00 , H03K5/01 , H03K5/02 , H03K7/02 , H03H11/26
CPC分类号： H04L25/03885 , H03F3/505 , H03F2203/5015 , H03H11/265 , H03K19/01721 , H03K19/018521 , H04L25/068
摘要： A high-definition multimedia interface (HDMI) receiver recovers high speed encoded data which are transmitted differentially over data channels of a lossy cable, along with a clock. Inter symbol interference, high-frequency loss, skew between the clock and data channels, and differential skew within a differential signal are compensated by analog circuits which are automatically tuned for best performance by observing the quality of the recovered analog signal. Oversampling is used to provide a 24-bit digital representation of the analog signal for determining the quality of the signal.
摘要翻译：高分辨率多媒体接口（HDMI）接收机可以恢复通过有线电缆的数据通道差分传输的高速编码数据以及时钟。差分信号之间的符号间干扰，高频损耗，时钟和数据通道之间的偏移以及差分偏移由模拟电路补偿，模拟电路通过观察恢复的模拟信号的质量自动调整以获得最佳性能。过采样用于提供用于确定信号质量的模拟信号的24位数字表示。

36. 发明申请

US20080106314A1 Programmable high-speed cable with boost device 有权
标题翻译：带升压装置的可编程高速电缆
公开(公告)号：US20080106314A1
公开(公告)日：2008-05-08
申请号：US11826716
申请日：2007-07-18
申请人： Aidan Gerard Keady , John Anthony Keane , Judith Ann Rea , Benjamin Griffin , John Martin Horan
发明人： Aidan Gerard Keady , John Anthony Keane , Judith Ann Rea , Benjamin Griffin , John Martin Horan
IPC分类号： H03K5/02
CPC分类号： H04L25/02 , H04L25/03885 , H04L25/242
摘要： An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves.
摘要翻译： HDMI电缆传送高速编码数据，这些数据通过数据通道与时钟差分传输。差分信号中的高频损耗和差分偏移可能由嵌入电缆的模拟电路补偿。这些嵌入式电路通过观察恢复的模拟信号的质量在生产过程中进行最佳性能调整。嵌入式电路由电源组合供电，两者都在电缆内承载，并从高速信号本身采集。

37. 发明申请

US20080106313A1 High-speed cable with embedded power control 有权
标题翻译：高速电缆带嵌入式电源控制
公开(公告)号：US20080106313A1
公开(公告)日：2008-05-08
申请号：US11826713
申请日：2007-07-18
申请人： Aidan Gerald Keady , John Anthony Keane , Judith Ann Rea , Benjamin Griffin , John Martin Horan
发明人： Aidan Gerald Keady , John Anthony Keane , Judith Ann Rea , Benjamin Griffin , John Martin Horan
IPC分类号： H03K5/02
CPC分类号： H04L25/02 , H04L25/03885 , H04L25/242
摘要： An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves.
摘要翻译： HDMI电缆传送高速编码数据，这些数据通过数据通道与时钟差分传输。差分信号中的高频损耗和差分偏移可能由嵌入电缆的模拟电路补偿。这些嵌入式电路通过观察恢复的模拟信号的质量在生产过程中进行最佳性能调整。嵌入式电路由电源组合供电，两者都在电缆内承载，并从高速信号本身采集。

38. 发明申请

US20080106312A1 Programmable high-speed cable with printed circuit board and boost device 有权
标题翻译：可编程高速电缆，带印刷电路板和升压装置
公开(公告)号：US20080106312A1
公开(公告)日：2008-05-08
申请号：US11826710
申请日：2007-07-18
申请人： Aidan Gerald Keady , John Anthony Keane , Judith Ann Rea , Benjamin Griffin , John Martin Horan
发明人： Aidan Gerald Keady , John Anthony Keane , Judith Ann Rea , Benjamin Griffin , John Martin Horan
IPC分类号： H03K5/02 , H03K5/05
CPC分类号： H04L25/02 , H04L25/03885 , H04L25/242
摘要： An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves.
摘要翻译： HDMI电缆传送高速编码数据，这些数据通过数据通道与时钟差分传输。差分信号中的高频损耗和差分偏移可能由嵌入电缆的模拟电路补偿。这些嵌入式电路通过观察恢复的模拟信号的质量在生产过程中进行最佳性能调整。嵌入式电路由电源组合供电，两者都在电缆内承载，并从高速信号本身采集。

39. 发明申请

US20050245993A1 Systems and methods for providing amplitude selection for pulse generation 审中-公开
标题翻译：用于提供脉冲生成的幅度选择的系统和方法
公开(公告)号：US20050245993A1
公开(公告)日：2005-11-03
申请号：US11105186
申请日：2005-04-12
申请人： Anthony Varrichio , Benjamin Tranchina
发明人： Anthony Varrichio , Benjamin Tranchina
IPC分类号： A61N1/08 , A61N1/36 , A61N1/378 , H03K5/02
CPC分类号： A61N1/36125 , A61N1/36146 , A61N1/3782
摘要： According to embodiments, amplitude for a stimulation pulse delivered to electrodes implanted within a patient is controlled by a scale circuit and a digital-to-analog converter. The scale circuit selects one of a plurality of overlapping, different sized stimulation pulse amplitude ranges while the digital-to-analog converter selects an amplitude within the selected range. Stimulation pulse amplitude adjustment resolution scales automatically with the selected range, and a lowest range including the desired amplitude is automatically selected.
摘要翻译：根据实施例，输送到患者内植入的电极的刺激脉冲的幅度由缩放电路和数模转换器控制。缩放电路选择多个重叠的不同大小的刺激脉冲幅度范围中的一个，同时数模转换器选择所选范围内的振幅。刺激脉冲幅度调整分辨率自动选择范围，并自动选择包括所需幅度的最低范围。

40. 发明申请

US20050134325A1 Shift register and driving method thereof 失效
标题翻译：移位寄存器及其驱动方法
公开(公告)号：US20050134325A1
公开(公告)日：2005-06-23
申请号：US11057172
申请日：2005-02-15
申请人： Mitsuaki Osame , Aya Anzai
发明人： Mitsuaki Osame , Aya Anzai
IPC分类号： G11C19/00 , G11C19/18 , H03K5/003 , H03K5/02 , H03K5/08 , H03K5/24 , H03K5/22
CPC分类号： H03K5/249 , G11C19/00 , G11C19/184 , H03K5/003 , H03K5/02 , H03K5/082
摘要： A low power consumption shift register which inputs a CK signal with a low voltage with almost no effect of variation in characteristics of transistors. In the invention, an input portion of an inverter is set at a threshold voltage thereof and a CK signal is inputted to the input portion of the inverter through a capacitor means. In this manner, the CK signal is amplified, which is sent to the shift register. That is, by obtaining the threshold potential of the inverter, the shift register which operates with almost no effect of variation in characteristics of transistors can be provided. A level shifter of the CK signal is generated from an output pulse of the shift register, therefore, the low power consumption shift register having the level shifter which flows a shoot-through current for a short period can be provided
摘要翻译：低功耗移位寄存器，其输入具有低电压的CK信号，几乎不影响晶体管的特性变化。在本发明中，将逆变器的输入部设定为阈值电压，通过电容器装置将CK信号输入到逆变器的输入部。以这种方式，CK信号被放大，发送到移位寄存器。也就是说，通过获得反相器的阈值电位，可以提供几乎不影响晶体管特性变化的移位寄存器。从移位寄存器的输出脉冲产生CK信号的电平移位器，因此可以提供具有短时间流过直通电流的电平移位器的低功耗移位寄存器

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