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41. 发明授权

US10712659B2 Method for forming a carbon nanotube pellicle membrane 有权
公开(公告)号：US10712659B2
公开(公告)日：2020-07-14
申请号：US15979800
申请日：2018-05-15
申请人： IMEC VZW , Imec USA Nanoelectronics Design Center
发明人： Emily Gallagher , Cedric Huyghebaert , Ivan Pollentier , Hanns Christoph Adelmann , Marina Timmermans , Jae Uk Lee
IPC分类号： G03F1/22 , G03F1/62 , G03F1/64 , C01B32/159 , B82Y30/00 , B82Y40/00
摘要： The present disclosure relates to a method for forming a carbon nanotube pellicle membrane for an extreme ultraviolet lithography reticle, the method comprising: bonding together overlapping carbon nanotubes of at least one carbon nanotube film by pressing the at least one carbon nanotube film between a first pressing surface and a second pressing surface, thereby forming a free-standing carbon nanotube pellicle membrane. The present disclosure also relates to a method for forming a pellicle for extreme ultraviolet lithography and for forming a reticle system for extreme ultraviolet lithography respectively.

42. 发明授权

US10684779B2 Memory access unit for providing access to an item from an arbitrary location in physical memory 有权
公开(公告)号：US10684779B2
公开(公告)日：2020-06-16
申请号：US15349307
申请日：2016-11-11
申请人： IMEC VZW , Stichting IMEC Nederland
发明人： Victor Van Acht , George Tsouhlarakis , Mario Konijnenburg , Arjan Breeschoten
IPC分类号： G06F3/06 , G06F13/16 , G06F12/123 , G06F12/0802 , G06F12/122 , G06F12/128 , G06F13/40
摘要： The disclosure relates to a memory access unit. One example embodiment is a memory access unit, for providing read-access to read an item from an arbitrary location in a physical memory, independently of addressable locations of the physical memory. The item includes a first number of bits and each addressable location of the physical memory includes a second number of bits. The second number of bits is different from the first number of bits. The memory access unit includes an address input, an address interpreter, an address output, a memory output, a data formatter, and a data output.

43. 发明授权

US10592430B2 Memory structure comprising scratchpad memory 有权
公开(公告)号：US10592430B2
公开(公告)日：2020-03-17
申请号：US15726749
申请日：2017-10-06
申请人： IMEC VZW , Stichting IMEC Nederland , UNIVERSIDAD COMPLUTENSE DE MADRID
发明人： Francky Catthoor , Matthias Hartmann , Jose Ignacio Gomez , Christian Tenllado , Sotiris Xydis , Javier Setoain Rodrigo , Thomas Papastergiou , Christos Baloukas , Anup Kumar Das , Dimitrios Soudris
IPC分类号： G06F12/00 , G06F12/1045 , G06F12/0897 , G06F12/1009 , G06F12/0811 , G06F12/122 , G06F12/128 , G06F12/0864 , G06F12/08 , G06F12/02
摘要： The present disclosure relates to a memory hierarchy for a system-in-package. An example memory hierarchy is connectable to a processor via a memory management unit arranged for translating a virtual address sent by the processor into a physical address. The memory hierarchy has a data cache memory and a memory structure having at least a L1 memory array comprising at least one cluster. The memory structure comprises a first data access controller arranged for managing one or more banks of scratchpad memory of at least one of the clusters of at least the L1 memory array, comprising a data port for receiving at least one physical address and arranged for checking at run-time, for each received physical address, bits of the physical address to see if the physical address is present in the one or more banks of the at least one cluster of at least the L1 memory array.

44. 发明授权

US10376175B2 Sensor, system, and holder arrangement for biosignal activity measurement 有权
公开(公告)号：US10376175B2
公开(公告)日：2019-08-13
申请号：US15382381
申请日：2016-12-16
申请人： IMEC VZW , Stichting IMEC Nederland
发明人： Srinjoy Mitra , Bernard Grundlehner
IPC分类号： A61B5/0478 , A61B5/00
摘要： The disclosure relates to a sensor, a system, and a holder arrangement for biosignal activity measurement. One example embodiment includes a sensor module for brain activity measurement. The sensor module includes a main electrode base. The sensor module also includes a plurality of pins protruding from the main electrode base. The plurality of pins is arranged such that, when applied on a subject, the pins make contact with skin of the subject or are in close proximity with the skin of the subject. The main electrode base comprises electronic circuitry for near infrared spectroscopy (NIRS) measurements and electronic circuitry for electroencephalography (EEG) measurements, both connected to the plurality of pins. The plurality of pins includes electrically conductive pins. The plurality of pins also includes at least one source waveguide pin configured for light emitting purposes or at least one detector waveguide pin configured for light detection purposes.

45. 发明申请

US20180329290A1 Lithographic Reticle System 审中-公开
公开(公告)号：US20180329290A1
公开(公告)日：2018-11-15
申请号：US15979813
申请日：2018-05-15
申请人： IMEC VZW , Imec USA Nanoelectronics Design Center
发明人： Rik Jonckheere , Cedric Huyghebaert , Emily Gallagher
IPC分类号： G03F1/64 , G03F7/20
CPC分类号： G03F1/64 , G03F1/62 , G03F7/70825 , G03F7/70975 , G03F7/70983
摘要： The present disclosure provides a lithographic reticle system comprising a reticle, a first pellicle membrane mounted in front of the reticle, and a second pellicle membrane mounted in front of the first pellicle membrane, wherein the first pellicle membrane is arranged between the reticle and the second pellicle membrane, and wherein the second pellicle membrane is releasably mounted in relation to the first pellicle membrane and the reticle.

46. 发明申请

US20170322516A1 Autofocus System and Method in Digital Holography 审中-公开
公开(公告)号：US20170322516A1
公开(公告)日：2017-11-09
申请号：US15528202
申请日：2015-11-30
申请人： IMEC TAIWAN CO. , IMEC VZW
发明人： Ching-Chun Hsiao , Ting-Ting Chang , Chao-Kang Liao
IPC分类号： G03H1/08 , G06T7/11 , G06T7/13 , G06T7/136 , G03H1/04 , G06T7/187
CPC分类号： G03H1/0866 , G03H1/0443 , G03H2001/0447 , G03H2001/0883 , G06T7/11 , G06T7/13 , G06T7/136 , G06T7/187
摘要： At least one embodiment relates to an autofocus method for determining a focal plane for at least one object. The method includes reconstructing a holographic image of the at least one object such as to provide a reconstructed image at a plurality of different focal depths. The reconstructed image includes a real component and an imaginary component. The method also include performing a first edge detection on the real component for at least two depths of the plurality of different focal depths and a second edge detection on the imaginary component for the at least two depths. Further, the method includes obtaining a first measure of clarity for each of the at least two depths based on a first measure of statistical dispersion with respect to the first edge detection and a second measure of clarity.

47. 发明申请

US20170147210A1 Memory Access Unit 审中-公开
公开(公告)号：US20170147210A1
公开(公告)日：2017-05-25
申请号：US15349307
申请日：2016-11-11
申请人： IMEC VZW , Stichting IMEC Nederland
发明人： Victor Van Acht , George Tsouhlarakis , Mario Konijnenburg , Arjan Breeschoten
IPC分类号： G06F3/06 , G06F13/40 , G06F12/128 , G06F12/0802 , G06F12/122
CPC分类号： G06F3/061 , G06F3/0659 , G06F3/0685 , G06F12/0802 , G06F12/122 , G06F12/123 , G06F12/128 , G06F13/16 , G06F13/4018 , G06F2212/1016 , G06F2212/60
摘要： The disclosure relates to a memory access unit. One example embodiment is a memory access unit, for providing read-access to read an item from an arbitrary location in a physical memory, independently of addressable locations of the physical memory. The item includes a first number of bits and each addressable location of the physical memory includes a second number of bits. The second number of bits is different from the first number of bits. The memory access unit includes an address input, an address interpreter, an address output, a memory output, a data formatter, and a data output.

48. 发明申请

US20130024737A1 TEST ACCESS ARCHITECTURE FOR TSV-BASED 3D STACKED ICS 有权
标题翻译：用于基于TSV的3D堆叠ICS的测试访问架构
公开(公告)号：US20130024737A1
公开(公告)日：2013-01-24
申请号：US13626538
申请日：2012-09-25
申请人： IMEC , Stichting IMEC Nederland
发明人： Erik Jan Marinissen , Jacobus Verbree , Mario Konijnenburg , Chun-Chuan Chi
IPC分类号： G01R31/3177
CPC分类号： G01R31/318508 , G01R31/31717 , G01R31/3177 , G01R31/318511 , G01R31/318513 , G01R31/318572
摘要： A test access architecture is disclosed for 3D-SICs that allows for both pre-bond die testing and post-bond stack testing. The test access architecture is based on a modular test approach, in which the various dies, their embedded IP cores, the inter-die TSV-based interconnects, and the external I/Os can be tested as separate units to allow optimization of the 3D-SIC test flow. The architecture builds on and reuses existing design for test (DfT) hardware at the core, die, and product level. Test access is provided to an individual die stack via a test structure called a wrapper unit.
摘要翻译：公开了用于3D-SIC的测试访问架构，其允许预键合芯片测试和后绑定堆叠测试。测试访问架构基于模块化测试方法，其中各种模具，其嵌入式IP内核，基于芯片间TSV的互连和外部I / O可以作为单独的单元进行测试，从而优化3D -SIC测试流程。该架构建立并重用现有的核心，管芯和产品级测试（DfT）硬件设计。通过称为包装单元的测试结构将测试访问提供给单个管芯堆叠。

49. 发明申请

US20080111639A1 Device and method for generating a signal with predefined transcient at start-up 有权
标题翻译：用于在启动时用预定义的过程生成信号的装置和方法
公开(公告)号：US20080111639A1
公开(公告)日：2008-05-15
申请号：US11976776
申请日：2007-10-29
申请人： Julien Ryckaert , Jan Craninckx
发明人： Julien Ryckaert , Jan Craninckx
IPC分类号： H03K3/03 , H04B7/00
CPC分类号： H03K3/0322
摘要： A device and a method are presented for generating an intermitted oscillating signal comprising a plurality of oscillating portions separated from each other in time. The device and method are suited for communication systems, in particular for Ultra-Wide Bandwidth (UWB) applications. The device comprises a variable oscillator for generating the oscillating portions; switching circuitry for switching on/switching off the variable oscillator at the beginning/end of each oscillating portion; and circuitry for setting initial conditions in the variable oscillator to impose a predefined transient and a characterizing frequency upon each start-up.
摘要翻译：提出了一种用于产生包括在时间上彼此分离的多个振荡部分的中断振荡信号的装置和方法。该装置和方法适用于通信系统，特别适用于超宽带（UWB）应用。该装置包括用于产生振荡部分的可变振荡器; 用于在每个振荡部分的开始/结束处接通/关闭可变振荡器的开关电路; 以及用于设置可变振荡器中的初始条件以在每次启动时施加预定义的瞬态和表征频率的电路。

50. 发明授权

US11559220B2 Measurement unit for measuring a bio-impedance 有权
公开(公告)号：US11559220B2
公开(公告)日：2023-01-24
申请号：US16784235
申请日：2020-02-06
申请人： IMEC VZW , STICHTING IMEC NEDERLAND
发明人： Hyunsoo Ha , Nick Van Helleputte
IPC分类号： A61B5/053 , A61B5/0245 , A61B5/08 , A61B5/00
摘要： A measurement unit for measuring a bio-impedance of a body, the measurement unit comprising a current generator circuit, a readout circuit, and a baseline cancellation current circuit, wherein the current generator circuit is configured to amplify a reference current to form a measurement current to be driven through a body to generate a measurement voltage representing the bio-impedance; wherein the readout circuit comprises a Instrumentation amplifier (IA) which has a transconductance stage and a transimpedance stage, wherein the IA is configured to: produce a first current in the transconductance stage, the first current being proportional to the measurement voltage, receive a second current from the baseline cancellation current circuit, produce an output voltage in the transimpedance stage, the output voltage being proportional to a difference between the first current and the second current and representative of the measured bio-impedance; wherein the baseline cancellation current circuit is configured to amplify the reference current by a factor to form the second current and deliver it to the IA, wherein the factor is such that that the absolute value of the difference between the first and the second current is below a threshold such that a baseline of the first current is cancelled by the second current.

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