会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 41. 发明授权
    • Content-addressable memory architecture
    • 内容可寻址内存架构
    • US07738274B1
    • 2010-06-15
    • US12079548
    • 2008-03-27
    • Farid NematiBruce Lynn Bateman
    • Farid NematiBruce Lynn Bateman
    • G11C15/00
    • G11C15/04G11C11/39
    • A content-addressable memory (“CAM”) architecture and method for reducing power consumption thereof are described. A CAM cell array includes CAM cells, each of which includes two thyristor-based storage elements. Each thyristor-based storage element of the CAM cells has a control gate, an anode, and a cathode for providing control gates, anodes, and cathodes of the CAM cells. The CAM cell array further includes matchlines directly coupled to the cathodes of the CAM cells; searchlines directly coupled to the anodes of the CAM cell; and gatelines coupled to the control gates of the CAM cells.
    • 描述了一种用于降低功耗的内容寻址存储器(“CAM”)架构和方法。 CAM单元阵列包括CAM单元,每个单元包括两个基于晶闸管的存储元件。 CAM单元的每个基于晶闸管的存储元件具有用于提供CAM单元的控制栅极,阳极和阴极的控制栅极,阳极和阴极。 CAM单元阵列还包括直接耦合到CAM单元的阴极的匹配线; 搜索线直接耦合到CAM单元的阳极; 以及与CAM单元的控制门耦合的门线。
    • 47. 发明授权
    • Interlocked jets cooling method and apparatus
    • 联锁喷气冷却方法和装置
    • US08490419B2
    • 2013-07-23
    • US12859168
    • 2010-08-18
    • Volodymyr ZrodnikovMikhail Spokoyny
    • Volodymyr ZrodnikovMikhail Spokoyny
    • F28C1/00
    • F28C3/005H01L23/4735H01L2924/0002H01L2924/00
    • Dissipating heat and apparatus therefor from a heat dissipation surface is described. In an embodiment, first jets are streamed along the heat dissipation surface in a first direction and are spaced apart from one another. Second jets are streamed along the heat dissipation surface in a second direction at least substantially opposite the first direction and spaced apart from one another. Coolant used to provide the first jets and the second jets is exited away from the heat dissipation surface. The first jets and the second jets are offset from one another in a transverse direction with respect to the first direction and the second direction, and the first jets and the second jets pass side-by-side with respect to one another.
    • 描述了从散热表面散热及其设备。 在一个实施例中,第一射流沿第一方向沿着散热表面流动并且彼此间隔开。 第二射流沿第二方向沿着散热表面流动,至少基本上与第一方向相反并且彼此间隔开。 用于提供第一射流的冷却剂和第二射流从散热表面离开。 第一射流和第二射流相对于第一方向和第二方向在横向彼此偏移,并且第一射流和第二射流相对于彼此并排。
    • 48. 发明授权
    • Reduction of electrostatic coupling for a thyristor-based memory cell
    • 减少基于晶闸管的存储单元的静电耦合
    • US08324656B1
    • 2012-12-04
    • US13175676
    • 2011-07-01
    • Rajesh N. GuptaMarc Laurent TarabbiaKevin J. Yang
    • Rajesh N. GuptaMarc Laurent TarabbiaKevin J. Yang
    • H01L29/74
    • H01L27/1203G11C11/39H01L27/1027H01L29/7436
    • Embodiments of integrated circuits for mitigating against electrostatic coupling are described. In an embodiment, first gate dielectrics are respectively located over first active regions. First isolation regions are respectively located between the first active regions. Second gate dielectrics are respectively located over second active regions. Second isolation regions are respectively located between the second active regions. In an embodiment, the first active regions are approximately 20 to 80 percent shorter in height/thickness than the second active regions. In another embodiment, the first isolation regions extend above an uppermost surface of the first gate dielectrics while providing gaps between the first isolation regions and sidewalls of the first active regions for receipt of material used in formation of conductive lines. In yet another embodiment, active area stripes are narrower in width at p-base regions and n-base regions than at cathode regions and anode regions respectively thereof.
    • 描述了用于减轻静电耦合的集成电路的实施例。 在一个实施例中,第一栅极电介质分别位于第一有源区上。 第一隔离区分别位于第一活性区之间。 第二栅极电介质分别位于第二有源区上。 第二隔离区域分别位于第二活性区域之间。 在一个实施例中,第一活性区域的高度/厚度比第二活性区域短约20至80%。 在另一个实施例中,第一隔离区域在第一栅极电介质的最上表面上方延伸,同时在第一隔离区域和第一有源区域的侧壁之间提供间隙,以便接收用于形成导电线路的材料。 在另一个实施例中,有源区条纹在p基区和n基区域的宽度分别窄于阴极区和阳极区。
    • 50. 发明授权
    • Clock signal noise shaping
    • 时钟信号噪声整形
    • US08044711B1
    • 2011-10-25
    • US12704150
    • 2010-02-11
    • Michael Yimin ZhangTat C. Choi
    • Michael Yimin ZhangTat C. Choi
    • H03B1/00
    • H03L7/16
    • A method and apparatus for clock signal noise shaping are described. Embodiments of a clock circuit include a filter coupled to receive an input clock signal and to provide an output clock signal. The filter filters noise of the input clock signal to shape the noise to provide the output clock signal. In a method for adjustment of phase noise, input clock signaling having the phase noise is obtained, and the input clock signal is filtered to adjust the phase noise to provide output clock signaling.
    • 描述了时钟信号噪声整形的方法和装置。 时钟电路的实施例包括耦合以接收输入时钟信号并提供输出时钟信号的滤波器。 滤波器滤除输入时钟信号的噪声,以形成噪声,以提供输出时钟信号。 在调节相位噪声的方法中,获得具有相位噪声的输入时钟信号,并且对输入时钟信号进行滤波以调整相位噪声以提供输出时钟信号。