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41. 发明授权

US09484834B2 Circuit arrangement with a rectifier circuit 有权
公开(公告)号：US09484834B2
公开(公告)日：2016-11-01
申请号：US14669756
申请日：2015-03-26
申请人： Infineon Technologies Dresden GmbH
发明人： Rolf Weis , Gerald Deboy
IPC分类号： H02M7/217 , H02M7/25 , H03K17/10 , H02M3/158 , H02M3/335 , H02M1/00
CPC分类号： H02M7/25 , H02M3/1588 , H02M3/33592 , H02M7/217 , H02M2001/0054 , H03K17/102 , Y02B70/1466 , Y02B70/1475
摘要： A rectifier circuit includes first and second load terminals, a first semiconductor device having a load path and configured to receive a drive signal, and a plurality of second semiconductor devices each having a load path and each configured to receive a drive signal. The load paths of the second semiconductor devices are connected in series, and connected in series to the load path of the first semiconductor device. A series circuit with the first semiconductor device and the second semiconductor devices is connected between the load terminals. Each of the second semiconductor devices is configured to receive as a drive voltage either a load-path voltage of at least one of the second semiconductor devices, or a load-path of at least the first semiconductor device. The first semiconductor device is configured to receive as a drive voltage a load-path-voltage of at least one of the second semiconductor devices.

42. 发明申请

US20160284561A1 Method of Manufacturing a Semiconductor Device Having a Buried Channel/Body Zone 审中-公开
标题翻译：制造具有掩埋通道/体区的半导体器件的方法
公开(公告)号：US20160284561A1
公开(公告)日：2016-09-29
申请号：US15175713
申请日：2016-06-07
申请人： Infineon Technologies Dresden GmbH
发明人： Stefan Tegen , Marko Lemke , Rolf Weis
IPC分类号： H01L21/306 , H01L29/66 , H01L21/308
CPC分类号： H01L21/30608 , H01L21/308 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/8236 , H01L27/0883 , H01L27/0886 , H01L29/66795
摘要： A method of manufacturing a semiconductor device includes etching cavities into a semiconductor layer by crystallographic etching having an etch rate that depends upon an orientation of crystal planes, wherein a transistor fin is formed between two of the cavities at a distance to a first surface of the semiconductor layer, forming a channel/body zone of a transistor cell in the transistor fin, and forming source zones and drain regions of the transistor cell in the semiconductor layer, wherein junctions between the channel/body zone and the source zones as well as the drain regions are formed at a distance to the first surface.
摘要翻译：一种制造半导体器件的方法包括通过晶体蚀刻将蚀刻空穴蚀刻到具有取决于晶面的取向的蚀刻速率的晶体蚀刻，其中晶体管鳍形成在两个空腔之间的距离处半导体层，形成晶体管鳍片中的晶体管单元的沟道/体区，以及在半导体层中形成晶体管单元的源极区和漏极区，其中沟道/体区与源极区之间的接合以及漏极区域形成在距离第一表面一定距离处。

43. 发明授权

US09437440B2 Method for manufacturing a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US09437440B2
公开(公告)日：2016-09-06
申请号：US14063362
申请日：2013-10-25
申请人： Infineon Technologies Dresden GmbH
发明人： Kurt Sorschag , Daniel Sarlette , Felix Braun , Marcel Heller , Dieter Kaiser , Ingo Meusel , Marko Lemke , Anton Mauder , Helmut Strack
IPC分类号： H01L21/76 , H01L21/20 , H01L21/36 , H01L21/306 , H01L21/02 , H01L21/311 , H01L29/66
CPC分类号： H01L21/30604 , H01L21/02532 , H01L21/02658 , H01L21/306 , H01L21/311 , H01L29/0657 , H01L29/66348 , H01L29/66734 , H01L29/66795 , H01L29/7827
摘要： A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure.
摘要翻译：提供一种半导体器件的制造方法。该方法包括：在半导体衬底中形成多个延伸到上侧的半导体台面，使得相邻的半导体台面通过基本为空的沟槽和基本上填充有可选择性地可蚀刻的牺牲层的沟槽彼此间隔开到半导体台面; 形成将所述半导体台面彼此间隔开的支撑结构，所述半透明台面基本上为空的沟槽之一和所述沟槽基本上被所述牺牲层填充; 并且从上侧处理半导体衬底，同时半导体台面通过支撑结构机械连接。

44. 发明申请

US20160155840A1 Semiconductor Device with Buried Doped Region and Contact Structure 有权
标题翻译：具有埋置掺杂区域和接触结构的半导体器件
公开(公告)号：US20160155840A1
公开(公告)日：2016-06-02
申请号：US14952323
申请日：2015-11-25
申请人： Infineon Technologies Dresden GmbH
发明人： Marko Lemke , Stefan Tegen , Rolf Weis
IPC分类号： H01L29/78 , H01L29/40 , H01L29/66 , H01L29/10
CPC分类号： H01L29/7813 , H01L21/823487 , H01L27/0883 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/45 , H01L29/66734 , H01L29/7397 , H01L29/7398 , H01L29/7809
摘要： A semiconductor device includes a buried doped region at a first distance to a main surface of a semiconductor body. A contact structure extends from the main surface to the doped region. The contact structure includes a contact layer formed from a metal-semiconductor alloy that directly adjoins the doped region. The contact structure further includes a fill structure formed from a metal or a conductive metal compound. An insulator structure surrounds the contact structure in cross-sections parallel to the main surface.
摘要翻译：半导体器件包括在半导体本体的主表面第一距离处的掩埋掺杂区域。接触结构从主表面延伸到掺杂区域。接触结构包括由直接邻接掺杂区域的金属 - 半导体合金形成的接触层。接触结构还包括由金属或导电金属化合物形成的填充结构。绝缘体结构在平行于主表面的横截面中包围接触结构。

45. 发明授权

US09330929B1 Systems and methods for horizontal integration of acceleration sensor structures 有权
标题翻译：加速度传感器结构水平整合的系统和方法
公开(公告)号：US09330929B1
公开(公告)日：2016-05-03
申请号：US14512916
申请日：2014-10-13
申请人： Infineon Technologies Dresden GmbH
发明人： Thoralf Kautzsch , Heiko Fröhlich , Mirko Vogt , Maik Stegemann , Andre Röth , Steffen Bieselt
IPC分类号： H01L29/84 , H01L29/04 , H01L29/66 , H01L29/06 , H01L21/3065
CPC分类号： B81B7/02 , B81B2201/0235 , B81B2201/0264 , B81B2207/015 , B81C1/00246 , B81C2203/0764 , H01L21/3065 , H01L29/84
摘要： Embodiments relate to integrated circuit sensors, and more particularly to sensors integrated in an integrated circuit structure and methods for producing the sensors. In an embodiment, a sensor device comprises a substrate; a first trench in the substrate; a first moveable element suspended in the first trench by a first plurality of support elements spaced apart from one another and arranged at a perimeter of the first moveable element; and a first layer arranged on the substrate to seal the first trench, thereby providing a first cavity containing the first moveable element and the first plurality of support elements.
摘要翻译：实施例涉及集成电路传感器，更具体地涉及集成在集成电路结构中的传感器和用于产生传感器的方法。在一个实施例中，传感器装置包括衬底; 衬底中的第一沟槽; 第一可移动元件，其通过彼此间隔开并布置在第一可移动元件的周边的第一多个支撑元件悬挂在第一沟槽中; 以及布置在所述基板上以密封所述第一沟槽的第一层，从而提供包含所述第一可移动元件和所述第一多个支撑元件的第一空腔。

46. 发明申请

US20160093615A1 Power Transistor 审中-公开
公开(公告)号：US20160093615A1
公开(公告)日：2016-03-31
申请号：US14954865
申请日：2015-11-30
申请人： Infineon Technologies Dresden GmbH
发明人： Stefan Tegen
IPC分类号： H01L27/088 , H01L29/04 , H01L29/06 , H01L29/423 , H01L29/417 , H01L29/08 , H01L29/78 , H01L29/10
CPC分类号： H01L27/0886 , H01L29/04 , H01L29/0696 , H01L29/0847 , H01L29/1033 , H01L29/41783 , H01L29/41791 , H01L29/4236 , H01L29/78 , H01L29/7831 , H01L29/785
摘要： A power transistor includes a number of transistor cells. Each transistor cell includes a source region, a drain region, a body region and a gate electrode. Each source region is arranged in a first semiconductor fin of a semiconductor body. Each drain region is at least partially arranged in a second semiconductor fin of the semiconductor body. The second semiconductor fin is spaced from the first semiconductor fin in a first horizontal direction of the semiconductor body. Each gate electrode is arranged in a trench adjacent the first semiconductor fin, is adjacent the body region, and is dielectrically insulated from the body region by a gate dielectric. Each of the first and second semiconductor fins has a width in the first horizontal direction and a length in a second horizontal direction, wherein the length is larger than the width.

47. 发明授权

US09219149B2 Semiconductor device with vertical transistor channels and a compensation structure 有权
标题翻译：具有垂直晶体管通道的半导体器件和补偿结构
公开(公告)号：US09219149B2
公开(公告)日：2015-12-22
申请号：US13935628
申请日：2013-07-05
申请人： Infineon Technologies Dresden GmbH
发明人： Anton Mauder , Katarzyna Kowalik-Seidl , Rolf Weis , Uwe Wahl
IPC分类号： H01L29/66 , H01L29/78
CPC分类号： H01L29/7827 , H01L29/0634 , H01L29/0649 , H01L29/407 , H01L29/41766 , H01L29/7813 , H01L29/7828 , H01L29/8083 , H01L29/8613
摘要： A semiconductor device includes transistor cells with vertical channels perpendicular to a first surface of a semiconductor portion. A buried compensation structure in the semiconductor portion between the transistor cells and a second surface of the semiconductor portion parallel to the first surface includes first areas and second areas. The first and second areas are alternatingly arranged along a lateral direction parallel to the first surface. A contiguous impurity layer of a first conductivity type separates the transistor cells from the buried compensation structure.
摘要翻译：半导体器件包括具有垂直于半导体部分的第一表面的垂直沟道的晶体管单元。在晶体管单元与平行于第一表面的半导体部分的第二表面之间的半导体部分中的掩埋补偿结构包括第一区域和第二区域。第一和第二区域沿着平行于第一表面的横向方向交替排列。第一导电类型的连续杂质层将晶体管单元与掩埋补偿结构分开。

48. 发明申请

US20150311191A1 SEMICONDUCTOR DEVICE COMPRISING ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE 有权
标题翻译：包含静电放电保护结构的半导体器件
公开(公告)号：US20150311191A1
公开(公告)日：2015-10-29
申请号：US14682257
申请日：2015-04-09
申请人： Infineon Technologies Dresden GmbH
发明人： Joachim Weyers , Franz Hirler , Anton Mauder , Markus Schmitt
IPC分类号： H01L27/02 , H01L23/34
CPC分类号： H01L27/0255 , H01L23/34 , H01L23/367 , H01L23/3672 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device comprises a semiconductor body having a first surface and a second surface opposite to the first surface. The semiconductor device further comprises a first isolation layer on the first surface of the semiconductor body, and an electrostatic discharge protection structure on the first isolation layer. The electrostatic discharge protection structure has a first terminal and a second terminal. The semiconductor device further comprises a heat dissipation structure, which has a first end in contact with the electrostatic discharge protection structure and a second end which is in direct contact to an electrically isolating region.
摘要翻译：半导体器件包括具有第一表面和与第一表面相对的第二表面的半导体本体。半导体器件还包括在半导体主体的第一表面上的第一隔离层和第一隔离层上的静电放电保护结构。静电放电保护结构具有第一端子和第二端子。半导体器件还包括散热结构，其具有与静电放电保护结构接触的第一端和与电绝缘区直接接触的第二端。

49. 发明授权

US09136328B2 Silicon on nothing devices and methods of formation thereof 有权
标题翻译：无硅器件及其形成方法
公开(公告)号：US09136328B2
公开(公告)日：2015-09-15
申请号：US13648170
申请日：2012-10-09
申请人： Infineon Technologies Dresden GmbH
发明人： Thoralf Kautzsch , Alessia Scire , Steffen Bieselt
IPC分类号： H01L21/76 , H01L29/06 , H01L21/324 , H01L29/78 , B81C1/00
CPC分类号： H01L21/764 , B81B2203/0315 , B81C1/00047 , B81C2201/0116 , H01L21/3247 , H01L21/7624 , H01L27/1203 , H01L29/0649 , H01L29/0653 , H01L29/7833
摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.
摘要翻译：根据本发明的实施例，形成半导体器件的方法包括在衬底内形成第一空腔。第一空腔设置在基板的一部分下方。该方法还包括在第一腔内形成第一支柱以支撑衬底的该部分。

50. 发明申请

US20150210535A1 SENSOR STRUCTURES, SYSTEMS AND METHODS WITH IMPROVED INTEGRATION AND OPTIMIZED FOOTPRINT 有权
标题翻译：传感器结构，系统和方法与改进的集成和优化的FOOTPRINT
公开(公告)号：US20150210535A1
公开(公告)日：2015-07-30
申请号：US14498584
申请日：2014-09-26
申请人： Infineon Technologies Dresden GmbH
发明人： Andre Röth
IPC分类号： B81B3/00 , B81C1/00
CPC分类号： G01L9/00 , B81B3/0072 , B81B2201/0264 , B81B2203/0127 , G01L9/0044 , G01L9/0072
摘要： Embodiments relate to sensors and more particularly to structures for and methods of forming sensors that are easier to manufacture as integrated components and provide improved deflection of a sensor membrane, lamella or other movable element. In embodiments, a sensor comprises a support structure for a lamella, membrane or other movable element. The support structure comprises a plurality of support elements that hold or carry the movable element. The support elements can comprise individual cylindrical points or feet-like elements with straight or concave sidewalls, rather than a conventional interconnected frame, that enable improved motion of the movable element, easier removal of a sacrificial layer between the movable element and substrate during manufacture and a more favorable deflection ratio, among other benefits.
摘要翻译：实施例涉及传感器，更具体地涉及形成传感器的结构和方法，所述传感器更容易制造为集成部件并提供传感器膜，薄片或其它可移动元件的改进偏转。在实施例中，传感器包括用于薄片，膜或其它可移动元件的支撑结构。支撑结构包括保持或承载可移动元件的多个支撑元件。支撑元件可以包括具有直的或凹入的侧壁而不是传统的互连框架的单独的圆柱形点或脚状元件，其能够改善可移动元件的运动，在制造过程中更容易地去除可移动元件和基板之间的牺牲层，更有利的变形比等。

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