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    • 46. 发明授权
    • Method for electroless gold plating of conductive traces on printed circuit boards
    • 印刷电路板上导电迹线的无电镀金的方法
    • US06733823B2
    • 2004-05-11
    • US10114211
    • 2002-04-02
    • David M. LeeArthur S. FrancomacaroSeppo J. LehtonenHarry K. Charles, Jr.
    • David M. LeeArthur S. FrancomacaroSeppo J. LehtonenHarry K. Charles, Jr.
    • B05D512
    • H05K3/244C23C18/1651C23C18/1844C23C18/54
    • A method of electrolessly gold plating copper on a printed circuit board (PCB). Starting with a copper patterned PCB, steps include: clean with ultrasonic agitation with the PCB initially oriented vertically and gradually moved to a 45° angle; rinse; sulfuric acid bath with ultrasonic and mechanical agitation; rinse; another sulfuric acid bath with ultrasonic and mechanical agitation; plate the copper with palladium with ultrasonic agitation with the PCB initially oriented at a 45° angle and flipped half way through to opposing 45° angle; rinse; post dip in sulfuric acid; rinse; electrolessly nickel plate with mechanical agitation; rinse; nitrogen blow dry; visual inspection for nickel coverage of the copper; hydrochloric acid bath with manual agitation; rinse; if full nickel coverage was not achieved, repeat preceding steps starting with second sulfuric acid bath; gold flash plate to establish a first layer of gold; rinse; autocatalytic gold plate; rinse; and nitrogen blow dry.
    • 在印刷电路板(PCB)上无电镀金铜的方法。 从铜图案化PCB开始,步骤包括:使用超声波搅拌清洁PCB,PCB最初垂直定向并逐渐移动到45°角; 冲洗; 硫酸浴用超声波和机械搅拌; 冲洗; 超声波和机械搅拌的另一种硫酸浴; 用钯超声波搅拌用铜板将铜最初定向成45°的角度,并以一半的方式翻转到相对的45°角; 冲洗; 硫酸后浸渍; 冲洗; 无电镀镍板机械搅拌; 冲洗; 氮吹干燥; 铜的镍覆盖目视检查; 手动搅拌的盐酸浴; 冲洗; 如果未达到全镍覆盖率,则从第二次硫酸浴开始重复前述步骤; 金闪盘建立第一层金; 冲洗; 自催化金板; 冲洗; 并吹氮。
    • 48. 发明授权
    • Regulating a data transfer time
    • 调整数据传输时间
    • US6078980A
    • 2000-06-20
    • US222213
    • 1998-12-29
    • Kenneth C. HollandDavid M. LeeSusan S. Meredith
    • Kenneth C. HollandDavid M. LeeSusan S. Meredith
    • G06F13/36G06F11/16G06F13/42G06F13/00
    • G06F13/4213G06F11/1679
    • A computer system includes a bus, a first bus device, a core circuit and a second circuit. The first bus device is coupled to the bus and adapted to finish a first indication of data to a portion of a bus beginning at a first clock cycle. The bus is capable of skewing the first indication to produce a second indication of the data at another portion of the bus beginning at another clock cycle. The second circuit is coupled to the bus and is adapted to receive an indication of a selected latency time. The second circuit is also adapted to transfer the data to the core circuit in response to the second indication and regulate the transfer so that the circuit receives the data beginning at the selected latency time after the first clock cycle.
    • 计算机系统包括总线,第一总线装置,核心电路和第二电路。 第一总线设备耦合到总线并适于完成从第一时钟周期开始的总线的一部分的数据的第一指示。 总线能够偏移第一指示,以在另一时钟周期开始的总线的另一部分产生数据的第二指示。 第二电路耦合到总线并且适于接收所选择的等待时间的指示。 第二电路还适于响应于第二指示将数据传送到核心电路并调节传输,使得电路在第一时钟周期之后的所选等待时间开始接收数据。