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41. 发明授权

US09466687B2 Methods for producing bipolar transistors with improved stability 有权
标题翻译：制造稳定性提高的双极晶体管的方法
公开(公告)号：US09466687B2
公开(公告)日：2016-10-11
申请号：US14157317
申请日：2014-01-16
申请人： Xin Lin , Daniel J. Blomberg , Hongning Yang , Jiang-Kai Zuo
发明人： Xin Lin , Daniel J. Blomberg , Hongning Yang , Jiang-Kai Zuo
IPC分类号： H01L21/331 , H01L29/66 , H01L21/8228 , H01L27/082 , H01L29/735
CPC分类号： H01L29/6625 , H01L21/82285 , H01L27/0826 , H01L29/735
摘要： Instability and drift sometimes observed in bipolar transistors, having a portion of the base extending to the transistor surface between the emitter and base contact, can be reduced or eliminated by providing a further doped region of the same conductivity type as the emitter at the transistor surface between the emitter and the base contact. The further region is desirably more heavily doped than the base region at the surface and less heavily doped than the adjacent emitter. In another embodiment, a still or yet further region of the same conductivity type as the emitter is provided either between the further region and the emitter or laterally within the emitter. The still or yet further region is desirably more heavily doped than the further region. Such further regions shield the near surface base region from trapped charge that may be present in dielectric layers or interfaces overlying the transistor surface.
摘要翻译：通过提供与晶体管表面上的发射极相同的导电类型的另外的掺杂区域，可以减少或消除具有延伸到发射极和基极接触之间的晶体管表面的基极的一部分的双极晶体管中的不稳定性和漂移在发射极和基极之间。另外的区域期望比表面上的基极区域重掺杂，并且比相邻的发射极更重掺杂。在另一个实施例中，与发射器相同的导电类型的仍然还是另外的区域被提供在另外的区域和发射极之间或者在发射极内侧。仍然还是进一步的区域期望比其他区域更重掺杂。这样的另外的区域屏蔽近表面碱基区域可能存在于覆盖晶体管表面的电介质层或界面中的俘获电荷。

42. 发明授权

US09337324B2 Bipolar transistor, band-gap reference circuit and virtual ground reference circuit 有权
标题翻译：双极晶体管，带隙参考电路和虚拟接地参考电路
公开(公告)号：US09337324B2
公开(公告)日：2016-05-10
申请号：US14463583
申请日：2014-08-19
申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
发明人： Min-Hwa Chi , Lihying Ching , Deyuan Xiao
IPC分类号： H01L21/8228 , H01L29/739 , G05F3/30 , H01L21/84 , H01L27/082 , H01L27/12 , H01L29/66 , H01L29/73 , H01L21/265 , H01L29/08 , H01L29/10 , H03K17/60
CPC分类号： H01L29/66325 , G05F3/30 , H01L21/26586 , H01L21/8228 , H01L21/84 , H01L27/082 , H01L27/1203 , H01L29/063 , H01L29/0649 , H01L29/0808 , H01L29/0821 , H01L29/1008 , H01L29/1095 , H01L29/66265 , H01L29/7317 , H01L29/7393 , H03K17/60
摘要： The present invention provides a bipolar transistor, a method for forming the bipolar transistor, a method for turning on the bipolar transistor, and a band-gap reference circuit, virtual ground reference circuit and double band-gap reference circuit with the bipolar transistor. The bipolar transistor includes: a Silicon-On-Insulator wafer; a base area, an emitter area and a collector area; a base area gate dielectric layer on a top silicon layer and atop the base area; a base area control-gate on the base area gate dielectric layer; an emitter electrode connected to the emitter area via a first contact; a collector electrode connected to the collector area via a second contact; and a base area control-gate electrode connected to the base area control-gate via a third contact. Processes of forming the bipolar transistor are fully compatible with traditional standard CMOS processes; and the base current to turn on the bipolar transistor is based on the GIDL current and formed by applying a voltage to the base area control-gate electrode without any need of contact to the base.
摘要翻译：本发明提供一种双极晶体管，双极型晶体管的形成方法，双极型晶体管的导通方法，带隙基准电路，虚拟接地参考电路以及双极性晶体管的双带隙基准电路。双极晶体管包括：绝缘体上硅晶片; 基极区域，发射极区域和集电极区域; 位于顶部硅层上的基极区电介质层，并在基底区域顶部; 基区栅极电介质层上的基区控制栅极; 经由第一触点与发射极区域连接的发射极; 集电极，经由第二触点连接到集电区; 以及通过第三触点连接到基区控制门的基区控制栅电极。形成双极晶体管的工艺与传统的标准CMOS工艺完全兼容; 并且用于导通双极晶体管的基极电流基于GIDL电流并且通过向基极区域控制栅电极施加电压而形成，而不需要与基极接触。

43. 发明授权

US09324707B2 Integrated circuits and methods of design and manufacture thereof 有权
标题翻译：集成电路及其设计和制造方法
公开(公告)号：US09324707B2
公开(公告)日：2016-04-26
申请号：US14323914
申请日：2014-07-03
申请人： Infineon Technologies AG
发明人： Henning Haffner , Manfred Eller , Richard Lindsay
IPC分类号： H01L27/082 , H01L21/28 , H01L27/02 , G03F1/00 , G06F17/50 , H01L27/085 , H01L21/8234 , H01L29/66 , H01L29/78
CPC分类号： G06F17/5072 , G03F1/00 , G06F2217/12 , H01L21/0334 , H01L21/28123 , H01L21/823425 , H01L21/823437 , H01L27/0207 , H01L27/082 , H01L27/085 , H01L27/088 , H01L29/6659 , H01L29/7833 , Y10T29/41
摘要： Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.
摘要翻译：公开了集成电路及其制造和设计方法。例如，制造方法包括使用第一掩模对形成多个第一和第二特征的栅极材料进行图案化。第一特征形成半导体器件的栅电极，而第二特征是虚拟电极。基于这些虚拟电极的位置，使用第二掩模去除所选择的虚拟电极。该方法的使用提供了更大的灵活性，为不同的目标定制单个设备。

44. 发明授权

US09293454B2 Bipolar junction transistor having multi-sided base contact 有权
标题翻译：具有多面基极接触的双极结晶体管
公开(公告)号：US09293454B2
公开(公告)日：2016-03-22
申请号：US14521605
申请日：2014-10-23
申请人： GLOBALFOUNDRIES Inc.
发明人： Jin Cai , Tak H. Ning
IPC分类号： H01L27/082 , H01L29/423 , H01L29/66 , H01L29/735 , H01L21/8249 , H01L29/10 , H01L29/45
CPC分类号： H01L27/082 , H01L21/8249 , H01L29/1004 , H01L29/42304 , H01L29/45 , H01L29/6625 , H01L29/735
摘要： A Bipolar Junction Transistor with an intrinsic base, wherein the intrinsic base includes a top surface and two side walls orthogonal to the top surface, and a base contact electrically coupled to the side walls of the intrinsic base. In one embodiment an apparatus can include a plurality of Bipolar Junction Transistors, and a base contact electrically coupled to the side walls of the intrinsic bases of each BJT.
摘要翻译：一种具有本征基极的双极结晶体管，其中本征基极包括顶表面和与顶表面正交的两个侧壁，以及电耦合到本征基底的侧壁的基部接触。在一个实施例中，装置可以包括多个双极结晶体管，以及电耦合到每个BJT的内部基极的侧壁的基部触点。

45. 发明申请

US20160079237A1 High Voltage Semiconductor Power Switching Device 有权
公开(公告)号：US20160079237A1
公开(公告)日：2016-03-17
申请号：US14949021
申请日：2015-11-23
申请人： Mosway Semiconductor Limited
发明人： Chiu-Sing Celement Tse , On-Bon Peter Chan , Chi-Keung Tang
IPC分类号： H01L27/06 , H01L27/082 , H01L21/56 , H01L29/45 , H01L23/535 , H01L29/08 , H01L29/10 , H01L29/417 , H01L29/423 , H01L29/06 , H01L29/49 , H01L21/8249 , H01L21/84 , H01L27/12 , H01L29/872
CPC分类号： H01L27/0635 , H01L21/565 , H01L21/8249 , H01L21/84 , H01L23/535 , H01L27/0647 , H01L27/0825 , H01L27/1203 , H01L29/0634 , H01L29/0804 , H01L29/0821 , H01L29/0847 , H01L29/1004 , H01L29/1095 , H01L29/41708 , H01L29/41758 , H01L29/42304 , H01L29/42356 , H01L29/42364 , H01L29/45 , H01L29/4916 , H01L29/872 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2924/13055 , H01L2924/00
摘要： A three terminal high voltage Darlington bipolar transistor power switching device includes two high voltage bipolar transistors, with collectors connected together serving as the collector terminal. The base of the first high voltage bipolar transistor serves as the base terminal. The emitter of the first high voltage bipolar transistor connects to the base of the second high voltage bipolar transistor (inner base), and the emitter of the second high voltage bipolar transistor serves as the emitter terminal. A diode has its anode connected to the inner base (emitter of the first high voltage bipolar transistor, or base of the second high voltage bipolar transistor), and its cathode connected to the base terminal. Similarly, a three terminal hybrid MOSFET/bipolar high voltage switching device can be formed by replacing the first high voltage bipolar transistor of the previous switching device by a high voltage MOSFET.

46. 发明授权

US09147756B2 Electronic device and method for increasing reliability of bipolar transistors under high voltage conditions 有权
标题翻译：用于在高电压条件下提高双极晶体管的可靠性的电子器件和方法
公开(公告)号：US09147756B2
公开(公告)日：2015-09-29
申请号：US13557394
申请日：2012-07-25
申请人： Philipp Menz , Berthold Staufer , Yasuda Hiroshi
发明人： Philipp Menz , Berthold Staufer , Yasuda Hiroshi
IPC分类号： H01L27/082 , H01L29/00 , H01L27/102 , H01L29/73 , H01L29/732 , H01L29/10 , H01L29/66
CPC分类号： H01L29/73 , H01L29/1004 , H01L29/66234 , H01L29/7325
摘要： The invention relates to an electronic device with a bipolar transistor having an emitter, a base and a collector. The base has a first region of a first concentration of the first dopant for forming an electrically active region of the base and a second region of a second concentration of the first dopant close to the surface of the base region. The first region is separated from the second region by a region of a third concentration of the first dopant and the third concentration is lower than the first and the second concentration.
摘要翻译：本发明涉及具有发射极，基极和集电极的双极晶体管的电子器件。基底具有用于形成基底的电活性区域的第一掺杂物的第一浓度的第一区域和靠近基底区域的表面的第一掺杂物的第二浓度的第二区域。第一区域与第二区域分离第一掺杂剂的第三浓度的区域，第三浓度低于第一浓度和第二浓度。

47. 发明申请

US20150270256A1 SEGMENTED NPN VERTICAL BIPOLAR TRANSISTOR 有权
标题翻译： SEGMENTED NPN垂直双极晶体管
公开(公告)号：US20150270256A1
公开(公告)日：2015-09-24
申请号：US14222288
申请日：2014-03-21
申请人： Texas Instruments Incorporated
发明人： HENRY LITZMANN EDWARDS , AKRAM A. SALMAN , MD. IQBAL MAHMUD
IPC分类号： H01L27/02 , H01L27/082 , H01L29/737
CPC分类号： H01L27/0259 , H01L27/0825 , H01L29/0804 , H01L29/41708 , H01L29/732
摘要： A segmented bipolar transistor includes a p-base in a semiconductor surface including at least one p-base finger having a base metal/silicide stack including a base metal line that contacts a silicide layer on the semiconductor surface of the p-base finger. An n+ buried layer is under the p-base. A collector includes an n+ sinker extending from the semiconductor surface to the n+ buried layer including a collector finger having a collector metal/silicide stack including a collector metal line that contacts a silicide layer on the semiconductor surface of the collector finger. An n+ emitter has at least one emitter finger including an emitter metal/silicide stack that contacts the silicide layer on the semiconductor surface of the emitter finger. The emitter metal/silicide stack and/or collector metal/silicide stack include segmentation with a gap which cuts a metal line and/or the silicide layer of the stack.
摘要翻译：分段双极晶体管包括在半导体表面中的p基底，其包括至少一个具有基底金属/硅化物堆叠的p基指，所述基底金属/硅化物堆叠包括接触p基指的半导体表面上的硅化物层的基底金属线。 n +掩埋层位于p基底下。收集器包括从半导体表面延伸到n +掩埋层的n +沉降片，其包括具有集电极金属/硅化物堆叠的集电极指状物，该集电极金属/硅化物堆叠包括接触集电极指状物的半导体表面上的硅化物层的集电极金属线。 n +发射极具有至少一个发射极指，其包括与发射极指状物的半导体表面上的硅化物层接触的发射极金属/硅化物堆叠。发射极金属/硅化物堆叠和/或集电极金属/硅化物堆叠包括用切割金属线和/或堆叠的硅化物层的间隙进行分割。

48. 发明申请

US20150221641A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20150221641A1
公开(公告)日：2015-08-06
申请号：US14332526
申请日：2014-07-16
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Kazuaki ONISHI
IPC分类号： H01L27/088 , H01L29/739 , H01L29/36 , H01L27/08 , H01L27/082 , H01L29/10 , H01L29/861 , H01L29/78
CPC分类号： H01L27/088 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/33 , H01L27/0814 , H01L27/0823 , H01L29/0615 , H01L29/0619 , H01L29/1095 , H01L29/36 , H01L29/407 , H01L29/41725 , H01L29/45 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/861 , H01L29/8611 , H01L2224/04026 , H01L2224/05073 , H01L2224/05166 , H01L2224/05624 , H01L2224/06181 , H01L2224/291 , H01L2224/30181 , H01L2224/32013 , H01L2224/32245 , H01L2224/33181 , H01L2224/83447 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/12036 , H01L2924/13055 , H01L2924/13091 , H01L2924/014 , H01L2924/00014
摘要： According to one embodiment, a semiconductor device includes a first electrode disposed on a first surface of a semiconductor substrate, and a second electrode disposed on a second surface of the semiconductor substrate. The first surface is on an opposite side of the semiconductor substrate from the second surface. A first conductive member is provided on a central portion of the first electrode. A second conductive member is provided on the second electrode. The first conductive member is not disposed on a peripheral portion of the first electrode that is adjacent to the central portion. The electrical resistance of the semiconductor substrate between the central portion of the first electrode and the second electrode is lower than electrical resistance of the substrate between the peripheral portion of the first electrode and the second electrode.
摘要翻译：根据一个实施例，半导体器件包括设置在半导体衬底的第一表面上的第一电极和设置在半导体衬底的第二表面上的第二电极。第一表面与半导体衬底的与第二表面相反的一侧。第一导电构件设置在第一电极的中心部分上。第二导电构件设置在第二电极上。第一导电构件没有设置在与中心部分相邻的第一电极的周边部分上。半导体衬底在第一电极的中心部分和第二电极之间的电阻低于第一电极的周边部分和第二电极之间的衬底的电阻。

49. 发明授权

US09031684B2 Multi-factor advanced process control method and system for integrated circuit fabrication 有权
标题翻译：多因素先进的集成电路制造过程控制方法和系统
公开(公告)号：US09031684B2
公开(公告)日：2015-05-12
申请号：US13286337
申请日：2011-11-01
申请人： Nai-Han Cheng , Chin-Hsiang Lin , Chi-Ming Yang , Chun-Lin Chang , Chih-Hong Hwang
发明人： Nai-Han Cheng , Chin-Hsiang Lin , Chi-Ming Yang , Chun-Lin Chang , Chih-Hong Hwang
IPC分类号： G06F19/00 , G06F17/50 , H01L29/00 , H01L27/082 , H05K1/00
CPC分类号： G06F17/5063 , G06F2217/10
摘要： A method and system for integrated circuit fabrication is disclosed. In an example, the method includes determining a first process parameter of a wafer and a second process parameter of the wafer, the first process parameter and the second process parameter corresponding to different wafer characteristics; determining a variation of a device parameter of the wafer based on the first process parameter and the second process parameter; constructing a model for the device parameter as a function of the first process parameter and the second process parameter based on the determined variation of the device parameter of the wafer; and performing a fabrication process based on the model.
摘要翻译：公开了一种用于集成电路制造的方法和系统。在一个示例中，该方法包括确定晶片的第一工艺参数和晶片的第二工艺参数，对应于不同晶片特性的第一工艺参数和第二工艺参数; 基于所述第一处理参数和所述第二处理参数确定所述晶片的设备参数的变化; 基于确定的晶片的器件参数的变化，构造作为第一工艺参数和第二工艺参数的函数的器件参数的模型; 并基于该模型执行制造过程。

50. 发明授权

US08907452B2 Device for detecting a laser attack in an integrated circuit chip 有权
标题翻译：用于检测集成电路芯片中的激光攻击的装置
公开(公告)号：US08907452B2
公开(公告)日：2014-12-09
申请号：US13751549
申请日：2013-01-28
申请人： STMicroelectronics (Rousset) SAS
发明人： Fabrice Marinet , Jimmy Fort , Alexandre Sarafianos , Julien Mercier
IPC分类号： H01L27/082
CPC分类号： H01L23/576 , G09C1/00 , H01L23/57 , H01L27/0635 , H01L27/0658 , H01L27/092 , H01L29/7322 , H01L2924/0002 , H04L9/004 , H04L2209/12 , H01L2924/00
摘要： A device for detecting a laser attack in an integrated circuit chip formed in the upper P-type portion of a semiconductor substrate incorporating an NPN bipolar transistor having an N-type buried layer, including a detector of the variations of the current flowing between the base of said NPN bipolar transistor and the substrate.
摘要翻译：一种用于检测形成在具有N型掩埋层的NPN双极晶体管的半导体衬底的上部P型部分中形成的集成电路芯片中的激光攻击的装置，包括：检测器，的NPN双极晶体管和衬底。

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