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51. 发明授权

US3245034A Self-correcting circuit arrangement for determining the signal with a preferential value at the outputs of a decoding matrix 失效
标题翻译：用于在解码矩阵的输出处确定具有优先值的信号的自校正电路装置
公开(公告)号：US3245034A
公开(公告)日：1966-04-05
申请号：US18491162
申请日：1962-03-29
申请人： INT STANDARD ELECTRIC CORP
发明人： KARL STEINBUCH , FARHANG ZENDEH , GERHARD MERZ
IPC分类号： G01R19/00 , G06F1/00 , G06F7/02 , G06F11/00 , G06G7/04 , G06G7/12 , G06G7/20 , G06K9/66 , G09B19/06 , G09B23/18 , G11C17/16 , G11C27/02 , H03D13/00 , H03K5/22 , H03K17/82
CPC分类号： H03K17/82 , G01R19/0038 , G06F1/00 , G06F7/023 , G06G7/04 , G06G7/12 , G06G7/20 , G06K9/66 , G09B19/06 , G09B23/186 , G11C17/16 , G11C27/02 , H03D13/00 , H03K5/22

52. 发明授权

US2612323A Supply roll tension in a measuring instrument 失效
标题翻译：在测量仪器中提供卷筒张力
公开(公告)号：US2612323A
公开(公告)日：1952-09-30
申请号：US7316249
申请日：1949-01-27
申请人： HONEYWELL REGULATOR CO
发明人： BARNES JR GEORGE W
IPC分类号： G01D15/24 , G01R13/00 , G06G7/04
CPC分类号： G01R13/00 , G01D15/24 , G06G7/04

53. 发明授权

US09268973B2 Sensor output correction circuit, sensor output correction device, and sensor output correction method 有权
标题翻译：传感器输出校正电路，传感器输出校正装置和传感器输出校正方法
公开(公告)号：US09268973B2
公开(公告)日：2016-02-23
申请号：US13719495
申请日：2012-12-19
申请人： Konosuke Yamamoto , Yoichi Kimura
发明人： Konosuke Yamamoto , Yoichi Kimura
IPC分类号： G01R31/00 , G06G7/04 , H03M3/00
CPC分类号： G06G7/04 , H03M3/388 , H03M3/458
摘要： A sensor output correction circuit includes an analog-to-digital converter configured to receive an input voltage corresponding to a sensor output of a sensor and a reference voltage that are selectively input to the analog-to-digital converter; and an arithmetic unit configured to correct output data, which is output from the analog-to-digital converter when the input voltage is input to the analog-to-digital converter, based on an output value that is output from the analog-to-digital converter when the reference voltage is input to the analog-to-digital converter. The arithmetic unit includes a multiply adder and a non-restoring divider.
摘要翻译：传感器输出校正电路包括被配置为接收对应于传感器的传感器输出的输入电压和选择性地输入到模数转换器的参考电压的模拟 - 数字转换器; 以及算术单元，被配置为基于从所述模数转换器输出的输出值，校正从所述模数转换器输出的所述输出数据，所述输出数据在所述输入电压被输入到所述模数转换器时，数字转换器，当参考电压输入到模数转换器时。算术单元包括乘法加法器和非恢复分频器。

54. 发明授权

US09009454B2 Secure operating system loader 有权
标题翻译：安全操作系统加载程序
公开(公告)号：US09009454B2
公开(公告)日：2015-04-14
申请号：US11716189
申请日：2007-03-09
申请人： Juan I. Martinez , William P. Swaney
发明人： Juan I. Martinez , William P. Swaney
IPC分类号： G06F15/177 , G06G7/04 , H04L9/32 , G06F21/57
CPC分类号： H04L9/3271 , G06F21/575
摘要： In one embodiment a computing device comprises a processor, a memory module coupled to the process and comprising logic instructions stored in a computer readable medium which, when executed, configure the processor to initiate boot operations in a computing device, present an authentication challenge when authentication is required to boot the computing device, continue boot operations in response to a successful response to the authentication challenge, and invoke an error routine in response to an unsuccessful response to the authentication challenge.
摘要翻译：在一个实施例中，计算设备包括处理器，耦合到该过程的存储器模块，并且包括存储在计算机可读介质中的逻辑指令，当执行该逻辑指令时，将处理器配置为在计算设备中启动引导操作，当认证需要引导计算设备，响应于对认证挑战的成功响应来继续引导操作，并响应于对认证挑战的不成功的响应来调用错误例程。

55. 发明申请

US20130257509A1 SIGNAL PROCESSING APPARATUS 有权
标题翻译：信号处理装置
公开(公告)号：US20130257509A1
公开(公告)日：2013-10-03
申请号：US13544444
申请日：2012-07-09
申请人： Kun-Yin WANG , Tao-Yao CHANG , Chorng-Kuang WANG , Shen-Iuan LIU
发明人： Kun-Yin WANG , Tao-Yao CHANG , Chorng-Kuang WANG , Shen-Iuan LIU
IPC分类号： G06G7/04
CPC分类号： G06G7/04 , H03F3/602
摘要： The signal processing apparatus contains a first signal transforming circuit and a second signal transforming circuit. The first signal transforming circuit includes four first coupled lines and two second coupled lines, wherein two ends of each first coupled line are configured to carry a first pair of differential signals respectively, each second coupled line is magnetically coupled to two of the first coupled lines in parallel and comprises two signal ports, to which the two ends of each of the magnetically-coupled first coupled lines are placed symmetrically for transferring a second pair of differential signals. The second signal transforming circuit is configured to convert between the second pairs of differential signals at the signal ports and a third pair of differential signals at connecting ports of the second signal transforming circuit.
摘要翻译：信号处理装置包含第一信号变换电路和第二信号变换电路。第一信号变换电路包括四个第一耦合线和两个第二耦合线，其中每个第一耦合线的两端被配置为分别承载第一对差分信号，每个第二耦合线被磁耦合到两个第一耦合线并联并且包括两个信号端口，每个磁耦合的第一耦合线的两端对称地放置在其上以传送第二对差分信号。第二信号变换电路被配置为在信号端口处的第二对差分信号和第二信号变换电路的连接端口处的第三对差分信号之间进行转换。

56. 发明授权

US08429235B2 Apparatus and method for precluding e-mail distribution 有权
标题翻译：排除电子邮件分发的设备和方法
公开(公告)号：US08429235B2
公开(公告)日：2013-04-23
申请号：US12258506
申请日：2008-10-27
申请人： Bronwyn Syiek , Nina Bhanap , Rakesh Gowda , Ramesh Guntha
发明人： Bronwyn Syiek , Nina Bhanap , Rakesh Gowda , Ramesh Guntha
IPC分类号： G06F15/16 , G06F15/173 , G06F17/30 , G06F21/00 , G06G7/04 , H04L29/06 , H04L9/32
CPC分类号： H04L51/28 , H04L51/12
摘要： E-mail addresses are converted by a hashing function into hash codes. An e-mail mass mailer that can have millions of addresses hash codes all addresses to which a message might be sent to form a first list. An entity that wishes to exclude delivery of a message to various e-mail addresses, hash codes such addresses to form a second list. Hash codes in the first list that are also in the second list are purged from the first list to yield a third list of hash codes, each of which represents an e-mail address to which a message may be sent.
摘要翻译：电子邮件地址由哈希函数转换成哈希码。一个可以拥有数百万个地址的电子邮件群发邮件哈希代码可以发送消息的所有地址形成第一个列表。希望将消息传递到各种电子邮件地址的实体，哈希码这样的地址以形成第二列表。第一列表中也在第二列表中的哈希码从第一列表中清除，以产生第三个哈希码列表，每个哈希码表示可以发送消息的电子邮件地址。

57. 发明授权

US08037522B2 Security level establishment under generic bootstrapping architecture 有权
标题翻译：通用引导架构下的安全级别建立
公开(公告)号：US08037522B2
公开(公告)日：2011-10-11
申请号：US11727186
申请日：2007-03-23
申请人： Silke Holtmanns , Pekka Laitinen
发明人： Silke Holtmanns , Pekka Laitinen
IPC分类号： G06G7/04
CPC分类号： H04L63/105 , H04L63/205 , H04W12/02 , H04W12/06
摘要： Security level establishment for an application in a terminal equipment under a generic bootstrapping architecture offering a plurality of different bootstrapping mechanisms, the terminal equipment comprising a credential establishment entity and an application entity, comprising a request for a credential for the application from the application entity to the credential establishment entity and a response from the credential establishment entity to the application entity, wherein the response comprises the requested credential and credential quality information.
摘要翻译：提供多个不同引导机制的通用引导架构下的终端设备中的应用的安全级别建立，所述终端设备包括凭证建立实体和应用实体，包括从应用实体到应用的凭证的请求，证书建立实体和从凭证建立实体到应用实体的响应，其中响应包括所请求的凭证和凭证质量信息。

58. 发明授权

US07958539B2 System and method for providing secure access to password-protected resources 有权
标题翻译：提供对密码保护资源的安全访问的系统和方法
公开(公告)号：US07958539B2
公开(公告)日：2011-06-07
申请号：US11567463
申请日：2006-12-06
申请人： Nick E. Gavrilos , William S. Hede , Hisashi D. Watanabe
发明人： Nick E. Gavrilos , William S. Hede , Hisashi D. Watanabe
IPC分类号： G06G7/04
CPC分类号： G06F21/31 , G06F2221/2103
摘要： A method of a wireless communication device for accessing secure resources of a resource provider. For one embodiment, a password associated with the wireless communication device is partitioned into a plurality of portions, such as individual alphanumeric characters. A multiple choice question is queried for each portion of the password. Access is granted in response to determining that all portions of the password have been answered correctly by the user. For another embodiment, the password is presented as one of choices for a multiple choice question for a session where the user attempts to access the secure resources. The choices for the query remain the same for each session, but the order in which these choices are presented changes from session-to-session.
摘要翻译：一种用于访问资源提供商的安全资源的无线通信设备的方法。对于一个实施例，与无线通信设备相关联的密码被划分成多个部分，例如单独的字母数字字符。查询密码的每个部分的多项选择问题。响应确定密码的所有部分已被用户正确应答，授予访问权限。对于另一个实施例，密码被呈现为用户尝试访问安全资源的会话的多项选择问题的选择之一。查询的选项对于每个会话保持不变，但是这些选项的显示顺序会从会话到会话更改。

59. 发明授权

US4074357A Analog control and digital system with integrated interface for electric power and other plants 失效
标题翻译：具有电力和其他植物综合接口的模拟控制和数字系统
公开(公告)号：US4074357A
公开(公告)日：1978-02-14
申请号：US705631
申请日：1976-07-15
申请人： Rash B. Gupta , David L. Armstrong
发明人： Rash B. Gupta , David L. Armstrong
IPC分类号： G05B15/02 , G06G7/04 , H02P9/00 , F02C9/02
CPC分类号： G06G7/04
摘要： An analog control system and a digital system are provided with an integrated interface for the input/output signals used in monitoring and controlling an electric power plant. Plant analog and digital inputs are processed through circuitry which provides input signals compatible for use in both the analog and the digital systems. Analog and digital outputs are similarly processed through circuitry which provides compatible signals. Output signals are directly applied from the analog control to the digital system or vice versa without need for buffering.

60. 发明授权

US3947672A Digital delay line correlator 失效
公开(公告)号：US3947672A
公开(公告)日：1976-03-30
申请号：US234596
申请日：1972-03-14
申请人： Raymond E. Harrison , Marvin L. Kiss , Douglas E. Ott
发明人： Raymond E. Harrison , Marvin L. Kiss , Douglas E. Ott
IPC分类号： G06F17/15 , G06G7/04
CPC分类号： G06F17/15
摘要： The correlator disclosed herein detects in a stream of input pulses a plurality of sequences of time spaced signals, each of the plurality of sequences having a different one of a plurality of pulse repetition intervals disposed within a given pulse repetition interval range. This is accomplished by clocking the input pulses into a first shift register by a first clock pulse having a given frequency. N groups of n bistable stages (N being an integer greater than one and n being an integer greater than zero) are disposed at different spaced time positions along the first register corresponding to the pulse repetition intervals and the pulse repetition interval range. First logic circuitry is coupled to each of the N groups of n stages to provide an output pulse when the time spaced pulses of the plurality of sequences of time spaced pulses are simultaneously present at appropriate ones of the n stages of a given number of the N groups of n stages. A second shift register receives on its input stage the output pulse from the first logic circuitry. The output pulse is clocked through the second register by a second clock pulse having the given frequency but phase shifted relative to the first clock pulse. The length of the second register is determined by the plurality of pulse repetition intervals. A plurality of stages at the end of the second register produce through second logic circuitry a gate pulse which predicts when the next pulse of each of the plurality of sequences should occur. Several embodiments are disclosed which enable the production of the output signal from the first logic circuitry when all the pulses of the plurality of sequences are present or when there is a pulse missing from any of the plurality of sequences. An additional embodiment is disclosed which enables the detection of M plurality of sequences of time spaced pulses when only (N-1) out of N pulses of each of the M plurality of sequences are present employing M first logic circuitry. A gate signal is produced by the second register and second logic circuitry for each of the output signals from the M first logic circuitry to predict when the next pulse of each of the plurality of sequences of the M plurality of sequence should occur.

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