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51. 发明申请

US20140211574A1 VOLTAGE DIVIDER CONTROL CIRCUIT 有权
标题翻译：电压分压器控制电路
公开(公告)号：US20140211574A1
公开(公告)日：2014-07-31
申请号：US13751240
申请日：2013-01-28
申请人： Taiwan Semiconductor Manufacturing Company Limited
发明人： Yangsyu Lin , Hsin-Hsin Ko , Chiting Cheng , Jonathan Tsung-Yung Chang
IPC分类号： H03K17/284 , G11C7/00
CPC分类号： H03K17/284 , G11C7/00 , G11C11/417 , H03K17/04123
摘要： One or more techniques or systems for controlling a voltage divider are provided herein. In some embodiments, a control circuit is configured to bias a pull up unit of a voltage divider using an analog signal, thus enabling the voltage divider to be level tunable. In other words, the control circuit enables the voltage divider to output multiple voltage levels. Additionally, the control circuit is configured to bias the pull up unit based on a bias timing associated with a pull down unit of the voltage divider. For example, the pull up unit is activated after the pull down unit is activated. In this manner, the control circuit provides a timing boost, thus enabling the voltage divider to stabilize more quickly.
摘要翻译：本文提供了用于控制分压器的一种或多种技术或系统。在一些实施例中，控制电路被配置为使用模拟信号来偏置分压器的上拉单元，从而使分压器能够可调。换句话说，控制电路使得分压器能够输出多个电压电平。另外，控制电路被配置为基于与分压器的下拉单元相关联的偏置定时偏压上拉单元。例如，下拉单元启动后，上拉单元被激活。以这种方式，控制电路提供定时提升，从而使得分压器能够更快地稳定。

52. 发明申请

US20120176177A1 SWITCH WITH IMPROVED EDGE RATE CONTROL 审中-公开
标题翻译：具有改进的边缘速率控制的开关
公开(公告)号：US20120176177A1
公开(公告)日：2012-07-12
申请号：US13344184
申请日：2012-01-05
申请人： Garret Phillips
发明人： Garret Phillips
IPC分类号： H03K17/284
CPC分类号： H03K17/163 , H03K2217/0018 , H03K2217/0054
摘要： This documents discusses, among other things, apparatus and methods for a switch circuit including a break-before-make delay and a gradual turn-on. In an example, a switch circuit can include a switch transistor having a control node and coupled to a first node and a second node, a delay circuit configured to receive control information and to provide the control information after a delay interval, and a gradual turn-on circuit configured to receive the delayed control information from the delay circuit and to transition the transistor from the off-state to the on-state over a ramp interval in response to the delayed control information.
摘要翻译：本文件还讨论了包括断开延迟和逐渐导通的开关电路的装置和方法。在一个示例中，开关电路可以包括具有控制节点并耦合到第一节点和第二节点的开关晶体管，延迟电路，被配置为接收控制信息并且在延迟间隔之后提供控制信息，并且逐渐转动 - 被配置为响应于延迟的控制信息，从延迟电路接收延迟的控制信息并且在斜坡间隔上将晶体管从截止状态转换到接通状态。

53. 发明申请

US20120176176A1 Resonant Gate Drive Circuit For A Power Switching Device In A High Frequency Power Converter 失效
标题翻译：用于高频功率转换器中的电源开关器件的谐振栅极驱动电路
公开(公告)号：US20120176176A1
公开(公告)日：2012-07-12
申请号：US13211481
申请日：2011-08-17
申请人： Mahesh M. Swamy , Tsuneo Joe Kume
发明人： Mahesh M. Swamy , Tsuneo Joe Kume
IPC分类号： H03K17/284 , H03K17/56
CPC分类号： H03K17/785 , H03K17/04123 , H03K2217/0054 , H03K2217/009
摘要： A resonant gate drive circuit for a power switching device, having a gate-emitter capacitance, is adapted for use with a high frequency power converter. The resonant gate drive circuit comprises a signal input source, a power supply and a resonant inductor. An electrical isolator is connected between the signal input source and a switching node. The electrical isolator is connected to the power supply. A first bidirectional switch is connected between the resonant inductor and the power switching device and includes a first switch control circuit connected to the node to be controlled by a signal from the signal input source. A second bidirectional switch is connected between the power supply and the power switching device and includes a second switch control circuit connected to the node to be controlled by the signal from the input source. The first and second control circuits are adapted to control the first bidirectional switch to provide a first charge path during a resonant period from the resonant inductor to the gate-emitter capacitance defining a quick resonant charge path and to control the second bidirectional switch to provide a second charge path defining a voltage equalization charge path subsequent to the resonant period.
摘要翻译：用于具有栅极 - 发射极电容的功率开关器件的谐振栅极驱动电路适于与高频功率转换器一起使用。谐振栅极驱动电路包括信号输入源，电源和谐振电感器。电隔离器连接在信号输入源和交换节点之间。电气隔离器连接到电源。第一双向开关连接在谐振电感器和功率开关装置之间，并且包括连接到要由信号输入源的信号控制的节点的第一开关控制电路。第二双向开关连接在电源和电源开关装置之间，并且包括连接到要由来自输入源的信号控制的节点的第二开关控制电路。第一和第二控制电路适于控制第一双向开关以在从谐振电感器到限定快速谐振充电路径的栅 - 发射极电容的谐振周期期间提供第一充电路径，并且控制第二双向开关以提供第二电荷路径限定谐振周期之后的电压均衡充电路径。

54. 发明申请

US20090153224A1 CIRCUIT FOR TURNING ON MOTHERBOARD 失效
标题翻译：电路板驱动电路
公开(公告)号：US20090153224A1
公开(公告)日：2009-06-18
申请号：US11960741
申请日：2007-12-20
申请人： JIN-LIANG XIONG
发明人： JIN-LIANG XIONG
IPC分类号： H03K17/284
CPC分类号： G06F11/24
摘要： An exemplary circuit for turning on a motherboard comprises a first switch module comprising a first terminal arranged to receive a standby power and connected to a sixth terminal of a computer front panel header, a second terminal arranged to receive the standby power, and a control terminal; a timing circuit charged by a system power; and a second switch module comprising a first terminal connected to the control terminal of the first switch module via the timing circuit, a second terminal arranged to receive the standby power, and a control terminal arranged to receive the system power, wherein, when the system power is lost, the second switch module discharges the timing circuit for turning on the first switch module after a discharge time, and the motherboard is turned on when the first switch module is turned on to ground the sixth terminal of the computer front panel header.
摘要翻译：用于打开母板的示例性电路包括第一开关模块，包括布置成接收备用电源并连接到计算机前面板接头的第六端子的第一端子，被布置为接收待机电力的第二端子和控制端子 ; 由系统电源充电的定时电路; 以及第二开关模块，包括经由所述定时电路连接到所述第一开关模块的控制端子的第一端子，被布置为接收所述备用电力的第二端子和布置成接收所述系统电力的控制端子，其中，当所述系统电源丢失，第二开关模块放电定时电路，用于在放电时间之后接通第一开关模块，并且当第一开关模块接通时将主板接通以使计算机前面板接头的第六端接地。

55. 发明授权

US07187227B2 Driver circuit 失效
标题翻译：驱动电路
公开(公告)号：US07187227B2
公开(公告)日：2007-03-06
申请号：US10636381
申请日：2003-08-06
申请人： Yohtaro Umeda , Atsushi Kanda
发明人： Yohtaro Umeda , Atsushi Kanda
IPC分类号： H03K17/284
CPC分类号： H03K17/04123 , H03K17/102
摘要： A driver circuit includes first and second three-terminal active elements, and first and second delay units. The first and second three-terminal active elements are series-connected. Each of the first and second three-terminal active elements has an amplification function and first, second, and third electrodes. The second and third electrodes of each three-terminal active element are series-connected between the first and second potentials. The first and second delay units receive the same input signal. The outputs of the first and second delay units are respectively connected to the first electrodes of the first and second three-terminal active elements. The delay amount of the second delay unit is larger than that of the first delay unit. The delay amount of the first delay unit is a finite value including zero.
摘要翻译：驱动器电路包括第一和第二三端有源元件以及第一和第二延迟单元。第一和第二三端有源元件串联连接。第一和第二三端有源元件中的每一个具有放大功能和第一，第二和第三电极。每个三端有源元件的第二和第三电极串联连接在第一和第二电位之间。第一和第二延迟单元接收相同的输入信号。第一和第二延迟单元的输出分别连接到第一和第二三端有源元件的第一电极。第二延迟单元的延迟量大于第一延迟单元的延迟量。第一延迟单元的延迟量是包括零的有限值。

56. 发明授权

US6163191A Writing signal timer output circuit which includes a bistable timer signal generator 失效
标题翻译：写入信号定时器输出电路，包括双稳态定时器信号发生器
公开(公告)号：US6163191A
公开(公告)日：2000-12-19
申请号：US94969
申请日：1998-06-12
申请人： Masanori Miyagi
发明人： Masanori Miyagi
IPC分类号： G11C16/02 , G11C16/06 , H03K3/0231 , H03K17/284 , H03K3/356
CPC分类号： H03K17/284 , H03K3/0231
摘要： In a non-volatile memory capable of electrically rewriting data, a timer circuit for determining writing time that is operable at any time at a voltage of under 1.0 V. The timing circuit has a regulated voltage circuit for outputting a regulated output voltage no greater than 1.0 V, a constant current circuit for producing a constant current having a value determined by the regulated output voltage, a voltage comparing circuit for comparing an input voltage input to one terminal with a reference voltage input to another terminal, and a capacitive element connected to a constant current output terminal of the constant current circuit. A connecting point of the constant current output terminal of the constant current circuit and the capacitive element is connected as the input voltage to the voltage comparing circuit, so that a desired time period is determined by comparing a voltage to the terminal of the voltage comparing circuit connected to the capacitive element with the reference voltage connected to the other terminal of the comparing circuit.
摘要翻译：在能够电气重写数据的非易失性存储器中，定时器电路用于确定在1.0V的电压下随时可操作的写入时间。定时电路具有调节电压电路，用于输出不大于 1.0V，用于产生具有由调节输出电压确定的值的恒定电流的恒流电路，用于将输入到一个端子的输入电压与输入到另一个端子的参考电压进行比较的电压比较电路和连接到恒流电路的恒流输出端。将恒流电路和电容元件的恒流输出端子的连接点作为输入电压连接到电压比较电路，从而通过将电压与电压比较电路的端子进行比较来确定期望的时间段连接到电容元件，参考电压连接到比较电路的另一端。

57. 发明授权

US5963072A Discrete programmable one-shot timed pulse circuit 失效
标题翻译：离散可编程单稳定时脉冲电路
公开(公告)号：US5963072A
公开(公告)日：1999-10-05
申请号：US989802
申请日：1997-12-12
申请人： Stuart A. Koch , David F. Haggitt
发明人： Stuart A. Koch , David F. Haggitt
IPC分类号： B60R22/44 , H03K17/284 , H03K5/13
CPC分类号： B60R22/44 , H03K17/284
摘要： The disclosure relates to an electrical circuit used in automotive passenger restraint systems. The circuit utilizes reliable and inexpensive electrical components to provide one-shot actuation of a load. In addition, the circuit allows for very low quiescent current draw, making it ideal for automotive applications.
摘要翻译：本公开涉及用于汽车乘客约束系统中的电路。该电路使用可靠且廉价的电气元件来提供负载的单次致动。此外，该电路允许非常低的静态电流消耗，使其成为汽车应用的理想选择。

58. 发明授权

US5736769A Semiconductor apparatus 失效
标题翻译：半导体装置
公开(公告)号：US5736769A
公开(公告)日：1998-04-07
申请号：US652115
申请日：1996-05-23
申请人： Akira Nishiura , Tatsuhiko Fujihira
发明人： Akira Nishiura , Tatsuhiko Fujihira
IPC分类号： H01L29/78 , H01L21/336 , H01L27/02 , H01L27/04 , H01L27/06 , H03K17/08 , H03K17/284 , H01L29/76
CPC分类号： H01L29/66712 , H01L27/0248 , H01L29/7395 , H01L29/7804 , H01L29/0696
摘要： A semiconductor apparatus includes an insulated gate semiconductor device used as a power device and a pn diode used as a temperature sensor on a single semiconductor substrate. Heat generated in the power device is conducted to the temperature sensor. The voltage across a forward biased pn diode fed by a constant current source is sensitive to temperature. The temperature of the power device is measured by feeding a small current from a constant current supply to the pn diode and by detecting the forward voltage of the pn diode. When the forward voltage reaches a predetermined value, an external protection circuit is activated to prevent overheating. Multiple pn diodes may be connected in series to detect the temperature of multiple power devices more accurately.
摘要翻译：半导体装置包括用作功率器件的绝缘栅半导体器件和用作单个半导体衬底上的温度传感器的pn二极管。在功率器件中产生的热量传导到温度传感器。由恒流源馈送的正向偏置pn二极管的电压对温度敏感。通过从pn二极管的恒流源供给小电流，并通过检测pn二极管的正向电压来测量功率器件的温度。当正向电压达到预定值时，外部保护电路被激活以防止过热。多个pn二极管可以串联连接，以更准确地检测多个功率器件的温度。

59. 发明授权

US5712776A Starting circuit and method for starting a MOS transistor 失效
标题翻译：用于启动MOS晶体管的启动电路和方法
公开(公告)号：US5712776A
公开(公告)日：1998-01-27
申请号：US688296
申请日：1996-07-30
申请人： Sergio Palara , Vito Graziano
发明人： Sergio Palara , Vito Graziano
IPC分类号： H02M7/5383 , H03K17/16 , H03K17/284 , H05B41/282 , H02M7/122
CPC分类号： H05B41/2825 , H02M7/5383 , H03K17/166 , H03K17/284
摘要： A start up circuit causes a MOS transistor to be turned on by sensing local electrical quantities thereof, specifically the potential at the drain terminal of the MOS transistor. A small current is injected into the control terminal of the MOS transistor when the potential at the drain terminal is high. For the purpose, an electric network is arranged to couple these two terminals together.
摘要翻译：启动电路通过感测其局部电量，特别是MOS晶体管的漏极端子处的电位，使MOS晶体管导通。当漏极端子的电位高时，将小电流注入MOS晶体管的控制端。为了这个目的，布置一个电网将这两个终端耦合在一起。

60. 发明授权

US5523711A Signal delaying outputting circuit 失效
标题翻译：信号延迟输出电路
公开(公告)号：US5523711A
公开(公告)日：1996-06-04
申请号：US358592
申请日：1994-12-14
申请人： Tsuyoshi Tachiyama
发明人： Tsuyoshi Tachiyama
IPC分类号： H03K17/14 , H03K17/16 , H03K17/284 , H03K17/687 , H03K5/13
CPC分类号： H03K17/284 , H03K17/145
摘要： A signal delaying outputting circuit is disclosed which can prevent an excessive increase in dead time at a high temperature without requiring a large chip area. The signal delaying outputting circuit comprises a first invertor circuit driven by an input signal, and a second invertor circuit driven by an output signal of the first invertor circuit. A first auxiliary MOS FET of the same channel type as that of one of two first p- and n-channel MOS FETs of the first invertor circuit is provided in the first converter circuit in an integral continuous relationship with the one MOS FET such that they have separate gates from each other but have a common source or drain. A second auxiliary MOS FET of the same channel type as that of one of second p- and n-channel MOS FETs of the second invertor circuit but different from that of the first auxiliary MOS FET is provided in the second invertor circuit in an integral continuous relationship such that they have separate gates from each other but have a common source or drain. The first and second auxiliary MOS FETs are switched in response to a binary output signal of a temperature detection circuit.
摘要翻译：公开了一种信号延迟输出电路，其可以防止在高温下死区时间的过度增加，而不需要大的芯片面积。信号延迟输出电路包括由输入信号驱动的第一反相器电路和由第一反相器电路的输出信号驱动的第二反相器电路。与第一反相器电路的两个第一p沟道MOS晶体管和第n沟道MOS FET之一相同的沟道类型的第一辅助MOS FET以与该一个MOS FET成一体连续关系的方式设置在第一转换器电路中，使得它们有彼此分开的门，但有一个共同的来源或排水。与第一反相器电路的第二p型和n沟道MOS FET之一相同的沟道类型的第二辅助MOS FET与第一辅助MOS FET的第二辅助MOSFET相比，在第二反相器电路中以整体连续的方式设置关系使得它们彼此具有分离的栅极，但是具有共同的源或漏极。响应于温度检测电路的二进制输出信号来切换第一和第二辅助MOS FET。

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