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61. 发明授权

US08537723B2 LTE-Advanced (4G) front end radio architecture 有权
标题翻译： LTE-Advanced（4G）前端射频架构
公开(公告)号：US08537723B2
公开(公告)日：2013-09-17
申请号：US13045604
申请日：2011-03-11
申请人： Nadim Khlat
发明人： Nadim Khlat
IPC分类号： H04B7/00
CPC分类号： H03F3/24 , H03F3/189 , H03F3/211 , H03F3/68 , H03F2200/222 , H03F2200/249 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03F2200/451 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2200/81
摘要： A front end radio architecture (FERA) is disclosed that includes a power amplifier (PA). The PA includes first and second input terminals and first and second output terminals and a PA die having first and second half amplifier cells, each of which includes an output amplifier stage. The first and second half amplifier cells are coupled to the first and second input terminals. First and second PA transformers each include first, second, and third windings. The first windings are coupled to the output amplifier stages. The second winding of the first PA transformer is coupled to the first output terminal of the PA and also coupled in series with the second winding of the second PA transformer. The third winding of the first PA transformer is coupled in series with the third winding of the second PA transformer, with one end of the second PA transformer being coupled to the second output terminal of the PA.
摘要翻译：公开了一种包括功率放大器（PA）的前端无线电架构（FERA）。 PA包括第一和第二输入端子以及第一和第二输出端子以及具有第一和第二半放大器单元的PA管芯，每个具有输出放大器级。第一和第二半放大器单元耦合到第一和第二输入端。第一和第二PA变压器各自包括第一，第二和第三绕组。第一绕组耦合到输出放大器级。第一PA变压器的第二绕组耦合到PA的第一输出端，并且与第二PA变压器的第二绕组串联耦合。第一PA变压器的第三绕组与第二PA变压器的第三绕组串联耦合，第二PA变压器的一端耦合到PA的第二输出端。

62. 发明授权

US08536931B2 BI-FET cascode power switch 有权
标题翻译： BI-FET共源共栅电源开关
公开(公告)号：US08536931B2
公开(公告)日：2013-09-17
申请号：US13525927
申请日：2012-06-18
申请人： Kevin W. Kobayashi , Joseph Johnson
发明人： Kevin W. Kobayashi , Joseph Johnson
IPC分类号： H03K17/60
CPC分类号： H03K17/567 , H01L21/8249 , H01L27/0605 , H01L27/0623 , H01L27/0883 , H01L29/2003 , H01L29/778 , H03K17/04123
摘要： Power switch devices for high-speed applications are disclosed. The power switch device includes a depletion mode field effect transistor (D-FET), an enhancement mode field effect transistor (E-FET) and a bipolar transistor. In one embodiment, the E-FET is coupled in cascode with the D-FET such that turning off the E-FET turns off the D-FET and turning on the E-FET turns on the D-FET. Furthermore, the bipolar transistor is operably associated with the D-FET and the E-FET such that turning on the bipolar transistor drives current from the D-FET through the bipolar transistor to the E-FET to provide a charge that turns on the E-FET. The bipolar transistor provides several advantages such as a higher Schottky breakdown voltage for the E-FET and faster current switching speed for the power switch device.
摘要翻译：公开了用于高速应用的电源开关装置。功率开关器件包括耗尽型场效应晶体管（D-FET），增强型场效应晶体管（E-FET）和双极晶体管。在一个实施例中，E-FET与D-FET共模耦合，使得截止E-FET的截止关闭D-FET并导通D-FET上的E-FET导通。此外，双极晶体管可操作地与D-FET和E-FET相关联，使得双极晶体管的导通驱动从D-FET通过双极晶体管到E-FET的电流，以提供导通E -FET。双极晶体管提供了几个优点，例如用于E-FET的更高的肖特基击穿电压以及功率开关器件的更快的电流切换速度。

63. 发明申请

US20130234793A1 SPLIT VCC AND COMMON VCC POWER MANAGEMENT ARCHITECTURE FOR ENVELOPE TRACKING 有权
标题翻译：分离VCC和通用VCC电源管理架构进行包络跟踪
公开(公告)号：US20130234793A1
公开(公告)日：2013-09-12
申请号：US13602856
申请日：2012-09-04
申请人： Nadim Khlat , Michael R. Kay , Philippe Gorisse
发明人： Nadim Khlat , Michael R. Kay , Philippe Gorisse
IPC分类号： H03G1/00
CPC分类号： H03G1/00 , H03F1/0227
摘要： An envelope tracking power supply and transmitter control circuitry are disclosed. The transmitter control circuitry receives a first envelope power supply control signal and a second envelope power supply control signal. The envelope tracking power supply operates in one of a group of operating modes, which includes a first operating mode and a second operating mode. During both the first operating mode and the second operating mode, a first envelope power supply signal is provided to a driver stage based on the first envelope power supply control signal. During the first operating mode, a second envelope power supply signal is provided to a final stage based on the first envelope power supply control signal. However, during the second operating mode, the second envelope power supply signal is provided to the final stage based on the second envelope power supply control signal.
摘要翻译：公开了一种包络跟踪电源和发射机控制电路。发射机控制电路接收第一包络电源控制信号和第二包络电源控制信号。信封跟踪电源以包括第一操作模式和第二操作模式的一组操作模式中的一种操作。在第一操作模式和第二操作模式期间，基于第一包络电源控制信号将第一包络电源信号提供给驱动器级。在第一操作模式期间，第二包络电源信号基于第一包络电源控制信号提供到最后级。然而，在第二操作模式期间，第二包络电源信号基于第二包络电源控制信号提供到最后级。

64. 发明授权

US08531255B2 Two-track surface acoustic wave device with interconnecting grating 有权
标题翻译：具有互连光栅的双轨声表面波装置
公开(公告)号：US08531255B2
公开(公告)日：2013-09-10
申请号：US12966658
申请日：2010-12-13
申请人： Aleh Loseu
发明人： Aleh Loseu
IPC分类号： H03H9/64
CPC分类号： H03H9/64 , H04R23/00 , H04R31/00
摘要： The present disclosure relates to a two-track surface acoustic wave (SAW) device that has a first SAW track and a second SAW track. The second SAW track may include an interconnecting grating that divides an acoustic cavity of the second SAW track into two acoustic cavities, which are acoustically coupled to one another. The first SAW track and the second SAW track may be electrically coupled to one another transversally via a first re-radiation interconnection and a second re-radiation interconnection. When the two-track SAW device is used in a bandpass filter, by including the interconnecting grating, insertion loss and roll-off response characteristics of the bandpass filter may be improved. Further, in one embodiment of the two-track SAW device, addition of capacitance between the re-radiation connections may improve return loss of the two-track SAW device.
摘要翻译：本公开涉及具有第一SAW轨道和第二SAW轨道的双轨表面声波（SAW）装置。第二SAW轨道可以包括互连光栅，其将第二SAW轨道的声腔划分成彼此声学耦合的两个声腔。第一SAW轨道和第二SAW轨道可以经由第一重新辐射互连和第二重新辐射互连横向电耦合。当双轨SAW器件用于带通滤波器时，通过包括互连光栅，可以提高带通滤波器的插入损耗和滚降响应特性。此外，在双轨SAW器件的一个实施例中，重新辐射连接之间的电容的增加可以改善双轨SAW器件的回波损耗。

65. 发明授权

US08525717B2 Half-bandwidth based quadrature analog-to-digital converter 有权
标题翻译：基于半带宽的正交模数转换器
公开(公告)号：US08525717B2
公开(公告)日：2013-09-03
申请号：US13209485
申请日：2011-08-15
申请人： Nadim Khlat
发明人： Nadim Khlat
IPC分类号： H03M1/12
CPC分类号： H03M3/40
摘要： A half-bandwidth based quadrature analog-to-digital converter (ADC) includes in-phase circuitry, quadrature-phase circuitry, and digital complex processing circuitry. The in-phase circuitry includes an in-phase pair of ADCs, which provide an in-phase pair of sub-quadrature output signals, based on an analog in-phase input signal. Similarly, the quadrature-phase circuitry includes a quadrature-phase pair of ADCs, which provide a quadrature-phase pair of sub-quadrature output signals based on an analog quadrature-phase input signal. The digital complex processing circuitry combines, filters, and restructures the in-phase pair of sub-quadrature output signals and the quadrature-phase pair of sub-quadrature output signals to provide a digital in-phase output signal and a digital quadrature-phase output signal. Each of the in-phase pair of ADCs has about an ADC bandwidth. The in-phase circuitry has an input bandwidth, which is about equal to two times the ADC bandwidth in one embodiment of the in-phase circuitry.
摘要翻译：基于半带宽的正交模数转换器（ADC）包括同相电路，正交相电路和数字复合处理电路。同相电路包括基于模拟同相输入信号提供同相对的正交输出信号的同相ADC对。类似地，正交相电路包括正交相位对的ADC，其基于模拟正交相位输入信号提供正交相位对的子正交输出信号。数字复合处理电路组合，滤波和重组亚相位输出信号的同相对和子正交输出信号的正交相对，以提供数字同相输出信号和数字正交相输出信号。 ADC的每个同相对具有ADC带宽。同相电路具有在同相电路的一个实施例中约等于ADC带宽的两倍的输入带宽。

66. 发明授权

US08503953B2 Quadrature power amplifier architecture 有权
公开(公告)号：US08503953B2
公开(公告)日：2013-08-06
申请号：US13090663
申请日：2011-04-20
申请人： Terry J. Stockert
发明人： Terry J. Stockert
IPC分类号： H01Q11/12 , H04B1/04
摘要： The present disclosure relates to a quadrature RF power amplifier (PA) architecture that uses a single-ended interface to couple a non-quadrature PA path to a quadrature PA path, which may be coupled to an antenna via an antenna port. The quadrature nature of the quadrature PA path provides tolerance for changes in antenna loading conditions. An RF splitter in the quadrature PA path presents a relatively stable input impedance, which is predominantly resistive, to the non-quadrature PA path over a wide frequency range, thereby substantially isolating the non-quadrature PA path from changes in the antenna loading conditions. Further, the input impedance substantially establishes a load line slope of a feeder PA stage in the non-quadrature PA path, thereby simplifying the quadrature RF PA architecture. One embodiment of the quadrature RF PA architecture uses two separate PA paths, either of which may incorporate a combined non-quadrature and quadrature PA architecture.

67. 发明申请

US20130177106A1 MULTIPLE FUNCTIONAL EQUIVALENCE DIGITAL COMMUNICATIONS INTERFACE 有权
标题翻译：多功能等效数字通信接口
公开(公告)号：US20130177106A1
公开(公告)日：2013-07-11
申请号：US13773888
申请日：2013-02-22
申请人： RF Micro Devices, Inc.
发明人： Chris Levesque , Christopher Truong Ngo
IPC分类号： H04L27/36
CPC分类号： H04L27/367 , H03F1/0227 , H03F1/0261 , H03F1/0277 , H03F3/195 , H03F3/211 , H03F3/245 , H03F3/602 , H03F3/72 , H03F2200/171 , H03F2200/222 , H03F2200/27 , H03F2200/318 , H03F2200/336 , H03F2200/387 , H03F2200/411 , H03F2200/414 , H03F2200/417 , H03F2200/451 , H03F2200/504 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2203/21106 , H03F2203/21142 , H03F2203/21157
摘要： A multiple functional equivalence digital communications interface and a group of functional circuits are disclosed. The multiple functional equivalence digital communications interface presents a functional equivalence of each of a group of digital communications interfaces to a digital communications bus. Each functional equivalence of the group of digital communications interfaces is associated with a corresponding one of the group of functional circuits.
摘要翻译：公开了一种多功能等效数字通信接口和一组功能电路。多功能等效数字通信接口呈现一组数字通信接口中的每一个与数字通信总线的功能等同。数字通信接口组的每个功能等同物与一组功能电路中的对应的一个相关联。

68. 发明申请

US20130141068A1 AVERAGE POWER TRACKING CONTROLLER 有权
标题翻译：平均功率跟踪控制器
公开(公告)号：US20130141068A1
公开(公告)日：2013-06-06
申请号：US13747725
申请日：2013-01-23
申请人： RF Micro Devices, Inc.
发明人： Michael R. Kay , Nadim Khlat
IPC分类号： G05F1/46
CPC分类号： G05F1/46 , H02M1/14 , H02M2001/0067 , H03F1/0227 , H03F1/26 , H03F3/24 , H03F2200/351 , H03F2200/451 , H03F2200/504 , H04B15/005
摘要： This disclosure relates to radio frequency (RF) power converters and methods of operating the same. In one embodiment, an RF power converter includes an RF switching converter, a low-drop out (LDO) regulation circuit, and an RF filter. The RF filter is coupled to receive a pulsed output voltage from the RF switching converter and a supply voltage from the LDO regulation circuit. The RF filter is operable to alternate between a first RF filter topology and a second RF filter topology. In the first RF filter topology, the RF filter is configured to convert the pulsed output voltage from a switching circuit into the supply voltage. The RF filter in the second RF filter topology is configured to filter the supply voltage from the LDO regulation circuit to reduce a ripple variation in a supply voltage level of the supply voltage. As such, the RF filter provides greater versatility.
摘要翻译：本公开涉及射频（RF）功率转换器及其操作方法。在一个实施例中，RF功率转换器包括RF开关转换器，低压降（LDO）调节电路和RF滤波器。 RF滤波器被耦合以接收来自RF开关转换器的脉冲输出电压和来自LDO调节电路的电源电压。 RF滤波器可操作以在第一RF滤波器拓扑和第二RF滤波器拓扑之间交替。在第一RF滤波器拓扑中，RF滤波器被配置为将来自开关电路的脉冲输出电压转换成电源电压。第二RF滤波器拓扑中的RF滤波器被配置为对来自LDO调节电路的电源电压进行滤波，以减少电源电压的电源电压电平中的纹波变化。因此，RF滤波器提供更大的通用性。

69. 发明申请

US20130140678A1 INSULATOR LAYER BASED MEMS DEVICES 审中-公开
标题翻译：基于绝缘体层的MEMS器件
公开(公告)号：US20130140678A1
公开(公告)日：2013-06-06
申请号：US13749803
申请日：2013-01-25
申请人： RF Micro Devices, Inc.
发明人： Sangchae Kim , Tony Ivanov , Julio Costa
IPC分类号： B81B7/02 , B81C1/00
CPC分类号： B81B7/02 , B81C1/0015 , H01L27/101 , H03H3/0072 , H03H9/02433 , H03H9/2405
摘要： The present invention relates to using an insulator layer between two metal layers of a semiconductor die to provide a micro-electromechanical systems (MEMS) device, such as an ohmic MEMS switch or a capacitive MEMS switch. In an ohmic MEMS switch, the insulator layer may be used to reduce metal undercutting during fabrication, to prevent electrical shorting of a MEMS actuator to a MEMS cantilever, or both. In a capacitive MEMS switch, the insulator layer may be used as a capacitive dielectric between capacitive plates, which are provided by the two metal layers. A fixed capacitive element may be provided by the insulator layer between the two metal layers. In one embodiment of the present invention, an ohmic MEMS switch, a capacitive MEMS switch, a fixed capacitive element, or any combination thereof may be integrated into a single semiconductor die.
摘要翻译：本发明涉及在半导体管芯的两个金属层之间使用绝缘体层来提供诸如欧姆MEMS开关或电容式MEMS开关的微机电系统（MEMS）器件。在欧姆MEMS开关中，绝缘体层可用于在制造过程中减少金属底切，以防止MEMS致动器对MEMS悬臂的电短路，或两者兼而有之。在电容MEMS开关中，绝缘体层可以用作由两个金属层提供的电容板之间的电容电介质。固定的电容元件可以由两个金属层之间的绝缘体层提供。在本发明的一个实施例中，欧姆MEMS开关，电容MEMS开关，固定电容元件或其任何组合可以集成到单个半导体管芯中。

70. 发明申请

US20130113286A1 FLOATING POWER CONVERTER 有权
标题翻译：浮动电源转换器
公开(公告)号：US20130113286A1
公开(公告)日：2013-05-09
申请号：US13660582
申请日：2012-10-25
申请人： RF Micro Devices, Inc.
发明人： Douglas R. Farrenkopf
IPC分类号： H02J1/00
CPC分类号： H02M3/1582 , H02J2001/008 , Y10T307/50
摘要： A floating power converter includes direct current to direct current (DC-DC) converter circuitry having at least one converter control terminal for receiving at least one control signal, a high side (H-S) converter input terminal, a low side (L-S) converter input terminal, and a converter output terminal. The floating power converter also has an H-S source selector configured to selectively couple either a first H-S voltage source or a second H-S voltage source to the H-S converter input terminal in response to a selector control signal. Moreover, an L-S source selector is configured to selectively couple either a first L-S voltage source or a second L-S voltage source to the L-S converter input terminal in response to the selector control signal.
摘要翻译：浮动功率转换器包括具有至少一个用于接收至少一个控制信号的转换器控制端的直流（DC-DC）转换器电路的直流电，高侧（HS）转换器输入端，低侧（LS）转换器输入端子和转换器输出端子。浮动功率转换器还具有H-S源选择器，其被配置为响应于选择器控制信号选择性地将第一H-S电压源或第二H-S电压源耦合到H-S转换器输入端。此外，L-S源选择器被配置为响应于选择器控制信号选择性地将L-S电压源或第二L-S电压源耦合到L-S转换器输入端。

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