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61. 发明授权

US09312140B2 Semiconductor structures having low resistance paths throughout a wafer 有权
公开(公告)号：US09312140B2
公开(公告)日：2016-04-12
申请号：US14281166
申请日：2014-05-19
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Jeffrey P. Gambino , Thomas J. Hartswick , Zhong-Xiang He , Anthony K. Stamper , Eric J. White
IPC分类号： H01L21/768 , H01L21/78 , H01L21/288 , H01L23/532 , H01L23/58
CPC分类号： H01L21/2885 , C25D3/38 , C25D5/10 , C25D7/123 , H01L21/28518 , H01L21/2855 , H01L21/28556 , H01L21/28568 , H01L21/288 , H01L21/32053 , H01L21/76802 , H01L21/76843 , H01L21/76846 , H01L21/7685 , H01L21/76873 , H01L21/76877 , H01L21/76879 , H01L21/76883 , H01L21/76885 , H01L21/76886 , H01L21/76898 , H01L21/78 , H01L23/485 , H01L23/522 , H01L23/5226 , H01L23/528 , H01L23/53209 , H01L23/53238 , H01L23/585 , H01L24/95 , H01L2225/06541 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure with low resistance conduction paths and methods of manufacture are disclosed. The method includes forming at least one low resistance conduction path on a wafer, and forming an electroplated seed layer in direct contact with the low resistance conduction path.

62. 发明授权

US09233831B2 Micro-electro-mechanical system (MEMS) structures and design structures 有权
公开(公告)号：US09233831B2
公开(公告)日：2016-01-12
申请号：US14520686
申请日：2014-10-22
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Christopher V. Jahnes , Anthony K. Stamper
IPC分类号： H01L29/84 , B81B3/00 , H01G5/18
CPC分类号： B81B3/001 , B81B3/0008 , B81B3/0013 , B81B2201/0221 , B81B2203/0109 , B81B2203/0118 , B81B2203/019 , B81C1/0015 , H01G5/18
摘要： Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming at least one fixed electrode on a substrate. The method further includes forming a Micro-Electro-Mechanical System (MEMS) beam with a varying width dimension, as viewed from a top of the MEMS beam, over the at least one fixed electrode.

63. 发明授权

US09171778B2 Dual-damascene process to fabricate thick wire structure 有权
标题翻译：双镶嵌工艺制造粗线结构
公开(公告)号：US09171778B2
公开(公告)日：2015-10-27
申请号：US14166274
申请日：2014-01-28
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Douglas D. Coolbaugh , Keith E. Downes , Peter J. Lindgren , Anthony K. Stamper
IPC分类号： H01L23/48 , H01L21/768 , H01L23/522 , H01L49/02
CPC分类号： H01L23/481 , H01L21/76808 , H01L21/76813 , H01L21/76832 , H01L23/5223 , H01L28/60 , H01L2221/1036 , H01L2924/0002 , H01L2924/00
摘要： A method and a semiconductor device are provided. The semiconductor device includes a partial via etched in a stacked structure and a trough above the partial via. The method includes performing thick wiring using selective etching while etching the partial via to an etch stop layer.
摘要翻译：提供了一种方法和半导体器件。半导体器件包括以层叠结构蚀刻的部分通孔和部分通孔上方的槽。该方法包括使用选择性蚀刻执行厚布线，同时将部分通孔蚀刻到蚀刻停止层。

64. 发明申请

US20150266718A1 SEMICONDUCTOR STRUCTURES PROVIDED WITHIN A CAVITY AND RELATED DESIGN STRUCTURES 审中-公开
标题翻译：在CAVITY和相关设计结构中提供的半导体结构
公开(公告)号：US20150266718A1
公开(公告)日：2015-09-24
申请号：US14730346
申请日：2015-06-04
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Jeffrey C. Maling , Anthony K. Stamper , Dana R. DeReus , Arthur S. Morris, III
IPC分类号： B81B3/00
CPC分类号： B81B3/0072 , B81B2201/018 , B81B2203/0118 , B81C1/00333 , B81C1/00825 , B81C2203/0136 , B81C2203/0145 , H01H1/0036 , H01L23/34 , H01L29/84 , H01L2924/0002 , H01L2924/00
摘要： Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming at least one Micro-Electro-Mechanical System (MEMS) cavity. The method for forming the cavity further includes forming at least one first vent hole of a first dimension which is sized to avoid or minimize material deposition on a beam structure during sealing processes. The method for forming the cavity further includes forming at least one second vent hole of a second dimension, larger than the first dimension.
摘要翻译：公开了微机电系统（MEMS）结构，制造方法和设计结构。该方法包括形成至少一个微机电系统（MEMS）腔。用于形成空腔的方法还包括形成至少一个第一尺寸的第一通气孔，其尺寸设计成在密封过程中避免或最小化在梁结构上的材料沉积。形成空腔的方法还包括形成大于第一尺寸的第二尺寸的至少一个第二通气孔。

65. 发明授权

US09043743B2 Automated residual material detection 有权
标题翻译：自动残留物检测
公开(公告)号：US09043743B2
公开(公告)日：2015-05-26
申请号：US14060098
申请日：2013-10-22
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Jeffrey C. Maling , Anthony K. Stamper , Zeljka Topic-Beganovic
IPC分类号： G06F17/50 , H01L23/58 , G01R31/26 , H01L21/66 , H01L23/544 , G01N23/20
CPC分类号： H01L22/30 , H01L22/12
摘要： Methods, systems, and structures for detecting residual material on semiconductor wafers are provided. A method includes scanning a test structure including topographic features on a surface of a semiconductor wafer. The method further includes determining, based on the scanning, that the test structure includes an amount of a residual material of a sacrificial layer that exceeds a predetermined threshold.
摘要翻译：提供了用于检测半导体晶片上的残留材料的方法，系统和结构。一种方法包括在半导体晶片的表面上扫描包括地形特征的测试结构。该方法还包括基于扫描确定测试结构包括超过预定阈值的牺牲层的残余材料的量。

66. 发明授权

US08981475B2 Lateral diffusion metal oxide semiconductor (LDMOS) 有权
标题翻译：侧向扩散金属氧化物半导体（LDMOS）
公开(公告)号：US08981475B2
公开(公告)日：2015-03-17
申请号：US13920236
申请日：2013-06-18
申请人： International Business Machines Corporation
发明人： Santosh Sharma , Yun Shi , Anthony K. Stamper
IPC分类号： H01L29/78 , H01L21/336 , H01L29/66
CPC分类号： H01L29/7816 , H01L29/0653 , H01L29/404 , H01L29/66681
摘要： A lateral diffusion metal oxide semiconductor (LDMOS) comprises a semiconductor substrate having an STI structure in a top surface of the substrate, a drift region below the STI structure, and a source region and a drain region on opposite sides of the STI structure. A gate conductor is on the substrate over a gap between the STI structure and the source region and partially overlaps the drift region. A conformal dielectric layer is on the top surface and forms a mesa above the gate conductor. The conformal dielectric layer has a conformal etch-stop layer embedded therein. Contact studs extend through the dielectric layer and the etch-stop layer, and are connected to the source region, drain region, and gate conductor. A source electrode contacts the source contact stud, a gate electrode contacts the gate contact stud, and a drain electrode contacts the drain contact stud. A drift electrode is over the drift region.
摘要翻译：横向扩散金属氧化物半导体（LDMOS）包括在衬底的顶表面中具有STI结构的半导体衬底，STI结构下方的漂移区域，以及STI结构的相对侧上的源极区域和漏极区域。栅极导体在STI结构和源极区之间的间隙上在衬底上，并且部分地与漂移区重叠。保形介质层位于顶表面上，并在栅极导体上形成台面。保形介电层具有嵌入其中的保形蚀刻停止层。接触柱延伸穿过介电层和蚀刻停止层，并连接到源极区，漏极区和栅极导体。源电极接触源极接触柱，栅电极接触栅接触柱，而漏电极接触漏接触柱。漂移电极在漂移区域之上。

67. 发明授权

US08975531B2 Composite copper wire interconnect structures and methods of forming 有权
标题翻译：复合铜线互连结构及成型方法
公开(公告)号：US08975531B2
公开(公告)日：2015-03-10
申请号：US13746627
申请日：2013-01-22
申请人： International Business Machines Corporation
发明人： Felix Anderson , Zhong-Xiang He , Anthony K. Stamper
IPC分类号： H05K1/09 , H05K1/11 , H05K3/40
CPC分类号： H05K1/11 , H01L21/76847 , H01L21/76877 , H01L23/5283 , H01L23/53238 , H01L2924/0002 , H05K3/40 , Y10T29/49155 , H01L2924/00
摘要： Various embodiments include interconnect structures and methods of forming such structures. The interconnect structures can include a composite copper wire which includes at least two distinct copper sections. The uppermost copper section can have a thickness of approximately 1 micrometer or less, which inhibits surface roughening in that uppermost section, and helps to enhance cap adhesion with overlying layers.
摘要翻译：各种实施例包括形成这种结构的互连结构和方法。互连结构可以包括复合铜线，其包括至少两个不同的铜部分。最上面的铜部分可以具有大约1微米或更小的厚度，这抑制了在最上面的部分的表面粗糙化，并且有助于增强与上覆层的盖子粘附。

68. 发明授权

US08962402B1 Lateral diffusion metal oxide semiconductor (LDMOS) device with tapered drift electrode 有权
标题翻译：具有锥形漂移电极的横向扩散金属氧化物半导体（LDMOS）器件
公开(公告)号：US08962402B1
公开(公告)日：2015-02-24
申请号：US13966312
申请日：2013-08-14
申请人： International Business Machines Corporation
发明人： Santosh Sharma , Yun Shi , Anthony K. Stamper
IPC分类号： H01L21/00 , H01L29/78 , H01L29/06 , H01L29/66
CPC分类号： H01L29/404 , H01L29/0653 , H01L29/66681 , H01L29/7816
摘要： A lateral diffusion metal oxide semiconductor (LDMOS) comprises a semiconductor substrate having an STI structure in a top surface of the substrate, a drift region below the STI structure, and a source region and a drain region on opposite sides of the STI structure. A gate conductor is on the substrate over a gap between the STI structure and the source region, and partially overlaps the drift region. Floating gate pieces are over the STI structure. A conformal dielectric layer is on the top surface and on the gate conductor and floating gate pieces and forms a mesa above the gate conductor and floating gate pieces. A conformal etch-stop layer is embedded within the conformal dielectric layer. A drift electrode is formed on the conformal etch-stop layer over, relative to the top surface, the drift region. The drift electrode has a variable thickness relative to the top surface.
摘要翻译：横向扩散金属氧化物半导体（LDMOS）包括在衬底的顶表面中具有STI结构的半导体衬底，STI结构下方的漂移区域，以及STI结构的相对侧上的源极区域和漏极区域。栅极导体在STI结构和源极区之间的间隙上在衬底上，并且部分地与漂移区重叠。浮动门件超过了STI结构。保形介质层位于顶表面上，栅极导体和浮栅上，并在栅极导体和浮栅上形成台面。保形蚀刻停止层嵌入共形介电层内。在保形蚀刻停止层上相对于顶表面漂移漂移区形成漂移电极。漂移电极相对于顶表面具有可变的厚度。

69. 发明申请

US20150048447A1 LATERAL DIFFUSION METAL OXIDE SEMICONDUCTOR (LDMOS) DEVICE WITH TAPERED DRIFT ELECTRODE 有权
标题翻译：具有切割电极的侧向扩散金属氧化物半导体（LDMOS）器件
公开(公告)号：US20150048447A1
公开(公告)日：2015-02-19
申请号：US13966312
申请日：2013-08-14
申请人： International Business Machines Corporation
发明人： Santosh Sharma , Yun Shi , Anthony K. Stamper
IPC分类号： H01L29/78 , H01L29/06 , H01L29/66
CPC分类号： H01L29/404 , H01L29/0653 , H01L29/66681 , H01L29/7816
摘要： A lateral diffusion metal oxide semiconductor (LDMOS) comprises a semiconductor substrate having an STI structure in a top surface of the substrate, a drift region below the STI structure, and a source region and a drain region on opposite sides of the STI structure. A gate conductor is on the substrate over a gap between the STI structure and the source region, and partially overlaps the drift region. Floating gate pieces are over the STI structure. A conformal dielectric layer is on the top surface and on the gate conductor and floating gate pieces and forms a mesa above the gate conductor and floating gate pieces. A conformal etch-stop layer is embedded within the conformal dielectric layer. A drift electrode is formed on the conformal etch-stop layer over, relative to the top surface, the drift region. The drift electrode has a variable thickness relative to the top surface.
摘要翻译：横向扩散金属氧化物半导体（LDMOS）包括在衬底的顶表面中具有STI结构的半导体衬底，STI结构下方的漂移区域，以及STI结构的相对侧上的源极区域和漏极区域。栅极导体在STI结构和源极区之间的间隙上在衬底上，并且部分地与漂移区重叠。浮动门件超过了STI结构。保形介质层位于顶表面上，栅极导体和浮栅上，并在栅极导体和浮栅上形成台面。保形蚀刻停止层嵌入共形介电层内。在保形蚀刻停止层上相对于顶表面漂移漂移区形成漂移电极。漂移电极相对于顶表面具有可变的厚度。

70. 发明授权

US08945956B2 Metrology test structures in test dies 有权
标题翻译：测试模具中的计量测试结构
公开(公告)号：US08945956B2
公开(公告)日：2015-02-03
申请号：US13649612
申请日：2012-10-11
申请人： International Business Machines Corporation
发明人： Anthony K. Stamper
IPC分类号： H01L21/00
CPC分类号： H01L22/34 , B81C99/004 , H01L29/84 , H01L2924/0002 , H01L2924/00
摘要： Test dies having metrology test structures and methods of manufacture are disclosed. The method includes forming one or more metrology test structures in a test die that are identical to one or more structures formed in an adjacent product chip.
摘要翻译：公开了具有计量测试结构和制造方法的测试模具。该方法包括在测试模具中形成与在相邻产品芯片中形成的一个或多个结构相同的一个或多个测量结构。

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