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    • 7. 发明授权
    • Semiconductor device and method for manufacturing the same
    • 半导体装置及其制造方法
    • US08912652B2
    • 2014-12-16
    • US13906441
    • 2013-05-31
    • Dongbu HiTek Co., Ltd.
    • Ki Wan Bang
    • H01L23/00G01B11/14H01H35/14H01H35/02H01H1/16
    • H01L24/11B81B2201/018B81B2201/0271B81B2203/033B81C1/00182G01B11/14H01H1/16H01H35/02H01H35/142H01L24/13H01L2924/1461H01L2924/0001
    • Embodiments relate to a method for manufacturing a semiconductor device including at least one of: (1) Forming a lower electrode pattern on a substrate. (2) Forming an etch stop film on/over the lower electrode pattern. (3) Forming a first interlayer insulating layer on/over the etch stop film. (4) Forming an upper electrode pattern on/over the first interlayer insulating layer. (5) Forming a second interlayer insulating layer on/over the upper electrode pattern. (6) Forming an etch blocking layer positioned between the lower electrode pattern and the upper electrode pattern which passes through the second interlayer insulating layer and the first interlayer insulating layer. (7) Forming a cavity which exposes a side of the etch blocking layer by etching the second interlayer insulating layer and the first interlayer insulating layer. (8) Forming a contact ball in the cavity.
    • 实施例涉及一种用于制造半导体器件的方法,所述半导体器件包括以下至少一个:(1)在衬底上形成下电极图案。 (2)在下电极图案之上/之上形成蚀刻停止膜。 (3)在蚀刻停止膜上/之上形成第一层间绝缘层。 (4)在第一层间绝缘层上形成上电极图案。 (5)在上电极图案之上/之上形成第二层间绝缘层。 (6)形成位于通过第二层间绝缘层和第一层间绝缘层的下电极图案和上电极图案之间的蚀刻阻挡层。 (7)通过蚀刻第二层间绝缘层和第一层间绝缘层,形成露出蚀刻阻挡层的一侧的空腔。 (8)在空腔中形成接触球。
    • 8. 发明授权
    • Capacitive switch, apparatus for transceiving signal, and manufacturing method thereof
    • 电容开关,收发信号装置及其制造方法
    • US08907720B2
    • 2014-12-09
    • US14144095
    • 2013-12-30
    • Huawei Device Co., Ltd.
    • Xiong YangBocheng CaoLei Wang
    • H01L25/00H01H21/18H01H11/00
    • B81B3/0072B81B3/001B81B2201/014B81B2201/018H01G5/16H01H59/0009
    • A capacitive switch includes: a first conductive cantilever, a second conductive cantilever, a substrate, a coplanar waveguide arranged on the substrate, the coplanar waveguide includes a first conductor configured to transmit an electrical signal, a second conductor and a third conductor are arranged as ground wires on two sides of the first conductor; an insulation medium layer is arranged on the first conductor, a conducting layer is arranged on the insulation medium layer; the first conductive cantilever is connected to the second conductor by using a first fixed end, the second conductive cantilever is connected to the third conductor by using a second fixed end; when a direct-current signal is transmitted on the capacitive switch, a first free end of the first conductive cantilever and a second free end of the second conductive cantilever contact the conducting layer.
    • 电容开关包括:第一导电悬臂,第二导电悬臂,衬底,布置在衬底上的共面波导,共面波导包括被配置为传输电信号的第一导体,第二导​​体和第三导体被布置为 第一导体两侧接地线; 绝缘介质层布置在第一导体上,导电层设置在绝缘介质层上; 第一导电悬臂通过使用第一固定端连接到第二导体,第二导​​电悬臂通过使用第二固定端连接到第三导体; 当在电容性开关上传输直流信号时,第一导电悬臂的第一自由端和第二导电悬臂的第二自由端接触导电层。
    • 9. 发明授权
    • Method of forming an electromechanical power switch for controlling power to integrated circuit devices and related devices
    • 形成用于控制集成电路器件和相关器件的功率的机电电源开关的方法
    • US08786130B1
    • 2014-07-22
    • US13975216
    • 2013-08-23
    • INOSO, LLC
    • Kiyoshi MoriZiep TranGiang T. DaoMichael E. Ramon
    • H02J1/00B81B3/00H03K3/01
    • B81C1/0023B81B2201/018B81B2207/012B81B2207/053H01H59/0009Y10T307/461
    • A method of forming an electromechanical power switch for controlling power to integrated circuit (IC) devices and related devices. At least some of the illustrative embodiments are methods comprising forming at least one IC device on a front surface of a semiconductor substrate. The at least one IC device includes at least one circuit block and at least one power switch circuit. A dielectric layer is deposited on the IC device, and first and second electromechanical power switches are formed on the dielectric layer. The first power switch gates a voltage to the circuit block and the second power switch gates the voltage to the IC device. The first power switch is actuated by the power switch circuit, and the voltage to the circuit block is switched off. Alternatively, the second power switch is actuated by the power switch circuit, and the voltage to the IC device is switched off.
    • 一种形成用于控制集成电路(IC)装置和相关装置的电力的机电电源开关的方法。 示例性实施例中的至少一些是包括在半导体衬底的前表面上形成至少一个IC器件的方法。 所述至少一个IC器件包括至少一个电路块和至少一个功率开关电路。 电介质层沉积在IC器件上,第一和第二机电电源开关形成在电介质层上。 第一电源开关对电路块施加电压,并且第二电源开关将电压门控到IC器件。 第一电源开关由电源开关电路驱动,电路块的电压关闭。 或者,第二电源开关由电源开关电路驱动,并且IC器件的电压被切断。
    • 10. 发明申请
    • ELECTRIC EQUIPMENT HAVING MOVABLE PORTION, AND ITS MANUFACTURE
    • 具有可移动部分的电气设备及其制造
    • US20140183014A1
    • 2014-07-03
    • US14202437
    • 2014-03-10
    • FUJITSU LIMITED
    • Hiroaki INOUEXiaoyu Mi
    • H01H1/00H01H59/00B81B3/00
    • H01H1/0036B81B3/0072B81B3/0097B81B2201/018B81B2203/0118H01G5/16H01H59/0009
    • On seed metal layer of first metal, pedestal and counter electrode are formed of second metal by plating, adjacent to free space region. The free space region is filled with first sacrificial layer. By using resist pattern, second sacrificial metal layer is formed, extending from the first sacrificial layer to a portion of the pedestal, and lower structure of third metal is formed on the second sacrificial layer, by contiguous plating, exposing a portion of the pedestal not formed with the second sacrificial layer, the third metal having composition and thermal expansion coefficient equivalent to the second metal. Upper structure of fourth metal having composition and thermal expansion coefficient equivalent to the second and third metals is formed on the pedestal and the lower structure by plating. The first and second sacrificial layers are removed, leaving an electric equipment with a movable portion.
    • 在第一金属的种子金属层上,基座和对电极通过电镀形成第二金属,邻近自由空间区域。 自由空间区域填充有第一牺牲层。 通过使用抗蚀剂图案,形成从第一牺牲层延伸到基座的一部分的第二牺牲金属层,并且通过连续的电镀在第二牺牲层上形成第三金属的下部结构,使基座的一部分不暴露 形成有第二牺牲层,第三金属具有与第二金属相当的组成和热膨胀系数。 具有与第二和第三金属相当的组成和热膨胀系数的第四金属的上部结构通过电镀形成在基座和下部结构上。 去除第一和第二牺牲层,留下具有可移动部分的电气设备。