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71. 发明申请

US20120031955A1 WIRE BONDING METHOD AND CAPILLARY ENABLING HIGH-SPEED WEDGE BONDING OF WIRE BONDS 有权
标题翻译：电线联结方法和毛细管使用高速楔形线束接线
公开(公告)号：US20120031955A1
公开(公告)日：2012-02-09
申请号：US13025078
申请日：2011-02-10
申请人： Ken Pham
发明人： Ken Pham
IPC分类号： B23K31/12 , B23K20/24 , B23K3/08 , B23K37/00 , B23K1/06 , B23K20/26 , B23K20/10
CPC分类号： B23K20/005 , B23K2101/40 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/85 , H01L2224/05554 , H01L2224/05599 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48472 , H01L2224/49171 , H01L2224/78301 , H01L2224/78302 , H01L2224/85 , H01L2224/85099 , H01L2224/85205 , H01L2224/85207 , H01L2224/85399 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , Y10S228/904 , H01L2924/00 , H01L2924/20759 , H01L2924/2076 , H01L2924/00014 , H01L2924/20751 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/2075 , H01L2924/20754 , H01L2924/20752 , H01L2924/20753
摘要： Methods and systems are described for enabling the efficient fabrication of wedge-bonding of integrated circuit systems and electronic systems.
摘要翻译：描述了用于实现集成电路系统和电子系统的楔形结合的有效制造的方法和系统。

72. 发明授权

US08111100B1 Differential amplifier with improved zero-point calibration 有权
标题翻译：差分放大器具有改进的零点校准
公开(公告)号：US08111100B1
公开(公告)日：2012-02-07
申请号：US12780208
申请日：2010-05-14
申请人： Robert Allen Pease
发明人： Robert Allen Pease
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45941 , H03F2200/261 , H03F2200/411 , H03F2203/45528
摘要： The present invention covers novel approaches to the differential amplification of an input signal. Embodiments of the present invention have precise gain, swing to within micro-volts (μV) of ground, and have high CMRR without the need for precision resistors or tuned potentiometers. Embodiments of the present invention are particularly suited for the amplification of an instrumentation signal for delivery to an analog-to-digital converter. Examples of such signals include the product of a strain-gauge front end, a temperature sensor front end, and certain devices for bioelectronics detection. Embodiments of the present invention which are systems for amplification of a differential input signal can comprise a differential input stage transconducing a differential voltage input signal into a single-ended intermediate current signal using a follower transconductance amplifier, and a single-ended output stage comprising an amplifier producing an output voltage across a resistor network that forms a negative feedback network of the amplifier.
摘要翻译：本发明涵盖了对输入信号的差分放大的新颖方法。本发明的实施例具有精确的增益，摆动到接地的微伏（μV）内，并且具有高CMRR，而不需要精密电阻器或调谐电位计。本发明的实施例特别适用于放大用于传输到模拟 - 数字转换器的仪表信号。这种信号的示例包括应变计前端，温度传感器前端和用于生物电子检测的某些装置的产品。作为用于放大差分输入信号的系统的本发明的实施例可以包括使用跟随器跨导放大器将差分电压输入信号转换成单端中间电流信号的差分输入级，以及包括放大器产生跨越电阻网络的输出电压，形成放大器的负反馈网络。

73. 发明授权

US08105063B1 Three piece mold cavity design for packaging integrated circuits 有权
标题翻译：封装集成电路三片模腔设计
公开(公告)号：US08105063B1
公开(公告)日：2012-01-31
申请号：US12869630
申请日：2010-08-26
申请人： Lee Han Meng @Eugene Lee
发明人： Lee Han Meng @Eugene Lee
IPC分类号： B29C70/72 , H01L21/56
CPC分类号： H01L21/565 , B29C45/14016 , B29C45/14655 , H01L24/97 , H01L2224/16245 , H01L2224/97 , H01L2924/14 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00
摘要： One aspect of the present invention relates to a molding system for use in packaging integrated circuits. The molding system includes a top cavity bar, a middle cavity bar, a bottom cavity bar, a tape and an injection unit. When an electronic substrate is positioned between the top and middle cavity bars, the top and middle cavity bars are arranged to sandwich the electronic substrate. The top and middle cavity bars are also arranged to help form one or more mold cavities over device areas of the electronic substrate. The tape is positioned below the middle cavity bar and is arranged to cover and relieve pressure on a bottom of each mold cavity. The bottom cavity bar is positioned below the tape and is arranged to support the tape. The injection unit is arranged to inject a molding material into the mold cavities.
摘要翻译：本发明的一个方面涉及一种用于封装集成电路的模制系统。该模制系统包括顶腔杆，中空杆，底腔杆，带和注射单元。当电子基板定位在顶部和中间空腔条之间时，顶部和中间空心条被布置成夹住电子基板。顶部和中间的腔棒还被布置成有助于在电子基底的装置区域上形成一个或多个模腔。胶带定位在中空杆下方，并布置成覆盖和减轻每个模腔的底部的压力。底部空腔棒位于带的下方并且被布置成支撑带。注射单元布置成将模制材料注入模腔中。

74. 发明申请

US20120020441A1 FIXED POINT FIR FILTER WITH ADAPTIVE TRUNCATION AND CLIPPING AND WIRELESS MOBILE STATION USING SAME 有权
标题翻译：具有自适应切断和固定无缝移动站的固定点FIR滤波器
公开(公告)号：US20120020441A1
公开(公告)日：2012-01-26
申请号：US13190439
申请日：2011-07-25
申请人： Tao Zhang
发明人： Tao Zhang
IPC分类号： H04L27/08 , H04B1/10
CPC分类号： H03H17/06
摘要： A fixed point finite impulse response (FIR) filter comprising: 1) an input stage for receiving an input signal as a sequence of input samples comprising: i) delay elements connected in series for receiving and shifting N sequential input samples; ii) multipliers, each multiplier receiving a selected one of the N sequential input samples from the delay elements and multiplying the selected input sample by a corresponding coefficient to produce an intermediate product; and iii) a summer for receiving and adding N intermediate products from the multipliers to produce an output sum signal comprising a sequence of output sum samples; and 2) an output stage for truncating k least significant bits (LSBs) from each of the output sum samples, wherein k is a variable number.
摘要翻译： 1.一种固定点有限脉冲响应（FIR）滤波器，包括：1）输入级，用于接收输入信号作为输入样本序列，包括：i）串联连接的延迟元件，用于接收和移位N个顺序输入样本; ii）乘法器，每个乘法器从延迟元件接收N个顺序输入样本中的选定的一个，并将所选择的输入样本乘以相应的系数以产生中间乘积; 以及iii）用于从所述乘法器接收和添加N个中间产品的加法器，以产生包括输出和样本序列的输出和信号; 以及2）用于从每个输出和样本截取k个最低有效位（LSB）的输出级，其中k是可变数。

75. 发明授权

US08102196B1 Programmable dual phase-locked loop clock signal generator and conditioner 有权
标题翻译：可编程双锁相环时钟信号发生器和调节器
公开(公告)号：US08102196B1
公开(公告)日：2012-01-24
申请号：US12759987
申请日：2010-04-14
申请人： Benyong Zhang
发明人： Benyong Zhang
IPC分类号： H03L7/06
CPC分类号： G06F1/08 , H03L7/235
摘要： A clock signal generator and conditioner in which dual integrated phase-locked loop (PLL) circuits use an off-chip frequency-pullable crystal resonator or voltage-controlled oscillator (VCO) module and an on-chip VCO with intra-PLL frequency doubling to provide a clock signal with reduced in-band phase noise and RMS jitter. As desired, synchronization between the input and output clocks can also be provided.
摘要翻译：一种时钟信号发生器和调节器，其中双重集成锁相环（PLL）电路使用片外可升压晶体谐振器或压控振荡器（VCO）模块和片内VCO，PLL内部频率倍增提供具有降低的带内相位噪声和RMS抖动的时钟信号。根据需要，还可以提供输入和输出时钟之间的同步。

76. 发明授权

US08102168B1 PSRR regulator with UVLO 有权
标题翻译： PSRR调节器与UVLO
公开(公告)号：US08102168B1
公开(公告)日：2012-01-24
申请号：US11871536
申请日：2007-10-12
申请人： Kern Wai Wong
发明人： Kern Wai Wong
IPC分类号： G05F3/08
CPC分类号： G05F1/56 , G05F3/30 , H02M3/156
摘要： The invention relates to a regulator with an under-voltage lock-out (UVLO) circuit and a reference generator circuit (e.g., a band-gap reference). The UVLO circuit includes an internal band-gap reference circuit and a comparison circuit. The UVLO circuit compares an input voltage with the output of the internal band-gap reference circuit to selectively enable the regulator. The output of the internal band-gap reference circuit is also employed to power the reference generator circuit. The reference generator circuit provides a reference signal which is employed to control steady-state regulation. The regulator also includes an operational amplifier circuit for increasing the drive and/or voltage level of the internal band-gap reference circuit output.
摘要翻译：本发明涉及具有欠压锁定（UVLO）电路和参考发生器电路（例如，带隙基准）的调节器。 UVLO电路包括内部带隙参考电路和比较电路。 UVLO电路将输入电压与内部带隙参考电路的输出进行比较，以选择性地使能稳压器。内部带隙参考电路的输出也用于为参考发生器电路供电。参考发生器电路提供用于控制稳态调节的参考信号。调节器还包括用于增加内部带隙基准电路输出的驱动和/或电压电平的运算放大器电路。

77. 发明授权

US08076995B2 Integrated digitally controlled linear-in-decibels attenuator 有权
标题翻译：集成数字线性分贝衰减器
公开(公告)号：US08076995B2
公开(公告)日：2011-12-13
申请号：US12719432
申请日：2010-03-08
申请人： Hon Kin Chiu
发明人： Hon Kin Chiu
IPC分类号： H03G3/20
CPC分类号： H03H7/24
摘要： An integrated digitally controlled linear-in-decibels attenuator circuit in which one or more sets of selection switches establish a desired attenuation by selectively connecting the input signal electrode to one or more corresponding resistive ladder networks connected in series, thereby providing a substantially more constant signal attenuation value over a wider frequency bandwidth. With a single resistive ladder network, attenuation control is achieved using a thermometer switching code. With multiple resistive ladder networks, coarse and fine attenuation control can be achieved using thermometer and bubble switching codes, respectively.
摘要翻译：一种集成的数字控制线性分贝衰减器电路，其中一组或多组选择开关通过选择性地将输入信号电极连接到串联连接的一个或多个相应的电阻梯形网络来建立期望的衰减，从而提供基本上更恒定的信号在更宽的频率带宽上的衰减值。使用单个电阻梯形网络，使用温度计切换代码实现衰减控制。使用多个电阻梯形网络，可以使用温度计和气泡切换代码分别实现粗略和精细的衰减控制。

78. 发明申请

US20110291576A1 Driving system with inductor pre-charging for LED systems with PWM dimming control or other loads 有权
标题翻译：具有PWM调光控制或其他负载的LED系统的电感器预充电的驱动系统
公开(公告)号：US20110291576A1
公开(公告)日：2011-12-01
申请号：US12800875
申请日：2010-05-25
申请人： Lik-Kin Wong , Tze-Kau Man
发明人： Lik-Kin Wong , Tze-Kau Man
IPC分类号： H05B37/02 , G05F1/10
CPC分类号： H05B33/0815 , H05B33/0827 , H05B33/0887 , Y02B20/347
摘要： A method includes receiving a control signal associated with a load, where the control signal is to cause a load change from a perspective of a switching-mode power supply. The method also includes causing the power supply to adjust a current through an inductor of the power supply in response to the control signal. The method further includes delaying delivery of the control signal in order to delay a time of the load change, where the current through the inductor increases during the delay. The control signal could include a request to turn on one or more LEDs. The load could include a current regulator. The method could further include providing the request to the current regulator after the delay, such as after the current through the inductor reaches a specified level. Voltage spikes and audible noise in a capacitor coupled to an output of the power supply can be minimized.
摘要翻译：一种方法包括接收与负载相关联的控制信号，其中控制信号从开关模式电源的角度引起负载变化。该方法还包括响应于控制信号使电源调节通过电源的电感器的电流。该方法还包括延迟控制信号的传递，以便延迟负载变化的时间，其中通过电感器的电流在延迟期间增加。控制信号可以包括打开一个或多个LED的请求。负载可以包括电流调节器。该方法还可以包括在延迟之后向电流调节器提供请求，例如在通过电感器的电流达到指定电平之后。耦合到电源输出的电容器中的电压尖峰和可听噪声可以被最小化。

79. 发明申请

US20110280352A1 FIXED POINT FIR FILTER WITH ADAPTIVE TRUNCATION AND CLIPPING AND WIRELESS MOBILE STATION USING SAME 有权
公开(公告)号：US20110280352A1
公开(公告)日：2011-11-17
申请号：US13190428
申请日：2011-07-25
申请人： Tao Zhang
发明人： Tao Zhang
IPC分类号： H04B1/10
CPC分类号： H03H17/06
摘要： A fixed point finite impulse response (FIR) filter comprising: 1) an input stage for receiving an input signal as a sequence of input samples comprising: i) delay elements connected in series for receiving and shifting N sequential input samples; ii) multipliers, each multiplier receiving a selected one of the N sequential input samples from the delay elements and multiplying the selected input sample by a corresponding coefficient to produce an intermediate product; and iii) a summer for receiving and adding N intermediate products from the multipliers to produce an output sum signal comprising a sequence of output sum samples; and 2) an output stage for truncating k least significant bits (LSBs) from each of the output sum samples, wherein k is a variable number.

80. 发明授权

US08044755B2 MEMS power inductor 有权
标题翻译： MEMS功率电感
公开(公告)号：US08044755B2
公开(公告)日：2011-10-25
申请号：US12082209
申请日：2008-04-09
申请人： Peter Smeys , Peter Johnson
发明人： Peter Smeys , Peter Johnson
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F41/046 , H01F2017/0066 , H01F2017/0086 , H01L28/10 , Y10T29/4902 , Y10T29/49073 , Y10T29/49075 , Y10T29/49124 , Y10T29/4913
摘要： A scalable MEMS inductor is formed on the top surface of a semiconductor die. The MEMS inductor includes a plurality of magnetic lower laminations, a circular trace that lies over and spaced apart from the magnetic lower laminations, and a plurality of upper laminations that lie over and spaced apart from the circular trace.
摘要翻译：在半导体管芯的顶表面上形成可伸缩的MEMS电感器。 MEMS电感器包括多个磁性下层叠体，位于磁性下部叠片之上并与之隔开的圆形迹线以及位于圆形迹线之上并与圆形迹线隔开的多个上层叠体。

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