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    • 72. 发明授权
    • Step-down circuit
    • 降压电路
    • US07772814B2
    • 2010-08-10
    • US11971579
    • 2008-01-09
    • Yasuhiro SuematsuKatsumi Abe
    • Yasuhiro SuematsuKatsumi Abe
    • G05F1/565G05F1/40
    • G05F1/575
    • A step-down circuit generates a second power supply lower than a first power supply. The step-down circuit includes an output terminal connected to a load circuit, an output transistor connected between the first power supply and the output terminal, and having a gate terminal connected to a first node, a monitor transistor connected between the first power supply and a second node, and having a gate terminal connected to the first node, and a feedback circuit which sets a gate voltage of the output transistor in accordance with a difference between a voltage obtained by dividing a voltage of the second node and a reference voltage. A size of the monitor transistor is changed in accordance with an operation mode of the load circuit.
    • 降压电路产生低于第一电源的第二电源。 降压电路包括连接到负载电路的输出端子,连接在第一电源和输出端子之间的输出晶体管,并且具有连接到第一节点的栅极端子,连接在第一电源和 第二节点,并且具有连接到第一节点的栅极端子;以及反馈电路,其根据通过分割第二节点的电压而获得的电压与参考电压之间的差设置输出晶体管的栅极电压。 监视晶体管的尺寸根据负载电路的工作模式而改变。
    • 73. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE HAVING SENSE AMPLIFIER
    • 具有感测放大器的半导体存储器件
    • US20100188913A1
    • 2010-07-29
    • US12693798
    • 2010-01-26
    • Masahiro YOSHIHARAKatsumi ABE
    • Masahiro YOSHIHARAKatsumi ABE
    • G11C7/06G11C7/00
    • G11C7/12G11C7/08G11C2207/005
    • A semiconductor memory device includes a memory cell array, a page buffer, a data line pair, a differential amplifier and a precharger. The memory cell array includes a plurality of pages in which a plurality of memory cells are arranged. The page buffer is formed adjacent to the memory cell array, and includes a plurality of sense amplifiers configured to temporarily hold page data read from the memory cells in the page. The data line pair is arranged in the page buffer and is connected to the sense amplifiers. The differential amplifier is configured to amplify a potential difference between lines of the data line pair. The precharger is configured to precharge the data line pair to a predetermined potential. At least one of the differential amplifier and the precharger is formed in the page buffer, and the at least one circuit is electrically connected to the data line pair.
    • 半导体存储器件包括存储单元阵列,页缓冲器,数据线对,差分放大器和预充电器。 存储单元阵列包括多个存储单元布置在其中的多个页面。 页面缓冲器形成在与存储单元阵列相邻的位置,并且包括多个读出放大器,被配置为临时保持从页面中的存储器单元读取的页面数据。 数据线对被布置在页缓冲器中并连接到读出放大器。 差分放大器被配置为放大数据线对的线之间的电位差。 预充电器被配置为将数据线对预充电到预定电位。 差分放大器和预充电器中的至少一个形成在页面缓冲器中,并且至少一个电路电连接到数据线对。
    • 76. 发明申请
    • STEP-DOWN CIRCUIT
    • 降压电路
    • US20080211469A1
    • 2008-09-04
    • US11971579
    • 2008-01-09
    • Yasuhiro SUEMATSUKatsumi Abe
    • Yasuhiro SUEMATSUKatsumi Abe
    • G05F1/00
    • G05F1/575
    • A step-down circuit generates a second power supply lower than a first power supply. The step-down circuit includes an output terminal connected to a load circuit, an output transistor connected between the first power supply and the output terminal, and having a gate terminal connected to a first node, a monitor transistor connected between the first power supply and a second node, and having a gate terminal connected to the first node, and a feedback circuit which sets a gate voltage of the output transistor in accordance with a difference between a voltage obtained by dividing a voltage of the second node and a reference voltage. A size of the monitor transistor is changed in accordance with an operation mode of the load circuit.
    • 降压电路产生低于第一电源的第二电源。 降压电路包括连接到负载电路的输出端子,连接在第一电源和输出端子之间的输出晶体管,并且具有连接到第一节点的栅极端子,连接在第一电源和 第二节点,并且具有连接到第一节点的栅极端子;以及反馈电路,其根据通过分割第二节点的电压而获得的电压与参考电压之间的差设置输出晶体管的栅极电压。 监视晶体管的尺寸根据负载电路的工作模式而改变。
    • 79. 发明申请
    • SEMICONDUCTOR DEVICE PROVIDED WITH MATRIX TYPE CURRENT LOAD DRIVING CIRCUITS, AND DRIVING METHOD THEREOF
    • 具有矩阵型电流负载驱动电路的半导体器件及其驱动方法
    • US20050145891A1
    • 2005-07-07
    • US10501539
    • 2003-01-15
    • Katsumi Abe
    • Katsumi Abe
    • G09G3/32H01L29/76
    • G09G3/3241G09G2300/0842G09G2300/0861G09G2310/0297
    • A semiconductor device to which active drive current programming is applied, comprising current load cells each having a current load and a current load driving circuit, which are arranged in a matrix, capable of reducing the circuit scale of a current driver with little change made in the structure of the current load driving circuit, and a driving method of the same. A current load cell (113, 114) includes a current load driving circuit which is provided with a transistor (115) connected in series with a current load (122) between first and second power supplies (109, 110); a capacitance (116) connected between the control terminal of the transistor (115) and the first power supply (109); and switches (117, 118) connected between the control terminal of the transistor (115) and a corresponding data line. The output (101) of a current driver is connected to a plurality of data lines via a selector (123, 124), and the plural data lines connected to one output of the current driver via the selector and at least one of the switches of each of the current load cells corresponding to the respective data lines are drive-controlled in a time division manner during one horizontal period.
    • 一种应用有源驱动电流编程的半导体器件,包括各自具有电流负载和电流负载驱动电路的电流负载单元,它们以矩阵形式布置,能够以几乎不改变的方式减小电流驱动器的电路规模 电流负载驱动电路的结构及其驱动方法。 电流测力传感器(113,114)包括电流负载驱动电路,该电流负载驱动电路设置有与第一和第二电源(109,110)之间的电流负载(122)串联连接的晶体管(115); 连接在晶体管(115)的控制端子和第一电源(109)之间的电容(116); 和连接在晶体管(115)的控制端子和相应数据线之间的开关(117,118)。 电流驱动器的输出(101)经由选择器(123,124)连接到多条数据线,并且多条数据线通过选择器连接到当前驱动器的一个输出端,并且至少一个开关 在一个水平周期期间,以相应的数据线对应的每个当前负载单元以时分方式被驱动控制。