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71. 发明授权

US5978891A Memory for operating synchronously with clock signals generated internally responsive to externally received control signals while outputting the clock signals via an external terminal 失效
标题翻译：存储器，用于与通过外部接收的控制信号内部产生的时钟信号同步地操作，同时经由外部端子输出时钟信号
公开(公告)号：US5978891A
公开(公告)日：1999-11-02
申请号：US896473
申请日：1997-07-18
申请人： Hiroshi Takeda
发明人： Hiroshi Takeda
IPC分类号： G06F13/42 , G06F12/00 , G06F13/00 , G06F13/16 , G11C7/22 , G06F1/00
CPC分类号： G11C7/1027 , G06F13/1689 , G11C7/22
摘要： A memory 1 performs its internal operation in response to access requests (200, 201 and 202) of a CPU 2 in synchronism with the oscillated output of a self-excited oscillator 102 incorporated therein and according to said access requests, and outputs a response request 103 for said access requests to said CPU in synchronism with its internal operation. The CPU performs the access requests for the memory, and fetches data from the outside or outputs the data to the outside in response to and in synchronism with the response request 103 from the accessed memory and according to the kinds of said access requests.
摘要翻译：存储器1响应于CPU 2的接收请求（200,201和202）与其中并入的自激振荡器102的振荡输出同步并且根据所述访问请求执行其内部操作，并且输出响应请求 103，用于与其内部操作同步地对所述CPU的所述访问请求。 CPU执行对存储器的访问请求，并且从外部获取数据或者响应于来自所访问的存储器的响应请求103并根据所述访问请求的种类而将数据输出到外部。

72. 发明授权

US5639257A Bolt-equipped connector 失效
标题翻译：螺栓连接器
公开(公告)号：US5639257A
公开(公告)日：1997-06-17
申请号：US588885
申请日：1996-01-19
申请人： Shinji Yamaguchi , Katsuji Shimazawa , Hiroshi Takeda
发明人： Shinji Yamaguchi , Katsuji Shimazawa , Hiroshi Takeda
IPC分类号： H01R13/621 , H01R13/627
CPC分类号： H01R13/6215
摘要： The invention provides a bolt-equipped connector in which the bolt will be mounted when the connector is mated with a counter connector. Engaging protrusions (25a, 26a) of a bolt holder (20) are engaged with engaging portions (15b, 16b), whereby the bolt holder (20) is fitted to a holder mounting hole (13) of a housing (11) of a male connector (10). In this state, the bolt (40) is pushed into the bolt holder (20) at the time of mating with a female connector. Engaging pieces (44b, 44c) of a stop ring (44) additionally provided to the bolt (40) are engaged with a step portion (22b) of the bolt holder (20), so that the bolt (40) is rotatably held to the housing (11) via the bolt holder (20). Then, a male screw portion (41) of the bolt (40) is screwed in a screw hole of the female connector, whereby the connectors are mated with each other.
摘要翻译：本发明提供了一种螺栓配备的连接器，其中当连接器与对接连接器配合时，螺栓将被安装。螺栓保持器（20）的接合突起（25a，26a）与接合部分（15b，16b）接合，由此螺栓保持器（20）装配到壳体（11）的保持器安装孔（13）公连接器（10）。在该状态下，在与母连接器配合时，将螺栓（40）推入螺栓保持架（20）。额外提供给螺栓（40）的止动环（44）的接合件（44b，44c）与螺栓保持器（20）的台阶部分（22b）接合，使得螺栓（40）可旋转地保持所述壳体（11）经由所述螺栓保持器（20）。然后，将螺栓（40）的外螺纹部（41）拧入阴连接器的螺纹孔中，由此连接器相互配合。

73. 发明授权

US5606338A Display control device 失效
标题翻译：显示控制装置
公开(公告)号：US5606338A
公开(公告)日：1997-02-25
申请号：US309411
申请日：1994-09-20
申请人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
发明人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
IPC分类号： G09G5/18 , G09G5/12 , G09G1/08
CPC分类号： G09G5/12
摘要： A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.
摘要翻译：用于以隔行模式控制一个CRT器件的CRT（阴极射线管）控制器具有双向结构的同步电路，以便使CRT控制器与其他电路（其它CRT控制器或TV系统）可以同步操作，。当CRTC用作CRT显示系统的主电路时，与垂直扫描计数器的计数信号和CRTC的隔行控制器的输出同步地从同步电路导出同步信号，并将其提供给其他CRTC的同步终端。用于控制其他CRTC的隔行扫描的扫描计数器和触发器与同步信号同步地被复位到其初始状态。当CRTC用作从电路时，与外部同步信号同步，将扫描计数器和CRTC的触发器复位到初始状态。

74. 发明授权

US5254075A Internal circulation type centrifugal extractor 失效
标题翻译：内循环型离心萃取器
公开(公告)号：US5254075A
公开(公告)日：1993-10-19
申请号：US801667
申请日：1991-12-02
申请人： Shin-ichi Nemoto , Ryo Shimizu , Hiroshi Takeda , Tomio Kawata
发明人： Shin-ichi Nemoto , Ryo Shimizu , Hiroshi Takeda , Tomio Kawata
IPC分类号： B01D11/04 , G21C19/46 , B04B1/00
CPC分类号： B01D11/0461
摘要： A centrifugal extractor for making liquid-liquid extraction by bringing an organic phase and an aqueous phase into mutual contact and utilizing centrifugal force. A rotor rotating at a high speed is disposed inside a cylindrical casing having inlets for both phases. Draw ports for both phases are disposed at an upper portion of the rotor. An organic phase/aqueous phase mixture mixed at the bottom of the casing enters the rotor from the bottom of the rotor, and is subjected to phase separation by centrifugal force. The separated phases are withdrawn from respective draw ports. Part of the organic phase discharged from the organic phase draw port is refluxed to the bottom of the casing by a reflux cover fitted to the upper part of the rotor. The flow rate of the organic phase thus refluxed is added to the flow rate of the organic phase introduced from outside into the casing. Therefore, the flow rate ratio can be brought close to 1 inside the extractor, even if the flow rate of the aqueous phase is greater than that of the organic phase.
摘要翻译：一种用于通过使有机相和水相相互接触并利用离心力进行液 - 液萃取的离心萃取器。高速旋转的转子设置在具有两相入口的圆筒形壳体的内部。两相的牵引端口设置在转子的上部。混合在壳体底部的有机相/水相混合物从转子的底部进入转子，通过离心力进行相分离。分离的相从相应的抽出口排出。从有机相抽出口排出的有机相的一部分通过装配在转子上部的回流罩回流到壳体的底部。将由此回流的有机相的流量与从外部引入壳体的有机相的流量相加。因此，即使水相的流量大于有机相的流量比，流量比可以在萃取器内部接近1。

75. 发明授权

US5155821A Command performing order change-over system in data processor 失效
标题翻译：在数据处理器中执行命令转换系统的命令
公开(公告)号：US5155821A
公开(公告)日：1992-10-13
申请号：US290467
申请日：1988-12-27
申请人： Takashi Sone , Hiroshi Takeda , Jun Satoh , Shigeru Matsuo
发明人： Takashi Sone , Hiroshi Takeda , Jun Satoh , Shigeru Matsuo
IPC分类号： G06F13/12 , G06F9/26 , G06F9/38 , G06F11/22 , G06F11/28 , G06F11/36
CPC分类号： G06F11/3648 , G06F9/265 , G06F9/3877
摘要： A slave controller formed on a single semiconductor substrate executes a built in control algorithm in response to a command supplied from a master controller. Upon completion of command execution, the controls respond to predetermined information contained within the command by branching internal control operation in accordance with the new command. The controls then suspend a series of operations for executing the new command upon detection of the branch condition. Once the internal state has been changed over, the slave controller sends an instruction to the master controller.
摘要翻译：形成在单个半导体衬底上的从控制器响应于从主控制器提供的命令执行内置的控制算法。命令执行完成后，通过根据新命令分支内部控制操作来控制命令中包含的预定信息。然后，控制器在检测到分支条件后暂停执行新命令的一系列操作。一旦内部状态已经改变，从控制器向主控制器发送指令。

76. 发明授权

US4947342A Graphic processing system for displaying characters and pictures at high speed 失效
标题翻译：用于高速显示字符和图片的图形处理系统
公开(公告)号：US4947342A
公开(公告)日：1990-08-07
申请号：US905173
申请日：1986-09-09
申请人： Koyo Katsura , Shigeru Matsuo , Shigeaki Yoshida , Hiroshi Takeda , Hisashi Kaziwara
发明人： Koyo Katsura , Shigeru Matsuo , Shigeaki Yoshida , Hiroshi Takeda , Hisashi Kaziwara
IPC分类号： G09G5/40 , G06F12/00 , G09G1/02 , G09G1/06 , G09G1/16 , G09G5/22 , G09G5/24 , G09G5/26 , G09G5/36 , G09G5/38 , G09G5/39 , G09G5/393 , G09G5/399
CPC分类号： G09G5/393 , G09G5/22 , G09G5/26 , G09G5/363
摘要： A graphic processing system has a processor for managing a display area and a character font area both included within an address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.
摘要翻译：图形处理系统具有用于管理包括在地址空间内的显示区域和字符字体区域的处理器。从指示通过系统的数据总线传送的字符的编码信息中，处理器生成相应字符的字符字体图案已被存储的地址，并将该字符字体图案转移到显示区域上的预定位置。图形处理系统实现了字体的高速发展。

77. 发明授权

US4906986A Display control device 失效
标题翻译：显示控制装置
公开(公告)号：US4906986A
公开(公告)日：1990-03-06
申请号：US281966
申请日：1988-11-30
申请人： Hiroshi Takeda
发明人： Hiroshi Takeda
IPC分类号： G09G5/24 , G06T11/20 , G09G1/14 , G09G5/36 , G09G5/393
CPC分类号： G09G5/393
摘要： A CRT controller having a drawing function includes designation means to designate a predetermined area of an external memory as a reference area for tiling, and a drawing processor which transmits a display pattern in the reference area designated by the designation means, to a drawing area of the external memory. Since the CRT controller of this construction permits the use of the external memory easy of enlarging the capacity thereof for a tiling pattern, it realizes the tiling processing with a complicated tiling pattern.
摘要翻译：具有绘图功能的CRT控制器包括指定装置，用于指定外部存储器的预定区域作为平铺的参考区域;以及绘图处理器，其将指定装置指定的参考区域中的显示图案发送到绘图区域外部存储器。由于这种结构的CRT控制器允许使用外部存储器容易地扩大其平铺图案的容量，所以以复杂的拼接图案实现了平铺处理。

78. 发明授权

US4757310A Display controller 失效
标题翻译：显示控制器
公开(公告)号：US4757310A
公开(公告)日：1988-07-12
申请号：US626992
申请日：1984-07-02
申请人： Koyo Katsura , Hideo Maejima , Hiroshi Takeda
发明人： Koyo Katsura , Hideo Maejima , Hiroshi Takeda
IPC分类号： G06F3/153 , G06F3/14 , G09G1/02 , G09G5/14 , G09G5/32 , G09G5/36 , G09G5/377 , G09G5/39 , G09G5/395 , G09G5/397 , G09G1/16
CPC分类号： G09G5/36 , G09G5/363 , G09G5/39 , G09G5/397
摘要： In an image displaying field where there is a tendency which will increase the data to be handled in accordance with the high integration of a display device, a CRT controller according to the present invention improves the superposed display and the responsiveness of the display and drawing operations by dividing a unit clock into a predetermined number to function with high speed and a multifunction display. When image data are to be inputted to or outputted from a refresh memory corresponding to a display frame, the memory content and the display address are assigned at a ratio of 1:n to effect the processings in parallel. As a result, the time period utilized by the display cycle of the prior art can be assigned to the drawing operation so that the processing can be speeded up while making it easier than the prior art to effect the superposed display of letters, symbols and drawings. The resultant effect is that it is unnecessary to increase the number of refresh memories corresponding to the displayed frame and that the external parts can be simplified to contribute to the improvement in the reliability.
摘要翻译：在根据显示装置的高集成度存在将增加要处理的数据的趋势的图像显示领域中，根据本发明的CRT控制器改进了叠加显示和显示和绘图操作的响应性通过将单位时钟分割成预定数量以高速功能和多功能显示。当图像数据要被输入到与显示帧相对应的刷新存储器中时，以1：n的比例分配存储器内容和显示地址以并行地进行处理。结果，可以将现有技术的显示循环所使用的时间段分配给绘制操作，使得可以加速处理，同时使现有技术更容易实现字母，符号和图纸的叠加显示。所产生的效果是不需要增加对应于所显示的帧的刷新存储器的数量，并且可以简化外部部件以有助于提高可靠性。

79. 发明授权

US08741358B2 Ghrelin production promoter 有权
标题翻译：生长素释放肽生产促进剂
公开(公告)号：US08741358B2
公开(公告)日：2014-06-03
申请号：US13345826
申请日：2012-01-09
申请人： Masahiro Asaka , Hiroshi Takeda , Ryuuji Takasaki , Tomohisa Hattori
发明人： Masahiro Asaka , Hiroshi Takeda , Ryuuji Takasaki , Tomohisa Hattori
IPC分类号： A61K36/00 , A61K36/284 , A61K36/25 , A61K36/8888 , A61K36/076 , A61K36/484 , A61K36/725 , A61K36/752 , A61K36/258 , A61K36/48 , A61K36/906
CPC分类号： A61K36/28 , A61K36/07 , A61K36/23 , A61K36/48 , A61K36/75 , A61K2300/00
摘要： The objectives are to find a substance or a composition capable of promoting the production of ghrelin with physiological activities such as growth hormone secretion effect, and to provide a pharmaceutical comprising it as the active ingredient. The pharmaceutical is a ghrelin production promoter comprising Rikkunshi-to as the active ingredient.
摘要翻译：其目的是找到能够促进生长激素分泌作用等生理活性促进生长素释放肽的物质或组合物，提供含有作为活性成分的药物。药物是含有Rikkunshi的生长素释放肽生产促进剂作为活性成分。

80. 发明授权

US08698786B2 Driving circuit and driving method for display device 有权
标题翻译：显示装置的驱动电路及驱动方法
公开(公告)号：US08698786B2
公开(公告)日：2014-04-15
申请号：US13005432
申请日：2011-01-12
申请人： Shuji Yamaguchi , Hiroshi Takeda
发明人： Shuji Yamaguchi , Hiroshi Takeda
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G2340/0492
摘要： A gate start pulse signal for a next frame is output at (m−n+k+1)-th line from a beginning of display period for a previous frame in a case where m denotes the number of the display lines, n denotes the number of extra outputs from the gate driver at a side from which the scan is performed, k denotes a positive integer, and a scan of a gate driver is performed from a side at which there is an extra output from the gate driver; k pulses of gate driver clock signals are output during a vertical blank period; and input of a gate driver clock signal is restarted from a beginning of a display period for the next frame.
摘要翻译：在m表示显示行的数量的情况下，从前一帧的显示周期开始的第（m-n + k + 1）行输出下一帧的门起始脉冲信号，n表示从执行扫描的一侧的栅极驱动器的额外输出的数量，k表示正整数，并且从栅极驱动器的额外输出的一侧执行栅极驱动器的扫描; 在垂直空白期间输出k脉冲的栅极驱动器时钟信号; 并且从下一帧的显示周期的开始重新开始栅极驱动器时钟信号的输入。

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