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1. 发明授权

US10111333B2 Molded power-supply module with bridge inductor over other components 有权
公开(公告)号：US10111333B2
公开(公告)日：2018-10-23
申请号：US13042332
申请日：2011-03-07
申请人： Jian Yin , Matthew Harris
发明人： Jian Yin , Matthew Harris
IPC分类号： H05K7/02 , H05K1/18 , H01L23/495 , H01L23/64 , H01L25/16 , H01F27/06 , H05K3/20 , H05K3/28 , H01L23/00
摘要： An embodiment of a power-supply module includes a molded package, power-supply components disposed within the package, and an inductor disposed within the package and over the power-supply components. For example, for a given output-power rating, such a power-supply module may be smaller, more efficient, and more reliable than, and may run cooler than, a power-supply module having the inductor mounted outside of the package or side-by-side with other components. And for a given size, such a module may have a higher output-power rating than a module having the inductor mounted outside of the package or side-by-side with other components.

2. 发明授权

US08975885B2 System and method for improving regulation accuracy of switch mode regulator during DCM 有权
标题翻译：在DCM期间提高开关模式调节器的调节精度的系统和方法
公开(公告)号：US08975885B2
公开(公告)日：2015-03-10
申请号：US13098880
申请日：2011-05-02
申请人： Rhys S. A. Philbrick , Steven P. Laur
发明人： Rhys S. A. Philbrick , Steven P. Laur
IPC分类号： G05F1/56 , H02M3/156 , H02M1/00
CPC分类号： H02M3/156 , H02M2001/0003 , H02M2001/0032 , Y02B70/16
摘要： A controller for a switch mode regulator with discontinuous conduction mode (DCM) correction which includes a correction network and a modulator. The correction network detects a low load condition indicative of regulation error during DCM and asserts an adjust value indicative thereof. The modulator receives the adjust value and adjusts operation accordingly to improve regulation during DCM. The correction network receives or determines a regulation metric, such as periods between successive pulses of a pulse control signal, or a current sense signal indicative of load current, and compares the regulation metric with one or more thresholds for determining the level of adjustment. Adjustment may be made using one or more methods, such as adjusting pulse on-time, adjusting pulse off-time, adjusting frequency of operation, etc.
摘要翻译：一种用于具有不连续导通模式（DCM）校正的开关模式调节器的控制器，其包括校正网络和调制器。校正网络检测在DCM期间指示调节误差的低负载状况，并且确定其指示的调整值。调制器接收调整值并相应调整操作，以改善DCM中的调节。校正网络接收或确定诸如脉冲控制信号的连续脉冲之间的周期或指示负载电流的电流感测信号的调节度量，并且将调节度量与用于确定调整电平的一个或多个阈值进行比较。可以使用一种或多种方法进行调整，例如调节脉冲接通时间，调整脉冲关闭时间，调整操作频率等。

3. 再颁专利

USRE45227E1 Error estimation and correction in a two-channel time-interleaved analog-to-digital converter 有权
标题翻译：双通道时间交织模数转换器中的误差估计和校正
公开(公告)号：USRE45227E1
公开(公告)日：2014-11-04
申请号：US13683118
申请日：2012-11-21
申请人： Intersil Americas, Inc.
发明人： Sunder S. Kidambi
IPC分类号： H03M1/06 , H04B1/16
CPC分类号： H03M1/06 , H03M1/0624 , H03M1/1028 , H03M1/1215 , H04B1/16
摘要： A two-channel time-interleaved analog-to-digital converter (TIADC) system that provides for estimation and correction of offset, gain, and sample-time errors. Error in the offsets of the two ADCs that form the TIADC produces a spurious signal at the Nyquist frequency that can be used to minimize the difference of offsets of the ADCs. The difference in gain between the two ADCs produces spurious signals reflected around the Nyquist frequency whose magnitudes can be reduced by minimizing the difference in signal power between the two ADCs. An Automatic Gain Control loop corrects the scaling of the input signal due to the average of the gains of the ADCs. Phase error produces spurious signals reflected around the Nyquist frequency that are π/2 out of phase with those due to the gain error. Minimizing the difference between the correlation of consecutive signals from the ADCs reduces the magnitude of these image tones.
摘要翻译：双通道时间交织模数转换器（TIADC）系统，提供偏移，增益和采样时间误差的估计和校正。形成TIADC的两个ADC的偏移量误差会产生奈奎斯特频率处的寄生信号，可以将ADC的偏移差减到最小。两个ADC之间的增益差异会产生在奈奎斯特频率周围反射的杂散信号，其幅度可以通过最小化两个ADC之间的信号功率差异来降低。自动增益控制环路由于ADC的增益平均而校正输入信号的比例。相位误差会产生与奈奎斯特频率反射的寄生信号，这些信号与由于增益误差引起的寄生信号相差/ 2相位差。最小化来自ADC的连续信号的相关性之间的差异降低了这些图像色调的幅度。

4. 发明授权

US08797043B2 System and method for detection of open connections between an integrated circuit and a multi-cell battery pack 有权
标题翻译：用于检测集成电路和多单元电池组之间的开路连接的系统和方法
公开(公告)号：US08797043B2
公开(公告)日：2014-08-05
申请号：US13174040
申请日：2011-06-30
申请人： Edgardo Laber , Anthony Allen , Carlos Martinez
发明人： Edgardo Laber , Anthony Allen , Carlos Martinez
IPC分类号： G01R31/02 , G01R31/36
CPC分类号： G01R31/026 , G01R31/043 , G01R31/3658
摘要： An apparatus comprises an integrated circuit and an open connection detection circuit within the integrated circuit. The integrated circuit includes a plurality of inputs for connecting with a plurality of outputs of a multi-cell battery pack. The open connection detection circuit within the integrated circuit detects an open connection on at least one of the plurality of inputs from the multi-cell battery and generates a fault condition responsive thereto.
摘要翻译：一种装置包括集成电路内的集成电路和开路连接检测电路。集成电路包括用于与多单元电池组的多个输出连接的多个输入。集成电路内的开路连接检测电路检测来自多单元电池的多个输入中的至少一个上的开路连接，并响应于此产生故障状态。

5. 发明申请

US20140206300A1 METHODS AND SYSTEMS FOR NOISE AND INTERFERENCE CANCELLATION 有权
标题翻译：噪声和干扰消除的方法和系统
公开(公告)号：US20140206300A1
公开(公告)日：2014-07-24
申请号：US14224595
申请日：2014-03-25
申请人： Intersil Americas Inc.
发明人： Wilhelm Steffen Hahn , Wei Chen
IPC分类号： H04B15/00 , H04B1/44
CPC分类号： H04B15/00 , H04B1/44 , H04B1/52 , H04B1/525
摘要： Signals propagating from an aggressor communication channel can cause detrimental interference in a victim communication channel. One or more noise cancellers can generate an interference compensation signal to suppress or cancel the interference based on one or more settings. A controller can execute algorithms to find preferred settings for the noise canceller(s). The controller can use a feedback signal (e.g., receive signal quality indicator) received from a victim receiver during the execution of the algorithm(s) to find the preferred settings. One exemplary algorithm includes sequentially evaluating the feedback resulting from a predetermined list of settings. Another algorithm includes determining whether to move from one setting to the next based on the feedback values for both settings. Yet another algorithm includes evaluating a number of sample settings to determine which of the sample settings result in a better feedback value and searching around that sample setting for a preferred setting.
摘要翻译：从侵略者通信信道传播的信号可能对受害者通信信道造成有害的干扰。一个或多个噪声消除器可以基于一个或多个设置产生干扰补偿信号以抑制或消除干扰。控制器可以执行算法来找到噪声消除器的优选设置。控制器可以在执行算法期间使用从受害者接收器接收到的反馈信号（例如，接收信号质量指示符）以找到优选设置。一个示例性算法包括从预定的设置列表顺序地评估反馈。另一种算法包括基于两个设置的反馈值确定是否从一个设置移动到下一个设置。另一种算法包括评估多个样本设置，以确定哪个样本设置导致更好的反馈值，并围绕该样本设置搜索优选设置。

6. 发明授权

US08773170B2 Coupling tolerant precision current reference with high PSRR 有权
标题翻译：具有高PSRR的耦合容限精密电流基准
公开(公告)号：US08773170B2
公开(公告)日：2014-07-08
申请号：US13049673
申请日：2011-03-16
申请人： Brian Williams
发明人： Brian Williams
IPC分类号： H02M11/00 , G05F1/56
CPC分类号： G05F1/561
摘要： Embodiments of the present invention are related to circuits and methods for generating a reference current (Idc). In an embodiment, a voltage-to-current converter circuit is used to generate the reference current (Idc) in dependence on a reference voltage (Vref) and a precision resistor (R0), wherein Idc=Vref/R0. A capacitor (C0) is used to shunt noise that couples into the voltage-to-current converter. A frequency dependent feedback network is used to compensate for instabilities introduced by the capacitor (C0). The capacitor (C0) can be used to shunt noise that couples into the voltage-to-current converter by connecting the capacitor (C0) in parallel with the precision resistor (R0). The frequency dependent feedback network can be used to compensate for instabilities introduced by the capacitor (C0) by connecting the frequency dependent feedback network between a feedback terminal of an amplifier of the voltage-to-current converter circuit and a terminal of the capacitor (C0).
摘要翻译：本发明的实施例涉及用于产生参考电流（Idc）的电路和方法。在一个实施例中，电压 - 电流转换器电路用于根据参考电压（Vref）和精密电阻（R0）产生参考电流（Idc），其中Idc = Vref / R0。电容器（C0）用于分流耦合到电压 - 电流转换器中的噪声。频率相关反馈网络用于补偿由电容器（C0）引入的不稳定性。电容器（C0）可用于通过将电容器（C0）与精密电阻（R0）并联连接来分流耦合到电压 - 电流转换器的噪声。频率相关反馈网络可以用于通过连接电压 - 电流转换器电路的放大器的反馈端和电容器的端子（C0）之间的频率相关反馈网络来补偿由电容器（C0）引入的不稳定性）。

7. 发明授权

US08754623B2 System and method for current limiting a DC-DC converter 有权
标题翻译：用于限流DC-DC转换器的系统和方法
公开(公告)号：US08754623B2
公开(公告)日：2014-06-17
申请号：US13687090
申请日：2012-11-28
申请人： Intersil Americas LLC
发明人： Congzhong Huang , Sicheng Chen , Xuelin Wu
IPC分类号： G05F1/44
CPC分类号： G05F1/46 , H02M1/15 , H02M1/32 , H02M3/1582
摘要： A DC-DC voltage converter has a pair of switching transistors to provide an output voltage and are alternately switched in a boost mode of operation responsive to control signals. An inductor is connected to the pair of switching transistor and has an inductor current flowing there through. A current sensor monitors an input current and generates a current sense signal responsive thereto. Control circuitry generates the control signals to the second pair of switching transistors responsive to the current sense signal, the output voltage and a current limit signal, wherein when the current limit signal indicates the inductor current exceeds a current limit the control signals configure the pair of switching transistors to decrease the inductor current.
摘要翻译： DC-DC电压转换器具有一对开关晶体管以提供输出电压，并且响应于控制信号而在升压操作模式中交替切换。电感器连接到该对开关晶体管，并且具有在其中流过的电感器电流。电流传感器监测输入电流并响应于此产生电流检测信号。响应于电流感测信号，输出电压和电流限制信号，控制电路产生对第二对开关晶体管的控制信号，其中当电流限制信号指示电感器电流超过电流限制时，控制信号配置一对开关晶体管降低电感电流。

8. 发明授权

US08742738B2 Voltage regulator system and method for efficiency optimization using duty cycle measurements 有权
标题翻译：电压调节系统和使用占空比测量的效率优化方法
公开(公告)号：US08742738B2
公开(公告)日：2014-06-03
申请号：US13685513
申请日：2012-11-26
申请人： Intersil Americas Inc.
发明人： Michael Jason Houston
IPC分类号： G05F1/00
CPC分类号： G05F1/10 , H02M3/156 , H02M3/1584
摘要： A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator is further calculated if a phase is dropped using the derivative of the duty cycle as a function of the output current. From these operations of calculating, a phase is either added, dropped, or the phase is maintained at its current value to thereby optimize the efficiency of the regulator.
摘要翻译：一种方法和系统控制多相电压调节器中的相位的增加或减少。调节器具有效率，并且对于从输出电压，输入电压，输出电流和调节器的占空比激活的给定数量的相位来计算调节器的效率。如果使用占空比的导数作为输出电流的函数来添加相位，则也可以计算调节器的效率。如果使用占空比的导数作为输出电流的函数降低相位，则进一步计算调节器的效率。从这些计算操作中，相位被添加，下降或相位保持在其当前值，从而优化调节器的效率。

9. 再颁专利

USRE44910E1 Current mode DC/DC converter with controlled output impedance 有权
标题翻译：具有受控输出阻抗的电流模式DC / DC转换器
公开(公告)号：USRE44910E1
公开(公告)日：2014-05-27
申请号：US13250464
申请日：2011-09-30
申请人： Charles E. Hawkes , Michael M. Walters , Robert H. Isham
发明人： Charles E. Hawkes , Michael M. Walters , Robert H. Isham
IPC分类号： G05F1/56
CPC分类号： H02M3/156 , H02M2001/0019
摘要： A DC/DC converter has an output voltage and sources an output current to a load. The DC/DC converter includes an error amplifier with a reference input and a summing input. The reference input is electrically connected to a reference voltage. The summing input is electrically connected to the output voltage and the output current. The summing input is configured for adding together the output voltage and the output current. The error amplifier issues an error signal and adjusts the error signal dependent at least in part upon the output voltage and the output current. A comparator receives the error signal. The comparator has a ramp input electrically connected to a voltage ramp signal. The comparator issues an output signal that is based at least in part upon said error input. A power switch has an on condition and an off condition, and supplies dc current to the load when in the on condition. The power switch has a control input electrically connected to the comparator output signal. The power switch is responsive to the control input to change between the on condition and the off condition to thereby adjust the output current of the DC/DC converter.
摘要翻译： DC / DC转换器具有输出电压并向负载提供输出电流。 DC / DC转换器包括具有参考输入和求和输入的误差放大器。参考输入电连接到参考电压。求和输入与输出电压和输出电流电连接。相加输入被配置为将输出电压和输出电流相加。误差放大器发出误差信号，并至少部分地根据输出电压和输出电流来调整误差信号。比较器接收错误信号。比较器具有电连接到电压斜坡信号的斜坡输入。比较器至少部分地基于所述误差输入发出输出信号。电源开关处于导通状态和关闭状态，并在接通状态下向负载提供直流电流。电源开关具有电连接到比较器输出信号的控制输入。电源开关响应于控制输入以在接通状态和关闭状态之间改变，从而调节DC / DC转换器的输出电流。

10. 发明授权

US08724731B2 Methods and systems for noise and interference cancellation 有权
标题翻译：噪声和干扰消除的方法和系统
公开(公告)号：US08724731B2
公开(公告)日：2014-05-13
申请号：US13014681
申请日：2011-01-26
申请人： Wilhelm Steffen Hahn , Wei Chen
发明人： Wilhelm Steffen Hahn , Wei Chen
IPC分类号： H04B15/00
CPC分类号： H04B15/00 , H04B1/44 , H04B1/52 , H04B1/525
摘要： Signals propagating from an aggressor communication channel can cause detrimental interference in a victim communication channel. One or more noise cancellers can generate an interference compensation signal to suppress or cancel the interference based on one or more settings. A controller can execute algorithms to find preferred settings for the noise canceller(s). The controller can use a feedback signal (e.g., receive signal quality indicator) received from a victim receiver during the execution of the algorithm(s) to find the preferred settings. One exemplary algorithm includes sequentially evaluating the feedback resulting from a predetermined list of settings. Another algorithm includes determining whether to move from one setting to the next based on the feedback values for both settings. Yet another algorithm includes evaluating a number of sample settings to determine which of the sample settings result in a better feedback value and searching around that sample setting for a preferred setting.
摘要翻译：从侵略者通信信道传播的信号可能对受害者通信信道造成有害的干扰。一个或多个噪声消除器可以基于一个或多个设置产生干扰补偿信号以抑制或消除干扰。控制器可以执行算法来找到噪声消除器的优选设置。控制器可以在执行算法期间使用从受害者接收器接收到的反馈信号（例如，接收信号质量指示符）以找到优选设置。一个示例性算法包括从预定的设置列表顺序地评估反馈。另一种算法包括基于两个设置的反馈值确定是否从一个设置移动到下一个设置。另一种算法包括评估多个样本设置，以确定哪个样本设置导致更好的反馈值，并围绕该样本设置搜索优选设置。

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