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    • 8. 发明授权
    • Transmission-line transformer in which signal efficiency is maximised
    • 传输线变压器信号效率最大化
    • US09246206B2
    • 2016-01-26
    • US13824012
    • 2011-09-07
    • Jong Hoon ParkChang Kun Park
    • Jong Hoon ParkChang Kun Park
    • H01P5/12H01F19/00H01P5/10H01F17/00H01P5/04
    • H01P5/12H01F17/0006H01F19/00H01P5/04H01P5/10
    • Provided is a transmission line transformer having increased signal efficiency. The transmission line transformer is formed on an integrated circuit (IC), wherein a first transmission line disposed in one direction. Second and third transmission lines have same length direction as the first transmission line and are spaced apart from each other in a lateral direction above or below the first transmission line. Accordingly, an area of the first transmission line and areas of the second and third transmission lines, which face each other, are increased, thereby improving a coupling factor. Also, since a secondary transmission line is divided into two regions and uses the second and third transmission lines that have narrower widths than the first transmission line, parasitic capacitance components generated between the first through third transmission lines and a semiconductor substrate may be decreased.
    • 提供了具有增加的信号效率的传输线变压器。 传输线变压器形成在集成电路(IC)上,其中沿一个方向布置的第一传输线。 第二传输线和第三传输线具有与第一传输线相同的长度方向,并且在第一传输线上方或下方的横向方向彼此间隔开。 因此,第一传输线的面积和彼此相对的第二和第三传输线的面积增加,从而提高耦合系数。 此外,由于二次传输线被分成两个区域并且使用具有比第一传输线窄的宽度的第二和第三传输线,所以可以减少在第一至第三传输线和半导体衬底之间产生的寄生电容分量。
    • 10. 发明授权
    • Combination-type transistor and method for manufacturing same
    • 组合型晶体管及其制造方法
    • US09159628B2
    • 2015-10-13
    • US14361708
    • 2012-05-15
    • Jong Hoon ParkChang Kun Park
    • Jong Hoon ParkChang Kun Park
    • H01L21/8238H01L27/06H01L27/07H01L21/8228
    • H01L21/8238H01L21/8228H01L27/0623H01L27/0705
    • Disclosed is a combination-type transistor including a first MOSFET that includes a gate, a first source formed on one side of the gate, and a first drain formed on the other side of the gate; a second MOSFET that includes the gate, a second drain formed on the one side of the gate, and a second source formed on the other side of the gate; a first BJT that is formed such that the first source of the first MOSFET is used as an emitter, the second drain of the second MOSFET is used as a collector, and the substrate is used as a base; and a second BJT that is formed such that the second source of the second MOSFET is used as an emitter, the first drain of the first MOSFET is used as a collector, and the substrate is used as a base.
    • 公开了一种组合型晶体管,其包括:第一MOSFET,其包括栅极,形成在栅极一侧的第一源极和形成在栅极的另一侧上的第一漏极; 包括栅极的第二MOSFET,形成在栅极一侧的第二漏极和形成在栅极另一侧的第二源极; 第一BJT被形成为使得第一MOSFET的第一源用作发射极,第二MOSFET的第二漏极用作集电极,并且将衬底用作基极; 以及第二BJT,其被形成为使得第二MOSFET的第二源用作发射极,第一MOSFET的第一漏极用作集电极,并且将衬底用作基极。