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1. 发明授权

US08522322B2 Platform firmware armoring technology 有权
标题翻译：平台固件铠装技术
公开(公告)号：US08522322B2
公开(公告)日：2013-08-27
申请号：US12887866
申请日：2010-09-22
申请人： Allen R. Wishman , Sergiu D. Ghetie , Michael Neve De Mevergnies , Ulhas S. Warrier , Adil Karrar , Douglas R. Moran , Kirk Brannock
发明人： Allen R. Wishman , Sergiu D. Ghetie , Michael Neve De Mevergnies , Ulhas S. Warrier , Adil Karrar , Douglas R. Moran , Kirk Brannock
IPC分类号： G06F21/00
CPC分类号： G06F21/60 , G06F21/572 , G06F21/64 , G06F21/74 , G06F2221/2137
摘要： A method, apparatus, method, machine-readable medium, and system are disclosed. In one embodiment the method includes is a processor. The processor includes switching a platform firmware update mechanism located in a computer platform to a platform firmware armoring technology (PFAT) mode on a boot of the computer platform. The computer platform includes a platform firmware storage location that stores a platform firmware. The method then persistently locks the platform firmware storage location in response to the platform firmware update mechanism switching to the PFAT mode. When persistently locked, writes are only allowed to the platform firmware storage location by an Authenticated Code Module in the running platform and only after a platform firmware update mechanism unlocking procedure.
摘要翻译：公开了一种方法，装置，方法，机器可读介质和系统。在一个实施例中，该方法包括处理器。处理器包括将计算机平台中的平台固件更新机制切换到计算机平台引导时的平台固件铠装技术（PFAT）模式。计算机平台包括存储平台固件的平台固件存储位置。该方法然后持续地锁定平台固件存储位置，以响应平台固件更新机制切换到PFAT模式。当持续锁定时，只能在运行平台中的认证代码模块才允许平台固件存储位置写入，并且只有在平台固件更新机制解锁过程之后才能进行写操作。

2. 发明申请

US20120072734A1 PLATFORM FIRMWARE ARMORING TECHNOLOGY 有权
标题翻译：平台武装装甲技术
公开(公告)号：US20120072734A1
公开(公告)日：2012-03-22
申请号：US12887866
申请日：2010-09-22
申请人： Allen R. Wishman , Sergiu D. Ghetie , Michael Neve De Mevergnies , Ulhas S. Warrier , Adil Karrar , Douglas R. Moran , Kirk Brannock
发明人： Allen R. Wishman , Sergiu D. Ghetie , Michael Neve De Mevergnies , Ulhas S. Warrier , Adil Karrar , Douglas R. Moran , Kirk Brannock
IPC分类号： G06F21/24
CPC分类号： G06F21/60 , G06F21/572 , G06F21/64 , G06F21/74 , G06F2221/2137
摘要： A method, apparatus, method, machine-readable medium, and system are disclosed. In one embodiment the method includes is a processor. The processor includes switching a platform firmware update mechanism located in a computer platform to a platform firmware armoring technology (PFAT) mode on a boot of the computer platform. The computer platform includes a platform firmware storage location that stores a platform firmware. The method then persistently locks the platform firmware storage location in response to the platform firmware update mechanism switching to the PFAT mode. When persistently locked, writes are only allowed to the platform firmware storage location by an Authenticated Code Module in the running platform and only after a platform firmware update mechanism unlocking procedure.
摘要翻译：公开了一种方法，装置，方法，机器可读介质和系统。在一个实施例中，该方法包括处理器。处理器包括将计算机平台中的平台固件更新机制切换到计算机平台引导时的平台固件铠装技术（PFAT）模式。计算机平台包括存储平台固件的平台固件存储位置。该方法然后持续地锁定平台固件存储位置，以响应平台固件更新机制切换到PFAT模式。当持续锁定时，只能在运行平台中的认证代码模块才允许平台固件存储位置写入，并且只有在平台固件更新机制解锁过程之后才能进行写操作。

3. 发明申请

US20150058510A1 VIRTUALIZING INTERRUPT PRIORITY AND DELIVERY 审中-公开
标题翻译：虚拟中断优先和交付
公开(公告)号：US20150058510A1
公开(公告)日：2015-02-26
申请号：US14538941
申请日：2014-11-12
申请人： Gilbert Neiger , Rajesh M. Sankaran , Gideon Gerzon , Richard A. Uhlig , Sergiu D. Ghetie , Michael Neve de Mevergnies , Adil Karrar
发明人： Gilbert Neiger , Rajesh M. Sankaran , Gideon Gerzon , Richard A. Uhlig , Sergiu D. Ghetie , Michael Neve de Mevergnies , Adil Karrar
IPC分类号： G06F13/26 , G06F9/455
CPC分类号： G06F13/26 , G06F9/30076 , G06F9/45541 , G06F9/45558 , G06F13/24 , G06F2009/45579 , G06F2213/0058
摘要： Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events. The execution hardware is to execute the first instruction, execution of the first instruction to include determining a first virtual processor-priority value and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller.
摘要翻译：公开了用于虚拟化中断优先级和传送的处理器，方法和系统的实施例。在一个实施例中，处理器包括指令硬件和执行硬件。指令硬件是接收多个指令，包括将处理器从根模式传送到非根模式的第一指令，用于在虚拟机中执行客户软件，其中处理器将根据该模式返回到根模式检测多个虚拟机退出事件中的任何一个。执行硬件是执行第一指令，执行第一指令以包括确定第一虚拟处理器优先级值并将第一虚拟处理器优先级值存储在处理器优先级字段的虚拟副本中，其中虚拟副本处理器优先级字段是对应于与中断控制器相关联的物理资源的虚拟资源。

4. 发明申请

US20120167205A1 RUNTIME PLATFORM FIRMWARE VERIFICATION 有权
标题翻译：运行平台固件验证
公开(公告)号：US20120167205A1
公开(公告)日：2012-06-28
申请号：US12976523
申请日：2010-12-22
申请人： Sergiu D. Ghetie , Shahrokh Shahidzadeh , Michael Neve de Mevergnies , Adil Karrar , Vincent J. Zimmer
发明人： Sergiu D. Ghetie , Shahrokh Shahidzadeh , Michael Neve de Mevergnies , Adil Karrar , Vincent J. Zimmer
IPC分类号： G06F21/00
CPC分类号： G06F21/572
摘要： Embodiments of the invention are directed towards logic and/or modules stored in processor secure storage to determine whether a first platform firmware image (e.g., basic input/output system (BIOS), device read-only memory (ROM), manageability engine firmware) loaded onto a processor cache is valid. The processor executes the first platform firmware image if it is determined to be valid. If the first platform image is determined to be invalid, a second platform firmware image is located. If this platform firmware image is determined to be valid, the processor will execute said second platform image.In some embodiments of the invention, the determination of whether the first platform firmware image is valid is based, at least in part, on verification of a digital signature associated with the first platform firmware image. The digital signature may be created, for example, from a private key, wherein the digital signature is verified via a public key.
摘要翻译：本发明的实施例针对存储在处理器安全存储器中的逻辑和/或模块来确定第一平台固件映像（例如，基本输入/输出系统（BIOS），设备只读存储器（ROM），可管理性引擎固件）加载到处理器缓存中是有效的。如果判定为有效，则处理器执行第一平台固件映像。如果第一平台图像被确定为无效，则定位第二平台固件图像。如果该平台固件图像被确定为有效，则处理器将执行所述第二平台图像。在本发明的一些实施例中，确定第一平台固件图像是否有效是至少部分地基于与第一平台固件图像相关联的数字签名的验证。可以例如从私钥来创建数字签名，其中通过公钥验证数字签名。

5. 发明授权

US09331855B2 Apparatus, system, and method for providing attribute identity control associated with a processor 有权
标题翻译：用于提供与处理器相关联的属性标识控制的设备，系统和方法
公开(公告)号：US09331855B2
公开(公告)日：2016-05-03
申请号：US13174940
申请日：2011-07-01
申请人： David A. Brown , Adil Karrar , Michael Neve de Mevergnies , Sergiu D. Ghetie , Shahrokh Shahidzadeh
发明人： David A. Brown , Adil Karrar , Michael Neve de Mevergnies , Sergiu D. Ghetie , Shahrokh Shahidzadeh
IPC分类号： G08C17/02 , H04L9/00 , H04L9/32 , G06F21/73
CPC分类号： H04L9/3234 , G06F21/73 , H04L2209/805
摘要： Described herein are an apparatus, system, and method for attribute identity control in a processor. The apparatus comprises a logic unit including a radio-frequency identification (RFID) tag comprising a non-volatile memory; and a processor operable to access the non-volatile memory, wherein the non-volatile memory for storing an attribute identity associated with a group of processors, the attribute identity being different from an identity of the processor.
摘要翻译：这里描述了用于处理器中的属性标识控制的装置，系统和方法。该装置包括一个逻辑单元，该逻辑单元包括一个包括非易失性存储器的射频识别（RFID）标签; 以及可操作以访问所述非易失性存储器的处理器，其中所述非易失性存储器用于存储与一组处理器相关联的属性标识，所述属性标识不同于所述处理器的标识。

6. 发明授权

US08590040B2 Runtime platform firmware verification 有权
标题翻译：运行时平台固件验证
公开(公告)号：US08590040B2
公开(公告)日：2013-11-19
申请号：US12976523
申请日：2010-12-22
申请人： Sergiu D. Ghetie , Shahrokh Shahidzadeh , Michael Neve de Mevergnies , Adil Karrar , Vincent J. Zimmer
发明人： Sergiu D. Ghetie , Shahrokh Shahidzadeh , Michael Neve de Mevergnies , Adil Karrar , Vincent J. Zimmer
IPC分类号： G06F21/00
CPC分类号： G06F21/572
摘要： Embodiments of the invention are directed towards logic and/or modules stored in processor secure storage to determine whether a first platform firmware image (e.g., basic input/output system (BIOS), device read-only memory (ROM), manageability engine firmware) loaded onto a processor cache is valid. The processor executes the first platform firmware image if it is determined to be valid. If the first platform image is determined to be invalid, a second platform firmware image is located. If this platform firmware image is determined to be valid, the processor will execute said second platform image.In some embodiments of the invention, the determination of whether the first platform firmware image is valid is based, at least in part, on verification of a digital signature associated with the first platform firmware image. The digital signature may be created, for example, from a private key, wherein the digital signature is verified via a public key.
摘要翻译：本发明的实施例针对存储在处理器安全存储器中的逻辑和/或模块来确定第一平台固件映像（例如，基本输入/输出系统（BIOS），设备只读存储器（ROM），可管理性引擎固件）加载到处理器缓存中是有效的。如果判定为有效，则处理器执行第一平台固件映像。如果第一平台图像被确定为无效，则定位第二平台固件图像。如果该平台固件图像被确定为有效，则处理器将执行所述第二平台图像。在本发明的一些实施例中，确定第一平台固件图像是否有效是至少部分地基于与第一平台固件图像相关联的数字签名的验证。可以例如从私钥来创建数字签名，其中通过公钥验证数字签名。

7. 发明授权

US08910158B2 Virtualizing interrupt priority and delivery 有权
标题翻译：虚拟化中断优先级和交付
公开(公告)号：US08910158B2
公开(公告)日：2014-12-09
申请号：US13325714
申请日：2011-12-14
申请人： Gilbert Neiger , Rajesh M. Sankaran , Gideon Gerzon , Richard A. Uhlig , Sergiu D. Ghetie , Michael Neve de Mevergnies , Adil Karrar
发明人： Gilbert Neiger , Rajesh M. Sankaran , Gideon Gerzon , Richard A. Uhlig , Sergiu D. Ghetie , Michael Neve de Mevergnies , Adil Karrar
IPC分类号： G06F9/455
CPC分类号： G06F13/26 , G06F9/30076 , G06F9/45541 , G06F9/45558 , G06F13/24 , G06F2009/45579 , G06F2213/0058
摘要： Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events. The execution hardware is to execute the first instruction, execution of the first instruction to include determining a first virtual processor-priority value and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller.
摘要翻译：公开了用于虚拟化中断优先级和传送的处理器，方法和系统的实施例。在一个实施例中，处理器包括指令硬件和执行硬件。指令硬件是接收多个指令，包括将处理器从根模式传送到非根模式的第一指令，用于在虚拟机中执行客户软件，其中处理器将根据该模式返回到根模式检测多个虚拟机退出事件中的任何一个。执行硬件是执行第一指令，执行第一指令以包括确定第一虚拟处理器优先级值并将第一虚拟处理器优先级值存储在处理器优先级字段的虚拟副本中，其中虚拟副本处理器优先级字段是对应于与中断控制器相关联的物理资源的虚拟资源。

8. 发明申请

US20130219191A1 PLATFORM FIRMWARE ARMORING TECHNOLOGY 审中-公开
标题翻译：平台武装装甲技术
公开(公告)号：US20130219191A1
公开(公告)日：2013-08-22
申请号：US13836092
申请日：2013-03-15
申请人： Allen R. Wishman , Sergiu D. Ghetie , Michael Neve De Mevergnies , Ulhas S. Warrier , Adil Karrar , Douglas R. Moran , Kirk Brannock
发明人： Allen R. Wishman , Sergiu D. Ghetie , Michael Neve De Mevergnies , Ulhas S. Warrier , Adil Karrar , Douglas R. Moran , Kirk Brannock
IPC分类号： G06F21/60
CPC分类号： G06F21/60 , G06F21/572 , G06F21/64 , G06F21/74 , G06F2221/2137
摘要： A method, apparatus, machine-readable medium, and system are disclosed. In one embodiment the method includes a processor. The processor includes switching a platform firmware update mechanism located in a computer platform to a platform firmware armoring technology (PFAT) mode on a boot of the computer platform. The computer platform includes a platform firmware storage location that stores a platform firmware. The method then persistently locks the platform firmware storage location in response to the platform firmware update mechanism switching to the PFAT mode. When persistently locked, writes are only allowed to the platform firmware storage location by an Authenticated Code Module in the running platform and only after a platform firmware update mechanism unlocking procedure.
摘要翻译：公开了一种方法，装置，机器可读介质和系统。在一个实施例中，该方法包括处理器。处理器包括将计算机平台中的平台固件更新机制切换到计算机平台引导时的平台固件铠装技术（PFAT）模式。计算机平台包括存储平台固件的平台固件存储位置。该方法然后持续地锁定平台固件存储位置，以响应平台固件更新机制切换到PFAT模式。当持续锁定时，只能在运行平台中的认证代码模块才允许平台固件存储位置写入，并且只有在平台固件更新机制解锁过程之后才能进行写操作。

9. 发明申请

US20130159579A1 VIRTUALIZING INTERRUPT PRIORITY AND DELIVERY 有权
公开(公告)号：US20130159579A1
公开(公告)日：2013-06-20
申请号：US13325714
申请日：2011-12-14
申请人： Gilbert Neiger , Rajesh M. Sankaran , Gideon Gerzon , Richard A. Uhlig , Sergiu D. Ghetie , Michael Neve de Mevergnies , Adil Karrar
发明人： Gilbert Neiger , Rajesh M. Sankaran , Gideon Gerzon , Richard A. Uhlig , Sergiu D. Ghetie , Michael Neve de Mevergnies , Adil Karrar
IPC分类号： G06F13/26
CPC分类号： G06F13/26 , G06F9/30076 , G06F9/45541 , G06F9/45558 , G06F13/24 , G06F2009/45579 , G06F2213/0058
摘要： Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events. The execution hardware is to execute the first instruction, execution of the first instruction to include determining a first virtual processor-priority value and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller.

10. 发明申请

US20130002398A1 Apparatus, System, and Method for Providing Attribute Identity Control Associated with a Processor 有权
标题翻译：用于提供与处理器相关联的属性标识控制的装置，系统和方法
公开(公告)号：US20130002398A1
公开(公告)日：2013-01-03
申请号：US13174940
申请日：2011-07-01
申请人： David A. Brown , Adil Karrar , Michael Neve de Mevergnies , Sergiu D. Ghetie , Shahrokh Shahidzadeh
发明人： David A. Brown , Adil Karrar , Michael Neve de Mevergnies , Sergiu D. Ghetie , Shahrokh Shahidzadeh
IPC分类号： G08C17/02 , H04L9/00
CPC分类号： H04L9/3234 , G06F21/73 , H04L2209/805
摘要： Described herein are an apparatus, system, and method for attribute identity control in a processor. The apparatus comprises a logic unit including a radio-frequency identification (RFID) tag comprising a non-volatile memory; and a processor operable to access the non-volatile memory, wherein the non-volatile memory for storing an attribute identity associated with a group of processors, the attribute identity being different from an identity of the processor.
摘要翻译：这里描述了用于处理器中的属性标识控制的装置，系统和方法。该装置包括一个逻辑单元，该逻辑单元包括一个包括非易失性存储器的射频识别（RFID）标签; 以及可操作以访问所述非易失性存储器的处理器，其中所述非易失性存储器用于存储与一组处理器相关联的属性标识，所述属性标识不同于所述处理器的标识。

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