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1. 发明授权

US08539140B2 Storage device including flash memory and capable of predicting storage device performance based on performance parameters 有权
公开(公告)号：US08539140B2
公开(公告)日：2013-09-17
申请号：US13096731
申请日：2011-04-28
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F12/00
CPC分类号： G06F3/0613 , G06F3/061 , G06F3/0632 , G06F3/0634 , G06F3/0679 , G06F12/0246 , G06F13/385 , G06F2206/1014 , G11C16/20
摘要： A storage device includes a semiconductor memory storing data. A controller instructs to write data to the semiconductor memory in accordance with a request the controller receives. A register holds performance class information showing one performance class required to allow the storage device to demonstrate best performance which the storage device supports, of performance classes specified in accordance with performance.

2. 发明授权

US08516178B2 Programmable memory system 有权
标题翻译：可编程存储系统
公开(公告)号：US08516178B2
公开(公告)日：2013-08-20
申请号：US13527140
申请日：2012-06-19
申请人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
发明人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
IPC分类号： H05K7/10 , G06F3/00 , G06F13/36 , G06F13/42
CPC分类号： G06F13/385 , G06F13/14 , G06F13/4018 , G06F13/4022 , G06F13/409 , G06F13/42 , G06F13/4282 , H05K7/10
摘要： In one embodiment, a system having a non-volatile programmable memory and a controller is provided. The system has data pins that are configured to be accessed in one of a first mode and a second mode such that, in the first mode, the system receives information using one of the data pins and, in the second mode, the system receives information using four of the data pins. The system also has a command pin that is configured to receive a first command, a second command, and a third command, the first command requesting a current operation mode of the data pins, the second command requesting operation voltage information of the system, and the third command setting the system into one of the first and second modes. Additionally, the system has a power signal pin configured to receive power for the system.
摘要翻译：在一个实施例中，提供了具有非易失性可编程存储器和控制器的系统。该系统具有被配置为以第一模式和第二模式之一访问的数据引脚，使得在第一模式中，系统使用数据引脚之一接收信息，并且在第二模式中，系统接收信息使用四个数据引脚。所述系统还具有配置为接收第一命令，第二命令和第三命令的命令管脚，所述第一命令请求所述数据引脚的当前操作模式，所述第二命令请求所述系统的操作电压信息，以及第三个命令将系统设置为第一和第二模式之一。此外，该系统具有被配置为为系统接收电力的电源信号引脚。

3. 发明授权

US08321697B2 Memory device, host device, memory system, memory device control method, host device control method and memory system control method 有权
标题翻译：内存设备，主机设备，内存系统，内存设备控制方式，主机设备控制方式和内存系统控制方式
公开(公告)号：US08321697B2
公开(公告)日：2012-11-27
申请号：US12933586
申请日：2008-09-09
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F1/00
CPC分类号： G06F1/266 , G06K19/07
摘要： A memory card 100 having a NAND type flash memory connectable to a host device 200, capable of transmitting/receiving a signal to/from the host device 200 at a first voltage (3.3 V) or a second voltage (1.8 V) and safely changing a signal voltage of a transmission/reception signal that mutually checks a signal voltage through handshake processing with the host device 200 when the signal voltage is switched.
摘要翻译：存储卡100，其具有可连接到主机设备200的NAND型闪存，能够以第一电压（3.3V）或第二电压（1.8V）向主机设备200发送/接收信号，并且安全地改变当切换信号电压时，通过与主机装置200的握手处理相互检查信号电压的发送/接收信号的信号电压。

4. 发明授权

US08286874B2 Card and host device 有权
标题翻译：卡和主机设备
公开(公告)号：US08286874B2
公开(公告)日：2012-10-16
申请号：US13422916
申请日：2012-03-16
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06K7/06
CPC分类号： G06F3/0679 , G06F3/0604 , G06F3/0608 , G06F3/061 , G06F3/0659 , G06F2003/0697 , G06F2206/1014 , G11C5/143 , H04L1/0061 , H04L2001/0094
摘要： A host device is configured to read and write information from and into a card and to supply a supply voltage that belongs to a first voltage range or a second voltage range which is lower than the first voltage range, and issues a voltage identification command to the card. The voltage identification command includes a voltage range identification section, an error detection section, and a check pattern section. The voltage range identification section includes information indicating which one of the first voltage range and the second voltage range the supply voltage belongs. The error detection section has a pattern configured to enable the card which has received the voltage identification command to detect errors in the voltage identification command. The check pattern section has a preset pattern.
摘要翻译：主机设备被配置为从卡读取和写入信息并提供属于低于第一电压范围的第一电压范围或第二电压范围的电源电压，并且向卡。电压识别命令包括电压范围识别部分，错误检测部分和检查模式部分。电压范围识别部分包括指示电源电压所属的第一电压范围和第二电压范围中的哪一个的信息。错误检测部具有被配置为使已经接收到电压识别命令的卡能够检测电压识别命令中的错误的模式。检查图案部分具有预设图案。

5. 发明申请

US20110029726A1 DATA UPDATING METHOD, MEMORY SYSTEM AND MEMORY DEVICE 有权
标题翻译：数据更新方法，存储器系统和存储器件
公开(公告)号：US20110029726A1
公开(公告)日：2011-02-03
申请号：US12933748
申请日：2008-09-09
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F12/1433 , G06F8/65 , G06F9/4401 , G06F11/1417 , G06F11/1433 , G06F12/0246 , G06F2212/2022 , G06F2212/7206 , G06F2212/7209
摘要： A data updating method, a memory system and a memory device in which the memory device is connectable to a host device and has a memory section and a memory controller, the memory section consists of a first memory section which can be divided into partitions having multiple different attributes, and a work space which is managed by the memory controller, and the method of updating data which is stored in the memory device uses one of the writing methods which has been selected from among multiple different writing methods of writing data into the partition, depending on the attribute of the partition, to perform an updating process, and can securely update the data.
摘要翻译：一种数据更新方法，存储器系统和存储器件，其中存储器件可连接到主机设备并且具有存储器部分和存储器控制器，所述存储器部分由第一存储器部分组成，该第一存储器部分可分为具有多个不同的属性和由存储器控制器管理的工作空间，并且更新存储在存储装置中的数据的更新方法使用从将数据写入分区的多种不同写入方法中选择的写入方法之一，取决于分区的属性，执行更新过程，并可以安全地更新数据。

6. 发明申请

US20100281200A1 ELECTRONIC DEVICE WITH CARD INTERFACE 有权
标题翻译：具有卡片接口的电子设备
公开(公告)号：US20100281200A1
公开(公告)日：2010-11-04
申请号：US12836195
申请日：2010-07-14
申请人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
发明人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
IPC分类号： G06F13/36
CPC分类号： G06F13/385 , G06F13/14 , G06F13/4018 , G06F13/4022 , G06F13/409 , G06F13/42 , G06F13/4282 , H05K7/10
摘要： When initializing a card-shaped device inserted in a card interface, operation mode acquiring means incorporated in an electronic device acquires operation mode information, stored in a register file incorporated in the card-shaped device, by a predetermined procedure using a predetermined pin. Operation mode setting means incorporated in the electronic device executes signal assignment on a plurality of data pins peculiar to an operation mode indicated by the acquired operation mode information, thereby switching a data transfer width, and allowing the card-shaped device to operate in the operation mode.
摘要翻译：当初始化插入卡接口中的卡形装置时，结合在电子装置中的操作模式获取装置通过使用预定的引脚的预定过程获取存储在卡形装置中的寄存器文件中的操作模式信息。结合在电子设备中的操作模式设置装置对由所获取的操作模式信息指示的操作模式特有的多个数据引脚执行信号分配，从而切换数据传输宽度，并且允许卡形设备在操作中操作模式。

7. 发明授权

US07827431B2 Memory card having memory device and host apparatus accessing memory card 失效
标题翻译：存储卡具有存储装置和主机装置访问存储卡
公开(公告)号：US07827431B2
公开(公告)日：2010-11-02
申请号：US11862741
申请日：2007-09-27
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F1/06 , G06F12/00 , G06F13/14
CPC分类号： G06F13/385 , G11C16/32
摘要： A memory card includes a clock I/O circuit, a data I/O circuit, a delay element, and an adjustment value holding circuit. The clock input/output circuit receives a first clock from a host apparatus. The data I/O circuit receives a second clock from the host apparatus in a write timing adjustment mode. The data I/O circuit transmits and receives data to and from the host apparatus in a data transfer mode. In the write timing adjustment mode, the delay element adjusts a phase of the second clock in accordance with the first clock so as to receive the data received in the data transfer mode in response to the first clock. The adjustment value holding circuit holds an adjustment value for the phase of the second clock adjusted. In the data transfer mode, the delay element adjusts a phase of the data in accordance with the adjustment value.
摘要翻译：存储卡包括时钟I / O电路，数据I / O电路，延迟元件和调整值保持电路。时钟输入/输出电路从主机装置接收第一时钟。数据I / O电路以写入定时调整模式从主机装置接收第二时钟。数据I / O电路在数据传送模式下向主机装置发送数据。在写定时调整模式中，延迟元件根据第一时钟调整第二时钟的相位，以响应于第一时钟接收数据传输模式中接收的数据。调整值保持电路保持调整后的第二时钟的相位的调整值。在数据传送模式中，延迟元件根据调整值调整数据的相位。

8. 发明授权

US07774533B2 Electronic device with card interface 有权
标题翻译：电子设备带卡接口
公开(公告)号：US07774533B2
公开(公告)日：2010-08-10
申请号：US12076351
申请日：2008-03-17
申请人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
发明人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
IPC分类号： H05K7/10 , G06F3/00 , G06F13/38 , G06F13/42
CPC分类号： G06F13/385 , G06F13/14 , G06F13/4018 , G06F13/4022 , G06F13/409 , G06F13/42 , G06F13/4282 , H05K7/10
摘要： When initializing a card-shaped device inserted in a card interface, operation mode acquiring means incorporated in an electronic device acquires operation mode information, stored in a register file incorporated in the card-shaped device, by a predetermined procedure using a predetermined pin. Operation mode setting means incorporated in the electronic device executes signal assignment on a plurality of data pins peculiar to an operation mode indicated by the acquired operation mode information, thereby switching a data transfer width, and allowing the card-shaped device to operate in the operation mode.
摘要翻译：当初始化插入卡接口中的卡形装置时，结合在电子装置中的操作模式获取装置通过使用预定的引脚的预定过程获取存储在卡形装置中的寄存器文件中的操作模式信息。结合在电子设备中的操作模式设置装置对由所获取的操作模式信息指示的操作模式特有的多个数据引脚执行信号分配，从而切换数据传输宽度，并且允许卡形设备在操作中操作模式。

9. 发明授权

US07353993B2 Card and host device 有权
标题翻译：卡和主机设备
公开(公告)号：US07353993B2
公开(公告)日：2008-04-08
申请号：US11553002
申请日：2006-10-26
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06K7/06
CPC分类号： G06F3/0679 , G06F3/0604 , G06F3/0608 , G06F3/061 , G06F3/0659 , G06F2003/0697 , G06F2206/1014 , G11C5/143 , H04L1/0061 , H04L2001/0094
摘要： A host device is configured to read and write information from and into a card and to supply a supply voltage that belongs to a first voltage range or a second voltage range which is lower than the first voltage range, and issues a voltage identification command to the card. The voltage identification command includes a voltage range identification section, an error detection section, and a check pattern section. The voltage range identification section includes information indicating which one of the first voltage range and the second voltage range the supply voltage belongs. The error detection section has a pattern configured to enable the card which has received the voltage identification command to detect errors in the voltage identification command. The check pattern section has a preset pattern.
摘要翻译：主机设备被配置为从卡读取和写入信息并提供属于低于第一电压范围的第一电压范围或第二电压范围的电源电压，并且向卡。电压识别命令包括电压范围识别部分，错误检测部分和检查模式部分。电压范围识别部分包括指示电源电压所属的第一电压范围和第二电压范围中的哪一个的信息。错误检测部具有被配置为使已经接收到电压识别命令的卡能够检测电压识别命令中的错误的模式。检查图案部分具有预设图案。

10. 发明申请

US20070220192A1 Electronic device with card interface 有权
标题翻译：电子设备带卡接口
公开(公告)号：US20070220192A1
公开(公告)日：2007-09-20
申请号：US11798582
申请日：2007-05-15
申请人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
发明人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
IPC分类号： G06F13/12
CPC分类号： G06F13/385 , G06F13/14 , G06F13/4018 , G06F13/4022 , G06F13/409 , G06F13/42 , G06F13/4282 , H05K7/10
摘要： When initializing a card-shaped device inserted in a card interface, operation mode acquiring means incorporated in an electronic device acquires operation mode information, stored in a register file incorporated in the card-shaped device, by a predetermined procedure using a predetermined pin. Operation mode setting means incorporated in the electronic device executes signal assignment on a plurality of data pins peculiar to an operation mode indicated by the acquired operation mode information, thereby switching a data transfer width, and allowing the card-shaped device to operate in the operation mode
摘要翻译：当初始化插入卡接口中的卡形装置时，结合在电子装置中的操作模式获取装置通过使用预定的引脚的预定过程获取存储在卡形装置中的寄存器文件中的操作模式信息。结合在电子设备中的操作模式设置装置对由所获取的操作模式信息指示的操作模式特有的多个数据引脚执行信号分配，从而切换数据传输宽度，并且允许卡形设备在操作中操作模式

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