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1. 发明授权

US08874989B2 Memory system capable of increasing data transfer efficiency 有权
标题翻译：能够提高数据传输效率的内存系统
公开(公告)号：US08874989B2
公开(公告)日：2014-10-28
申请号：US13050565
申请日：2011-03-17
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G11C29/00
CPC分类号： H04L1/188 , G06F11/1004 , H04L1/189 , H04L2001/125
摘要： According to one embodiment, a host controller includes a command generator and detector. The command generator generates a command having a retransmission flag in an argument, and transmits the generated command to a memory device. The detector detects timeout if a response from the memory device cannot be recognized within a defined time. When transmitting an initial command, the host controller clears the retransmission flag and transmits the command. If the detector detects timeout, the host controller sets the retransmission flag, and retransmits the same command as the initial command to the device. If a normal response corresponding to the initial command or retransmitted command is received, the host controller recognizes that the command is correctly executed.
摘要翻译：根据一个实施例，主机控制器包括命令发生器和检测器。命令生成器在参数中生成具有重发标志的命令，并将生成的命令发送到存储器件。如果在定义的时间内无法识别来自存储设备的响应，则检测器检测超时。发送初始命令时，主机控制器清除重发标志并发送命令。如果检测器检测到超时，主机控制器设置重传标志，并重新发送与设备初始命令相同的命令。如果接收到与初始命令或重传命令对应的正常响应，则主机控制器识别出该命令被正确执行。

2. 发明授权

US08799689B2 Memory device, host device, memory system, memory device control method, host device control method and memory system control method 有权
标题翻译：内存设备，主机设备，内存系统，内存设备控制方式，主机设备控制方式和内存系统控制方式
公开(公告)号：US08799689B2
公开(公告)日：2014-08-05
申请号：US13667285
申请日：2012-11-02
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F1/00
CPC分类号： G06F1/266 , G06K19/07
摘要： A memory card 100 having a NAND type flash memory connectable to a host device 200, capable of transmitting/receiving a signal to/from the host device 200 at a first voltage (3.3 V) or a second voltage (1.8 V) and safely changing a signal voltage of a transmission/reception signal that mutually checks a signal voltage through handshake processing with the host device 200 when the signal voltage is switched.
摘要翻译：存储卡100，其具有可连接到主机设备200的NAND型闪存，能够以第一电压（3.3V）或第二电压（1.8V）向主机设备200发送/接收信号，并且安全地改变当切换信号电压时，通过与主机装置200的握手处理相互检查信号电压的发送/接收信号的信号电压。

3. 发明授权

US08775724B2 Memory system in which extension function can easily be set 有权
标题翻译：扩展功能可以轻松设置的内存系统
公开(公告)号：US08775724B2
公开(公告)日：2014-07-08
申请号：US13560028
申请日：2012-07-27
申请人： Shinichi Matsukawa , Akihisa Fujimoto
发明人： Shinichi Matsukawa , Akihisa Fujimoto
IPC分类号： G06F12/02 , G06F9/30 , G06F3/06
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0619 , G06F3/064 , G06F3/0679 , G06F9/3004 , G06F9/30141 , G06F2003/0697
摘要： According to one embodiment, a non-transitory medium, a controller, a memory, an extension function section, and an extension register. The controller controls the non-transitory medium. The memory which is serving as a work area is connected to the controller. The extension function section is controlled by the controller. The extension register which is provided on the memory is provided with a certain block length capable of defining an extension function of the extension function section. The controller processes a first command to write header data of a command to operate the extension function section to the extension function section through the extension register, and a second command to read header data of a response from the extension function section through the extension register.
摘要翻译：根据一个实施例，非暂时介质，控制器，存储器，扩展功能部分和扩展寄存器。控制器控制非暂时介质。用作工作区的存储器连接到控制器。扩展功能部分由控制器控制。提供在存储器上的扩展寄存器具有能够定义扩展功能部分的扩展功能的特定块长度。控制器通过扩展寄存器处理第一命令来写入扩展功能部分的扩展功能部分的命令的头部数据，以及通过扩展寄存器从扩展功能部分读出响应的标题数据的第二命令。

4. 发明授权

US08527730B2 Data updating method, memory system and memory device 有权
标题翻译：数据更新方法，存储系统和存储设备
公开(公告)号：US08527730B2
公开(公告)日：2013-09-03
申请号：US12933748
申请日：2008-09-09
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F12/00
CPC分类号： G06F12/1433 , G06F8/65 , G06F9/4401 , G06F11/1417 , G06F11/1433 , G06F12/0246 , G06F2212/2022 , G06F2212/7206 , G06F2212/7209
摘要： A data updating method, a memory system and a memory device in which the memory device is connectable to a host device and has a memory section and a memory controller, the memory section consists of a first memory section which can be divided into partitions having multiple different attributes, and a work space which is managed by the memory controller, and the method of updating data which is stored in the memory device uses one of the writing methods which has been selected from among multiple different writing methods of writing data into the partition, depending on the attribute of the partition, to perform an updating process, and can securely update the data.
摘要翻译：一种数据更新方法，存储器系统和存储器件，其中存储器件可连接到主机设备并且具有存储器部分和存储器控制器，所述存储器部分包括第一存储器部分，其可被划分成具有多个不同的属性和由存储器控制器管理的工作空间，并且更新存储在存储装置中的数据的更新方法使用从将数据写入分区的多种不同写入方法中选择的写入方法之一，取决于分区的属性，执行更新过程，并可以安全地更新数据。

5. 发明授权

US08447896B2 Memory system having high data transfer efficiency and host controller 有权
公开(公告)号：US08447896B2
公开(公告)日：2013-05-21
申请号：US13473212
申请日：2012-05-16
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F12/1081 , G06F3/00 , G06F13/28 , G06F2213/28
摘要： According to one embodiment, the host controller includes a register set to issue command, and a direct memory access (DMA) unit and accesses a system memory and a device. First, second, third and fourth descriptors are stored in the system memory. The first descriptor includes a set of a plurality of pointers indicating a plurality of second descriptors. Each of the second descriptors comprises the third descriptor and fourth descriptor. The third descriptor includes a command number, etc. The fourth descriptor includes information indicating addresses and sizes of a plurality of data arranged in the system memory. The DMA unit sets, in the register set, the contents of the third descriptor forming the second descriptor, from the head of the first descriptor as a start point, and transfers data between the system memory and the host controller in accordance with the contents of the fourth descriptor.

6. 发明授权

US08219733B2 Electronic device with card interface 有权
标题翻译：电子设备带卡接口
公开(公告)号：US08219733B2
公开(公告)日：2012-07-10
申请号：US13191958
申请日：2011-07-27
申请人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
发明人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
IPC分类号： H05K7/10 , G06F3/00 , G06F13/36 , G06F13/42
CPC分类号： G06F13/385 , G06F13/14 , G06F13/4018 , G06F13/4022 , G06F13/409 , G06F13/42 , G06F13/4282 , H05K7/10
摘要： When initializing a device, an operation mode of the device is acquired and stored by a predetermined procedure using a predetermined pin. In response to a command, the device executes a signal assignment on a plurality of data pins peculiar to an operation mode indicated by the received command, thereby switching a data transfer width, and allowing the device to operate in the operation mode designated by the received command.
摘要翻译：当初始化设备时，通过使用预定的引脚的预定过程获取并存储设备的操作模式。响应于命令，设备在由接收到的命令指示的操作模式特有的多个数据引脚上执行信号分配，从而切换数据传输宽度，并允许设备以由接收的指定的操作模式操作命令。

7. 发明授权

US07953950B2 Storage device including flash memory and capable of predicting storage device performance 有权
标题翻译：存储设备包括闪存并能够预测存储设备性能
公开(公告)号：US07953950B2
公开(公告)日：2011-05-31
申请号：US11557120
申请日：2006-11-07
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F13/00
CPC分类号： G06F3/0613 , G06F3/061 , G06F3/0632 , G06F3/0634 , G06F3/0679 , G06F12/0246 , G06F13/385 , G06F2206/1014 , G11C16/20
摘要： A storage device includes a semiconductor memory storing data. A controller instructs to write data to the semiconductor memory in accordance with a request the controller receives. A register holds performance class information showing one performance class required to allow the storage device to demonstrate best performance which the storage device supports, of performance classes specified in accordance with performance.
摘要翻译：存储装置包括存储数据的半导体存储器。控制器指示根据控制器接收的请求向半导体存储器写入数据。注册表保存性能等级信息，显示一个性能等级，允许存储设备显示存储设备支持的最佳性能，根据性能指定的性能等级。

8. 发明申请

US20100125698A1 RECORDABLE MEMORY DEVICE 有权
标题翻译：可记录存储器件
公开(公告)号：US20100125698A1
公开(公告)日：2010-05-20
申请号：US12562380
申请日：2009-09-18
申请人： Akihisa Fujimoto
发明人： Akihisa Fujimoto
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/0643 , G06F3/0644 , G06F3/0679 , G06F2212/7202
摘要： A recordable memory device includes a nonvolatile semiconductor memory, and a controller controlling the nonvolatile semiconductor memory based on a recordable system. The nonvolatile semiconductor memory has a user area capable of directly making an access from a host, and a system area managed by the controller. A data writing to the reformatted user area of the nonvolatile semiconductor memory executes from a start point which is an unused area after the final physical address of old recordable data recorded in the user area before the reformat. The data writing executes from a start point which is a top physical address in the user area, when the start point exceeds the final physical address in the user area.
摘要翻译：可记录存储器件包括非易失性半导体存储器和基于可记录系统控制非易失性半导体存储器的控制器。非易失性半导体存储器具有能够直接从主机访问的用户区域和由控制器管理的系统区域。对非易失性半导体存储器的重新格式化的用户区域的数据写入从在重新格式化之前记录在用户区域中的旧的可记录数据的最终物理地址之后的未使用区域的起始点执行。当起始点超过用户区域中的最终物理地址时，数据写入从作为用户区域中顶层物理地址的起始点执行。

9. 发明申请

US20080235427A1 Electronic device with card interface 有权
公开(公告)号：US20080235427A1
公开(公告)日：2008-09-25
申请号：US12076351
申请日：2008-03-17
申请人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
发明人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
IPC分类号： G06F13/00
CPC分类号： G06F13/385 , G06F13/14 , G06F13/4018 , G06F13/4022 , G06F13/409 , G06F13/42 , G06F13/4282 , H05K7/10
摘要： When initializing a card-shaped device inserted in a card interface, operation mode acquiring means incorporated in an electronic device acquires operation mode information, stored in a register file incorporated in the card-shaped device, by a predetermined procedure using a predetermined pin. Operation mode setting means incorporated in the electronic device executes signal assignment on a plurality of data pins peculiar to an operation mode indicated by the acquired operation mode information, thereby switching a data transfer width, and allowing the card-shaped device to operate in the operation mode.

10. 发明授权

US07350009B2 Electronic device with card interface 有权
标题翻译：电子设备带卡接口
公开(公告)号：US07350009B2
公开(公告)日：2008-03-25
申请号：US11600782
申请日：2006-11-17
申请人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
发明人： Kosei Okamoto , Hiroyuki Sakamoto , Akihisa Fujimoto , Masao Suga
IPC分类号： G06F13/00 , H05K1/00 , G06F13/24
CPC分类号： G06F13/385 , G06F13/14 , G06F13/4018 , G06F13/4022 , G06F13/409 , G06F13/42 , G06F13/4282 , H05K7/10
摘要： When initializing a card-shaped device inserted in a card interface, operation mode acquiring means incorporated in an electronic device acquires operation mode information, stored in a register file incorporated in the card-shaped device, by a predetermined procedure using a predetermined pin. Operation mode setting means incorporated in the electronic device executes signal assignment on a plurality of data pins peculiar to an operation mode indicated by the acquired operation mode information, thereby switching a data transfer width, and allowing the card-shaped device to operate in the operation mode.
摘要翻译：当初始化插入卡接口中的卡形装置时，结合在电子装置中的操作模式获取装置通过使用预定的引脚的预定过程获取存储在卡形装置中的寄存器文件中的操作模式信息。结合在电子设备中的操作模式设置装置对由所获取的操作模式信息指示的操作模式特有的多个数据引脚执行信号分配，从而切换数据传输宽度，并且允许卡形设备在操作中操作模式。

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