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1. 发明授权

US08578084B2 Data storage device having multiple removable memory boards 有权
标题翻译：数据存储设备具有多个可移动存储器板
公开(公告)号：US08578084B2
公开(公告)日：2013-11-05
申请号：US12537719
申请日：2009-08-07
申请人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
发明人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
IPC分类号： G06F12/02 , G06F13/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board and a second memory board, where the first memory board and the second memory board each comprise multiple memory chips. The data storage device may include a controller board that is arranged and configured to operably connect to the first memory board and the second memory board, where the controller board includes a high speed interface and a controller that is arranged and configured to receive commands from a host using the high speed interface and to execute the commands, where the first memory board and the second memory board are each separately removable from the controller board.
摘要翻译：数据存储设备可以包括第一存储器板和第二存储器板，其中第一存储器板和第二存储器板各自包括多个存储器芯片。数据存储设备可以包括控制器板，其被布置和配置为可操作地连接到第一存储器板和第二存储器板，其中控制器板包括高速接口和控制器，其被布置和配置为从主机使用高速接口并执行命令，其中第一存储器板和第二存储器板分别可从控制器板移除。

2. 发明授权

US08327220B2 Data storage device with verify on write command 有权
标题翻译：具有写命令验证的数据存储设备
公开(公告)号：US08327220B2
公开(公告)日：2012-12-04
申请号：US13269985
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a verify on write command from the host using the interface, write data to one of the memory devices, read the data from the memory device, calculate an error correction code for the data as the data is being read, verify the data was written correctly to the memory device using the error correction code and communicate results to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收写命令验证，将数据写入存储器件之一，从存储器件读取数据，在数据被读取时计算数据的纠错码，使用纠错码验证数据是否正确写入存储设备，并使用该接口将结果传达给主机。

3. 发明授权

US08239713B2 Data storage device with bad block scan command 有权
标题翻译：具有坏块扫描命令的数据存储设备
公开(公告)号：US08239713B2
公开(公告)日：2012-08-07
申请号：US13269972
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G11C29/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a bad block scan command for a specified one of the memory devices from the host using the interface, scan the specified memory device for bad blocks, generate a map of the bad blocks and communicate the map to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收指定的一个存储器设备的坏块扫描命令，扫描指定的存储器件以获得坏块，生成坏块的映射并使用界面。

4. 发明申请

US20120030416A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20120030416A1
公开(公告)日：2012-02-02
申请号：US13269972
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a bad block scan command for a specified one of the memory devices from the host using the interface, scan the specified memory device for bad blocks, generate a map of the bad blocks and communicate the map to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收指定的一个存储器设备的坏块扫描命令，扫描指定的存储器件以获得坏块，生成坏块的映射并使用界面。

5. 发明申请

US20100262766A1 GARBAGE COLLECTION FOR FAILURE PREDICTION AND REPARTITIONING 有权
标题翻译： GARBAGE收集失败的预测和重新分配
公开(公告)号：US20100262766A1
公开(公告)日：2010-10-14
申请号：US12755964
申请日：2010-04-07
申请人： Robert Stevan Sprinkle , Albert T. Borchers , Andrew Timothy Swing
发明人： Robert Stevan Sprinkle , Albert T. Borchers , Andrew Timothy Swing
IPC分类号： G06F12/00 , G06F12/02 , G06F11/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A method of formatting a data storage device that includes a plurality of flash memory chips includes monitoring a failure rate of memory blocks of one or more flash memory chips of a storage device that has a first usable size for user space applications, estimating a future usable size of the data storage device based on the monitored failure rate, and defining, via a host coupled to the data storage device, a second usable size of the data storage device for user space applications based on the monitored failure rate.
摘要翻译：格式化包括多个闪速存储器芯片的数据存储设备的方法包括监视具有用于用户空间应用的第一可用尺寸的存储设备的一个或多个闪存芯片的存储块的故障率，估计未来可用基于所监视的故障率的数据存储设备的大小，以及基于所监视的故障率，经由耦合到数据存储设备的主机定义用于用户空间应用的数据存储设备的第二可用大小。

6. 发明申请

US20100262761A1 PARTITIONING A FLASH MEMORY DATA STORAGE DEVICE 有权
标题翻译：分区闪存数据存储设备
公开(公告)号：US20100262761A1
公开(公告)日：2010-10-14
申请号：US12537741
申请日：2009-08-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A method of partitioning a data storage device that has a plurality of memory chips includes determining a number memory chips in the data storage device, defining, via a host coupled to the data storage device, a first partition of the data storage device, where the first partition includes a first subset of the plurality of memory chips, defining a second partition of the data storage device via the host where the second partition includes a second subset of the plurality of memory chips, such that the first subset does not include any memory chips of the second subset and wherein the second subset does not include any memory chips of the first subset.
摘要翻译：一种划分具有多个存储器芯片的数据存储设备的方法包括确定数据存储设备中的数字存储器芯片，经由耦合到数据存储设备的主机定义数据存储设备的第一分区，其中第一分区包括多个存储器芯片的第一子集，经由主机定义数据存储设备的第二分区，其中第二分区包括多个存储器芯片的第二子集，使得第一子集不包括任何存储器第二子集的芯片，并且其中第二子集不包括第一子集的任何存储器芯片。

7. 发明申请

US20100262760A1 COMMAND PROCESSOR FOR A DATA STORAGE DEVICE 有权
标题翻译：数据存储设备的命令处理器
公开(公告)号：US20100262760A1
公开(公告)日：2010-10-14
申请号：US12537722
申请日：2009-08-07
申请人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle
发明人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle
IPC分类号： G06F12/02 , G06F3/00 , G06F12/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： An apparatus for queuing and ordering commands for a data storage device may include a slot tracker module that is arranged and configured to track available slots for commands from a host, a command transfer module that is operably coupled to the slot tracker module and that is arranged and configured to retrieve commands from the host based on a number of the available slots, a pending command module that is operably coupled to the command transfer module and that is arranged and configured to queue and order the commands from the host for processing using an ordered list that is based on an age of the commands and a task dispatch module that is operably coupled to the pending command module and that is arranged and configured to dispatch the commands for processing using the ordered list from the pending command module and an availability of storage locations.
摘要翻译：用于为数据存储设备排队和排序命令的设备可以包括槽跟踪器模块，其被布置和配置为跟踪来自主机的命令的可用时隙，命令传输模块，其可操作地耦合到时隙跟踪器模块并且被布置并且被配置为基于多个可用时隙从主机检索命令，即可以命名的命令模块，其可操作地耦合到命令传送模块，并且被配置和配置为从主机排队和排序命令以使用订购的处理列表，其基于命令的年龄和可操作地耦合到待命命令模块的任务分派模块，并且被布置和配置为使用来自挂起命令模块的有序列表来分派用于处理的命令以及存储器的可用性位置。

8. 发明授权

US08566507B2 Data storage device capable of recognizing and controlling multiple types of memory chips 有权
标题翻译：能够识别和控制多种类型的存储芯片的数据存储装置
公开(公告)号：US08566507B2
公开(公告)日：2013-10-22
申请号：US12537704
申请日：2009-08-07
申请人： Robert S. Sprinkle , Andrew T. Swing , Albert T. Borchers
发明人： Robert S. Sprinkle , Andrew T. Swing , Albert T. Borchers
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board having multiple memory chips and a controller board that is arranged and configured to operably connect to the first memory board. The controller board may include an interface to a host and a controller that is arranged and configured to control command processing for multiple different types of memory chips, automatically recognize a type of the memory chips on the first memory board, receive commands from the host using the interface, and execute the commands using the memory chips.
摘要翻译：数据存储设备可以包括具有多个存储器芯片的第一存储器板和布置和配置为可操作地连接到第一存储器板的控制器板。控制器板可以包括与主机的接口和被配置和配置为控制多种不同类型的存储器芯片的命令处理的控制器，自动识别第一存储器板上的存储器芯片的类型，从主机接收命令使用界面，并使用内存芯片执行命令。

9. 发明授权

US08433845B2 Data storage device which serializes memory device ready/busy signals 有权
标题翻译：数据存储设备，用于串行化存储设备就绪/忙信号
公开(公告)号：US08433845B2
公开(公告)日：2013-04-30
申请号：US12756009
申请日：2010-04-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers.
摘要翻译：数据存储设备可以包括命令总线，状态总线，可操作地耦合到命令总线和状态总线的多个存储器设备，以及包括多个通道控制器的控制器，其中通道控制器可操作地耦合到命令总线并且状态总线和每个通道控制器被布置和配置为控制一个或多个存储器件。数据存储设备可以包括可操作地耦合到状态总线的多个可编程逻辑器件，其中每个可编程逻辑器件被配置为在其中一个通道控制器的控制下从每个存储器器件中检索就绪/忙信号，状态总线，串行化就绪/忙信号，并将串行的就绪/忙信号传送给通道控制器。

10. 发明申请

US20100262767A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20100262767A1
公开(公告)日：2010-10-14
申请号：US12756009
申请日：2010-04-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers.
摘要翻译：数据存储设备可以包括命令总线，状态总线，可操作地耦合到命令总线和状态总线的多个存储器设备，以及包括多个通道控制器的控制器，其中通道控制器可操作地耦合到命令总线并且状态总线和每个通道控制器被布置和配置为控制一个或多个存储器件。数据存储设备可以包括可操作地耦合到状态总线的多个可编程逻辑器件，其中每个可编程逻辑器件被配置为在其中一个通道控制器的控制下从每个存储器器件中检索就绪/忙信号，状态总线，串行化就绪/忙信号，并将串行的就绪/忙信号传送给通道控制器。

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