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1. 发明授权

US08239729B2 Data storage device with copy command 有权
标题翻译：具有复制命令的数据存储设备
公开(公告)号：US08239729B2
公开(公告)日：2012-08-07
申请号：US13269183
申请日：2011-10-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： H03M13/00 , G11C29/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a copy command from the host using the interface, read data from a source memory device in response to the copy command, write the data to a destination memory device in response to the copy command and communicate results to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收复制命令，响应于复制命令从源存储器设备读取数据，响应于复制命令将数据写入目的地存储设备，并将结果传达给主机使用界面。

2. 发明授权

US08433845B2 Data storage device which serializes memory device ready/busy signals 有权
标题翻译：数据存储设备，用于串行化存储设备就绪/忙信号
公开(公告)号：US08433845B2
公开(公告)日：2013-04-30
申请号：US12756009
申请日：2010-04-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers.
摘要翻译：数据存储设备可以包括命令总线，状态总线，可操作地耦合到命令总线和状态总线的多个存储器设备，以及包括多个通道控制器的控制器，其中通道控制器可操作地耦合到命令总线并且状态总线和每个通道控制器被布置和配置为控制一个或多个存储器件。数据存储设备可以包括可操作地耦合到状态总线的多个可编程逻辑器件，其中每个可编程逻辑器件被配置为在其中一个通道控制器的控制下从每个存储器器件中检索就绪/忙信号，状态总线，串行化就绪/忙信号，并将串行的就绪/忙信号传送给通道控制器。

3. 发明申请

US20100262767A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20100262767A1
公开(公告)日：2010-10-14
申请号：US12756009
申请日：2010-04-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers.
摘要翻译：数据存储设备可以包括命令总线，状态总线，可操作地耦合到命令总线和状态总线的多个存储器设备，以及包括多个通道控制器的控制器，其中通道控制器可操作地耦合到命令总线并且状态总线和每个通道控制器被布置和配置为控制一个或多个存储器件。数据存储设备可以包括可操作地耦合到状态总线的多个可编程逻辑器件，其中每个可编程逻辑器件被配置为在其中一个通道控制器的控制下从每个存储器器件中检索就绪/忙信号，状态总线，串行化就绪/忙信号，并将串行的就绪/忙信号传送给通道控制器。

4. 发明授权

US08239724B2 Error correction for a data storage device 有权
标题翻译：数据存储设备的纠错
公开(公告)号：US08239724B2
公开(公告)日：2012-08-07
申请号：US12537725
申请日：2009-08-07
申请人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle , Jason W. Klaus , Thomas J. Norrie , Benjamin S. Gelb
发明人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle , Jason W. Klaus , Thomas J. Norrie , Benjamin S. Gelb
IPC分类号： H03M13/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： An apparatus for error correction for a data storage device may include an input interface that is configured to receive individual error correction requests to correct data from multiple channel controllers and that is configured to receive error correction information corresponding to the error correction requests, where each of the channel controllers is arranged and configured to control operations associated with one or more memory chips. The apparatus may include a corrector module that is operably coupled to the input interface and that is arranged and configured to perform error correction using an error correction algorithm and the error correction information to generate correction solutions, where the corrector module is a shared resource for the multiple channel controllers. The apparatus may include an output interface that is operably coupled to the corrector module and that is arranged and configured to communicate the correction solutions to the channel controllers.
摘要翻译：用于数据存储设备的用于纠错的装置可以包括输入接口，其被配置为接收单个纠错请求以从多个信道控制器校正数据，并且被配置为接收对应于纠错请求的纠错信息，其中每个通道控制器被布置和配置为控制与一个或多个存储器芯片相关联的操作。该装置可以包括校正器模块，其可操作地耦合到输入接口，并且被布置和配置为使用纠错算法和纠错信息执行纠错，以产生校正解，其中校正器模块是用于多通道控制器该装置可以包括可操作地耦合到校正器模块的输出接口，并且被配置和配置为将校正解决方案传送到通道控制器。

5. 发明申请

US20120030507A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20120030507A1
公开(公告)日：2012-02-02
申请号：US13269985
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F11/08
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a verify on write command from the host using the interface, write data to one of the memory devices, read the data from the memory device, calculate an error correction code for the data as the data is being read, verify the data was written correctly to the memory device using the error correction code and communicate results to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收写命令验证，将数据写入存储器件之一，从存储器件读取数据，在数据被读取时计算数据的纠错码，使用纠错码验证数据是否正确写入存储设备，并使用该接口将结果传达给主机。

6. 发明申请

US20100262759A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20100262759A1
公开(公告)日：2010-10-14
申请号：US12537719
申请日：2009-08-07
申请人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
发明人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
IPC分类号： G06F13/00 , G06F12/02
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board and a second memory board, where the first memory board and the second memory board each comprise multiple memory chips. The data storage device may include a controller board that is arranged and configured to operably connect to the first memory board and the second memory board, where the controller board includes a high speed interface and a controller that is arranged and configured to receive commands from a host using the high speed interface and to execute the commands, where the first memory board and the second memory board are each separately removable from the controller board.
摘要翻译：数据存储设备可以包括第一存储器板和第二存储器板，其中第一存储器板和第二存储器板各自包括多个存储器芯片。数据存储设备可以包括控制器板，其被布置和配置为可操作地连接到第一存储器板和第二存储器板，其中控制器板包括高速接口和控制器，其被布置和配置为从主机使用高速接口并执行命令，其中第一存储器板和第二存储器板分别可从控制器板移除。

7. 发明授权

US08578084B2 Data storage device having multiple removable memory boards 有权
标题翻译：数据存储设备具有多个可移动存储器板
公开(公告)号：US08578084B2
公开(公告)日：2013-11-05
申请号：US12537719
申请日：2009-08-07
申请人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
发明人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
IPC分类号： G06F12/02 , G06F13/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board and a second memory board, where the first memory board and the second memory board each comprise multiple memory chips. The data storage device may include a controller board that is arranged and configured to operably connect to the first memory board and the second memory board, where the controller board includes a high speed interface and a controller that is arranged and configured to receive commands from a host using the high speed interface and to execute the commands, where the first memory board and the second memory board are each separately removable from the controller board.
摘要翻译：数据存储设备可以包括第一存储器板和第二存储器板，其中第一存储器板和第二存储器板各自包括多个存储器芯片。数据存储设备可以包括控制器板，其被布置和配置为可操作地连接到第一存储器板和第二存储器板，其中控制器板包括高速接口和控制器，其被布置和配置为从主机使用高速接口并执行命令，其中第一存储器板和第二存储器板分别可从控制器板移除。

8. 发明授权

US08327220B2 Data storage device with verify on write command 有权
标题翻译：具有写命令验证的数据存储设备
公开(公告)号：US08327220B2
公开(公告)日：2012-12-04
申请号：US13269985
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a verify on write command from the host using the interface, write data to one of the memory devices, read the data from the memory device, calculate an error correction code for the data as the data is being read, verify the data was written correctly to the memory device using the error correction code and communicate results to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收写命令验证，将数据写入存储器件之一，从存储器件读取数据，在数据被读取时计算数据的纠错码，使用纠错码验证数据是否正确写入存储设备，并使用该接口将结果传达给主机。

9. 发明授权

US08239713B2 Data storage device with bad block scan command 有权
标题翻译：具有坏块扫描命令的数据存储设备
公开(公告)号：US08239713B2
公开(公告)日：2012-08-07
申请号：US13269972
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G11C29/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a bad block scan command for a specified one of the memory devices from the host using the interface, scan the specified memory device for bad blocks, generate a map of the bad blocks and communicate the map to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收指定的一个存储器设备的坏块扫描命令，扫描指定的存储器件以获得坏块，生成坏块的映射并使用界面。

10. 发明申请

US20120030416A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20120030416A1
公开(公告)日：2012-02-02
申请号：US13269972
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a bad block scan command for a specified one of the memory devices from the host using the interface, scan the specified memory device for bad blocks, generate a map of the bad blocks and communicate the map to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收指定的一个存储器设备的坏块扫描命令，扫描指定的存储器件以获得坏块，生成坏块的映射并使用界面。

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