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1. 发明授权

US08896349B2 Low voltage detector 有权
标题翻译：低电压检测器
公开(公告)号：US08896349B2
公开(公告)日：2014-11-25
申请号：US13161954
申请日：2011-06-16
申请人： Andre Luis Vilas Boas , Alfredo Olmos , Edgar Mauricio Camacho Galeano , Fabio de Lacerda
发明人： Andre Luis Vilas Boas , Alfredo Olmos , Edgar Mauricio Camacho Galeano , Fabio de Lacerda
IPC分类号： H03K5/153
CPC分类号： G01R19/32 , G01R19/16519 , G01R19/16542 , G01R19/16576
摘要： A low voltage detector (100) includes a power supply voltage monitor circuit (110) that produces a voltage VSP related to a first a power supply voltage, and a voltage generator (105), which includes a plurality of self-cascode MOSFET (SCM) structures (101-103) in a cascade configuration, that generates a reference voltage Vxm. A voltage comparator (140) outputs an output signal in response to a differential between Vxm and VSP, wherein Vxm and VSP have proportional to absolute temperature behavior (PTAT) over temperature with respect to a second power supply voltage. The output signal changes state when the first power supply voltage equals a trip point of the comparator. Each SCM structure is sized to provide a rate of change with temperature of the PTAT behavior of Vxm that matches a rate of change with temperature of the PTAT behavior of VSP.
摘要翻译：低电压检测器（100）包括产生与第一电源电压相关的电压VSP的电源电压监视电路（110），以及电压发生器（105），其包括多个自共源共栅MOSFET（SCM ）结构（101-103），其产生参考电压Vxm。电压比较器（140）响应于Vxm和VSP之间的差分输出输出信号，其中Vxm和VSP与温度相对于第二电源电压的绝对温度特性（PTAT）成比例。当第一电源电压等于比较器的跳变点时，输出信号改变状态。每个SCM结构的大小可以提供与VMI的PTAT行为的温度的变化率，其与VSP的PTAT行为的温度的变化率匹配。

2. 发明授权

US08339152B2 Test structure activated by probe needle 有权
标题翻译：由探针激活的测试结构
公开(公告)号：US08339152B2
公开(公告)日：2012-12-25
申请号：US12749621
申请日：2010-03-30
申请人： Fabio Duarte De Martin , Andre Luis Vilas Boas
发明人： Fabio Duarte De Martin , Andre Luis Vilas Boas
IPC分类号： G01R31/26
CPC分类号： G01R31/2884 , G01R31/2896
摘要： A test structure (200) in an integrated circuit (100) includes a probe pad (210) disposed at a surface of a die (102) of the integrated circuit, a transmission gate (202) for connecting portions of an electronic circuit within the integrated circuit in response to a momentary signal applied to the probe pad, a first inverter (221) having an input coupled to the probe pad and having an output coupled to a control input of the transmission gate, and a second inverter (222) having an input coupled to an output of the first inverter and having an output coupled to another control input of the transmission gate. The output of the second inverter is coupled to the input of the first inverter. Upon power-up, the transmission gate is open. After the momentary signal is applied to the probe pad, the transmission gate closes and remains closed until power is disconnected.
摘要翻译：集成电路（100）中的测试结构（200）包括设置在集成电路的管芯（102）的表面处的探针焊盘（210），用于连接集成电路内的电子电路的部分的传输门（202）响应于施加到所述探针焊盘的瞬时信号的第一反相器（221），具有耦合到所述探针焊盘并具有耦合到所述传输门的控制输入的输出的输入的第一反相器（221）和具有耦合到所述传输门的控制输入的第二反相器（222）输入端，耦合到第一反相器的输出，并且具有耦合到传输门的另一个控制输入的输出。第二反相器的输出耦合到第一反相器的输入端。上电时，传输门打开。在将瞬时信号施加到探针垫之后，传输门关闭并保持关闭，直到电源断开。

3. 发明申请

US20120281491A1 DATA PROCESSING SYSTEM HAVING BROWN-OUT DETECTION CIRCUIT 有权
标题翻译：具有欠压检测电路的数据处理系统
公开(公告)号：US20120281491A1
公开(公告)日：2012-11-08
申请号：US13553095
申请日：2012-07-19
申请人： Chris C. Dao , Stefano Pietri , Andre Luis Vilas Boas
发明人： Chris C. Dao , Stefano Pietri , Andre Luis Vilas Boas
IPC分类号： G11C5/14
CPC分类号： G01R19/16552 , G01R19/16519 , G06F11/3024 , G06F11/3062 , G06F11/3093 , G11C11/417
摘要： A data processing system includes a brown-out detection circuit with a first resistive element, a first transistor, a second transistor, and a comparator. The first resistive element has a first terminal coupled to a first power supply voltage terminal, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistive element, a control electrode, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. The comparator has a first input terminal coupled to the first terminal of the first resistive element, a second input terminal coupled to the second terminal of the first resistive element, and an output terminal for providing a brown-out detection signal.
摘要翻译：数据处理系统包括具有第一电阻元件的欠压检测电路，第一晶体管，第二晶体管和比较器。第一电阻元件具有耦合到第一电源电压端子的第一端子和第二端子。第一晶体管具有耦合到第一电阻元件的第二端子的第一电流电极，控制电极和第二电流电极。第二晶体管具有耦合到第一晶体管的第二电流电极的第一电流电极，耦合到第二电源电压端子的控制电极和第二电流电极。比较器具有耦合到第一电阻元件的第一端子的第一输入端子，耦合到第一电阻元件的第二端子的第二输入端子和用于提供欠压检测信号的输出端子。

4. 发明授权

US08253453B2 Brown-out detection circuit 有权
标题翻译：欠压检测电路
公开(公告)号：US08253453B2
公开(公告)日：2012-08-28
申请号：US12914168
申请日：2010-10-28
申请人： Andre Luis Vilas Boas , Chris C. Dao , Stefano Pietri
发明人： Andre Luis Vilas Boas , Chris C. Dao , Stefano Pietri
IPC分类号： H03K3/02 , H03K5/153
CPC分类号： H03K17/223 , G06F1/28
摘要： A data processing system (100), such as a System-on-Chip, includes a processor (120), a memory (140) that has an expected minimum data retention voltage, and a brown-out detector (160), which includes a brown-out detection circuit (201) that has an analog output, and an output circuit (248 and 252) that converts the analog output of the brown-out detection circuit to a digital brown-out flag. The brown-out detection circuit includes a self-biased current reference, current mirrors, and a current comparator. The brown-out detector monitors voltage of a power supply of the memory, and the brown-out detector asserts the digital brown-out flag to the processor when the voltage of the power supply is at, or slightly above, a highest expected minimum data retention voltage.
摘要翻译：诸如片上系统的数据处理系统（100）包括处理器（120），具有期望的最小数据保持电压的存储器（140）和欠压检测器（160），其包括具有模拟输出的欠压检测电路（201）和将欠压检测电路的模拟输出转换为数字欠压标志的输出电路（248和253）。欠压检测电路包括自偏置电流基准，电流镜和电流比较器。欠压检测器监测存储器电源的电压，当电源电压处于或略高于最高预期最小数据时，欠压检测器将向处理器发出数字欠压标志保持电压。

5. 发明授权

US08228100B2 Data processing system having brown-out detection circuit 有权
标题翻译：具有欠压检测电路的数据处理系统
公开(公告)号：US08228100B2
公开(公告)日：2012-07-24
申请号：US12694023
申请日：2010-01-26
申请人： Chris C. Dao , Stefano Pietri , Andre Luis Vilas Boas
发明人： Chris C. Dao , Stefano Pietri , Andre Luis Vilas Boas
IPC分类号： H03L7/00
CPC分类号： G01R19/16552 , G01R19/16519 , G06F11/3024 , G06F11/3062 , G06F11/3093 , G11C11/417
摘要： A brown-out detection circuit includes a first resistive element, a first transistor, a second transistor, and a comparator. The first resistive element has a first terminal coupled to a first power supply voltage terminal, and a second terminal. The first transistor is of a first conductivity type and has a first current electrode coupled to the second terminal of the first resistive element, a control electrode, and a second current electrode. The second transistor is of a second conductivity type and has a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. The comparator has a first input terminal coupled to the first terminal of the first resistive element, a second input terminal coupled to the second terminal of the first resistive element, and an output terminal for providing a brown-out detection signal.
摘要翻译：欠压检测电路包括第一电阻元件，第一晶体管，第二晶体管和比较器。第一电阻元件具有耦合到第一电源电压端子的第一端子和第二端子。第一晶体管是第一导电类型，并且具有耦合到第一电阻元件的第二端子的第一电流电极，控制电极和第二电流电极。第二晶体管是第二导电类型，并且具有耦合到第一晶体管的第二电流电极的第一电流电极，耦合到第二电源电压端子的控制电极和第二电流电极。比较器具有耦合到第一电阻元件的第一端子的第一输入端子，耦合到第一电阻元件的第二端子的第二输入端子和用于提供欠压检测信号的输出端子。

6. 发明申请

US20120105108A1 BROWN-OUT DETECTION CIRCUIT 有权
标题翻译：欠压检测电路
公开(公告)号：US20120105108A1
公开(公告)日：2012-05-03
申请号：US12914168
申请日：2010-10-28
申请人： Andre Luis Vilas Boas , Chris C. Dao , Stefano Pietri
发明人： Andre Luis Vilas Boas , Chris C. Dao , Stefano Pietri
IPC分类号： H03K5/153
CPC分类号： H03K17/223 , G06F1/28
摘要： A data processing system (100), such as a System-on-Chip, includes a processor (120), a memory (140) that has an expected minimum data retention voltage, and a brown-out detector (160), which includes a brown-out detection circuit (201) that has an analog output, and an output circuit (248 and 252) that converts the analog output of the brown-out detection circuit to a digital brown-out flag. The brown-out detection circuit includes a self-biased current reference, current mirrors, and a current comparator. The brown-out detector monitors voltage of a power supply of the memory, and the brown-out detector asserts the digital brown-out flag to the processor when the voltage of the power supply is at, or slightly above, a highest expected minimum data retention voltage.
摘要翻译：诸如片上系统的数据处理系统（100）包括处理器（120），具有期望的最小数据保持电压的存储器（140）和欠压检测器（160），其包括具有模拟输出的欠压检测电路（201）和将欠压检测电路的模拟输出转换为数字欠压标志的输出电路（248和253）。欠压检测电路包括自偏置电流基准，电流镜和电流比较器。欠压检测器监测存储器电源的电压，当电源电压处于或略高于最高预期最小数据时，欠压检测器将向处理器发出数字欠压标志保持电压。

7. 发明申请

US20110185212A1 DATA PROCESSING SYSTEM HAVING BROWN-OUT DETECTION CIRCUIT 有权
标题翻译：具有欠压检测电路的数据处理系统
公开(公告)号：US20110185212A1
公开(公告)日：2011-07-28
申请号：US12694023
申请日：2010-01-26
申请人： CHRIS C. DAO , Stefano Pietri , Andre Luis Vilas Boas
发明人： CHRIS C. DAO , Stefano Pietri , Andre Luis Vilas Boas
IPC分类号： G06F1/26 , G01R19/00 , G06F11/30
CPC分类号： G01R19/16552 , G01R19/16519 , G06F11/3024 , G06F11/3062 , G06F11/3093 , G11C11/417
摘要： A brown-out detection circuit comprises a first resistive element, a first transistor, a second transistor, and a comparator. The first resistive element has a first terminal coupled to a first power supply voltage terminal, and a second terminal. The first transistor is of a first conductivity type and has a first current electrode coupled to the second terminal of the first resistive element, a control electrode, and a second current electrode. The second transistor is of a second conductivity type and has a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. The comparator has a first input terminal coupled to the first terminal of the first resistive element, a second input terminal coupled to the second terminal of the first resistive element, and an output terminal for providing a brown-out detection signal.
摘要翻译：欠压检测电路包括第一电阻元件，第一晶体管，第二晶体管和比较器。第一电阻元件具有耦合到第一电源电压端子的第一端子和第二端子。第一晶体管是第一导电类型，并且具有耦合到第一电阻元件的第二端子的第一电流电极，控制电极和第二电流电极。第二晶体管是第二导电类型，并且具有耦合到第一晶体管的第二电流电极的第一电流电极，耦合到第二电源电压端子的控制电极和第二电流电极。比较器具有耦合到第一电阻元件的第一端子的第一输入端子，耦合到第一电阻元件的第二端子的第二输入端子和用于提供欠压检测信号的输出端子。

8. 发明授权

US07760536B2 Non-volatile memory cell 有权
标题翻译：非易失性存储单元
公开(公告)号：US07760536B2
公开(公告)日：2010-07-20
申请号：US11410584
申请日：2006-04-25
申请人： Andre Luis Vilas Boas , Alfredo Olmos
发明人： Andre Luis Vilas Boas , Alfredo Olmos
IPC分类号： G11C17/00
CPC分类号： G11C17/18
摘要： A non-volatile memory cell and method for reading it are disclosed. In one embodiment, the non-volatile memory cell includes a fuse with a first terminal coupled to a first power supply voltage terminal, and a second terminal, a first transistor having a first current electrode coupled to the second terminal of the programmable fuse, a second current electrode, and a control electrode, and a second transistor having a first current electrode connected to the first power supply voltage terminal, a control electrode coupled to the control electrode of the first transistor, and a second current electrode coupled to the control electrode. By applying a read signal to the control electrode of the first transistor, the state of the cell (blown or unblown) is read.
摘要翻译：公开了一种非易失性存储单元及其读取方法。在一个实施例中，非易失性存储单元包括具有耦合到第一电源电压端子的第一端子和第二端子的熔丝，第一晶体管具有耦合到可编程熔丝的第二端子的第一电流电极，第二电流电极和控制电极，以及具有连接到第一电源电压端子的第一电流电极的第二晶体管，耦合到第一晶体管的控制电极的控制电极和耦合到控制电极的第二电流电极。通过对第一晶体管的控制电极施加读取信号，读取单元（吹制或未吹扫）的状态。

9. 发明授权

US09442501B2 Systems and methods for a low dropout voltage regulator 有权
标题翻译：低压差稳压器的系统和方法
公开(公告)号：US09442501B2
公开(公告)日：2016-09-13
申请号：US14287395
申请日：2014-05-27
申请人： Stefano Pietri , Chris C. Dao , Andre Luis Vilas Boas
发明人： Stefano Pietri , Chris C. Dao , Andre Luis Vilas Boas
IPC分类号： G05F1/575 , G05F1/59 , G05F1/565 , G05F3/26
CPC分类号： G05F1/575 , G05F1/565 , G05F1/59 , G05F3/26
摘要： A semiconductor device including a voltage regulator is disclosed. The voltage regulator may include a multipath amplifier stage, a driver stage coupled to the multipath amplifier stage, a dynamic compensation circuit coupled to the multipath amplifier stage, and a current compensation circuit. The dynamic compensation circuit may be operable to provide a varying level of compensation to the multipath amplifier stage, where the varying level of compensation proportional to a current level associated with the load; and the current compensation circuit may be operable to allow a minimum current level at the driver stage.
摘要翻译：公开了一种包括电压调节器的半导体器件。电压调节器可以包括多径放大器级，耦合到多径放大器级的驱动级，耦合到多径放大器级的动态补偿电路和电流补偿电路。动态补偿电路可以用于向多径放大器级提供变化的补偿电平，其中与负载相关联的当前电平成正比的变化的补偿电平; 并且电流补偿电路可操作以允许在驱动级的最小电流电平。

10. 发明申请

US20130285734A1 DELAY COMPENSATION CIRCUIT 有权
标题翻译：延迟补偿电路
公开(公告)号：US20130285734A1
公开(公告)日：2013-10-31
申请号：US13458205
申请日：2012-04-27
申请人： Ivan Carlos Ribeiro NASCIMENTO , Andre Luis VILAS BOAS
发明人： Ivan Carlos Ribeiro NASCIMENTO , Andre Luis VILAS BOAS
IPC分类号： H03K17/00
CPC分类号： H03K3/012 , H02M1/08 , H03K17/04123
摘要： A device (200) includes a circuit (202) and a driver stage (204) therefor. The circuit includes two sub-circuits (231 and 232). The driver stage includes switcher logic (206) that produces signals that control switching on and off of the sub-circuits. The switcher logic also produces other signals in advance of the signals that control the switching of the sub-circuits. The driver stage includes delay compensations circuits (221 and 222), coupled to the switcher logic and to the circuit, that produce timing signals for the switcher logic. The timing signals are closely aligned with moments that a changing voltage at a node between the sub-circuits passes through threshold voltages. The timing signals compensate for all delays of signals through the device such that a period that both sub-circuits are off is minimized, while ensuring that both sub-circuits are not on at a same time.
摘要翻译：装置（200）包括电路（202）和用于其的驱动器级（204）。该电路包括两个子电路（231和232）。驱动器级包括切换器逻辑（206），其产生控制子电路的接通和关断的信号。切换器逻辑还在控制子电路的切换的信号之前产生其他信号。驱动器级包括延迟补偿电路（221和222），其耦合到切换器逻辑和电路，产生切换器逻辑的定时信号。定时信号与子电路之间的节点处的变化的电压通过阈值电压的时刻紧密对齐。定时信号补偿通过器件的信号的所有延迟，使得两个子电路断开的周期被最小化，同时确保两个子电路不同时接通。

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