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1. 发明授权

US11355961B2 Method and system for fast reconfiguration of power supply network in tens of milliseconos after power grid failure 有权
公开(公告)号：US11355961B2
公开(公告)日：2022-06-07
申请号：US16945611
申请日：2020-07-31
申请人： BEIJING SIFANG AUTOMATION CO., LTD. , BEIJING SIFANG ENGINEERING CO., LTD.
发明人： Gang Duan , Xiaonan Lou , Qi Zhang , Yuhan Zhang , Nian Liu , Liangliang Zheng
IPC分类号： H02J13/00
摘要： The disclosure provides a method for fast reconfiguration of power supply grid in tens of milliseconds after power grid failure. The master station of fast reconfiguration of power grid concentrates the network status information from the client stations at transformer substations or power plants, and compares it with the built-in control strategy table which deals with possible faults. When an expected power gird disconnection fault is detected, the pre-start switch-on instruction is sent to the client stations with multiple breakers which can reconnect the grid. When the fault is cleared, the client stations shall identify the fault clearing time according to the local information, and send the instruction of synchronous switch-on to the corresponding local breakers which can reconnect the separated grids. At the same time, the master station independently monitors the removal of the fault, and sends the backup switch-on signal with synchronism check to the corresponding breakers which can reconnect the separated grids. Based on the above mechanism, the disconnected grid can be reconnected within 150 ms after disconnecting. After the interconnection of the grid is restored, the breakers that form the electromagnetic ring network switch off.

2. 发明授权

US11303128B2 Suppression method of high-frequency resonance for VSC-HVDC system based on nonlinear filter in voltage feed-forward control 有权
公开(公告)号：US11303128B2
公开(公告)日：2022-04-12
申请号：US16484526
申请日：2019-02-22
申请人： BEIJING SIFANG AUTOMATION CO., LTD. , BEIJING SIFANG ENGINEERING CO., LTD.
发明人： Bin Liu , Fengmei Cao , Shu Liu , Hongming Mei , Zhichao Liu , Hongxia Qin , Xiaoyu Zhang , Hualong Yu , Xianchao Guo , Jing Wen
IPC分类号： H02J3/24 , H02J3/36
摘要： A suppression method of high-frequency resonance for VSC-HVDC (Voltage Source Converter-High Voltage Direct Current Transmission) system based on nonlinear filter in voltage feed-forward control. It includes that the nonlinear filter is used for the voltage feed-forward link in the current inner loop control. The specific method is to extract each sequence component of the AC (Alternating Current) voltage, calculate the average value of the sequence component at N sample points, compare the current average value with the output result of nonlinear filter in the previous period, and output the result of nonlinear filter in the current period. After corrected, the result is a fixed value varying according to gradient which acts on the voltage feed-forward link of the inner loop. The invention can effectively suppress the high frequency resonance caused by impedance matching between VSC-HVDC system and grid system without losing the rapidity, and at the same time, it can adjust with AC voltage when voltage disturbance such as AC fault occurs, so as to reduce the risk of over-current of the converter valve. At present, the invention only needs to be realized in the secondary control software link without adding a new equipment, which is also low cost, no occupancy of land and convenient for engineering practice.

3. 发明申请

US20150341471A1 METHOD FOR MAKING 32-BIT ADDRESSING OF SV DATA BY UTILIZING FPGA 有权
标题翻译：通过FPGA实现SV数据32位寻址的方法
公开(公告)号：US20150341471A1
公开(公告)日：2015-11-26
申请号：US14652516
申请日：2013-10-28
申请人： BEIJING SIFANG AUTOMATION CO., LTD
发明人： Zhengqiang Xiao , Zhiguang Hou , Haitao Yuan , Jiong Hu , Tao Zhou , Qiurong Chen , Wanfang Xu , Kun Xiao , Tongzhong Fang
IPC分类号： H04L29/06 , H04L12/741
CPC分类号： H04L69/08 , H04L45/74 , H04L69/22
摘要： This invention relates to a method for making 32-bit addressing of SV data by utilizing FPGA, which may be applied to processing digital sampling data in an equipment of an intelligent substation. Specifically, the method includes the following steps: FPGA receiving naked SV data packages generated based on IEEE802.3 standard; analyzing data structure of Ethernet frame; based on characteristics of the Ethernet frame of the SV data, the SV data of the network byte sequence being reorganized by utilizing ASN.1 coding rules, so that the SV data being converted into a data that can be directly accessed by 32-bit addressing processors. As a result, SV data decoding efficiency is improved greatly. This invention may make the decoding efficiency of 32-bit addressing processor improved by 5-10 times, thus solve problem of declined efficiency due to processing network byte order by splitting and reorganization.
摘要翻译：本发明涉及一种通过利用FPGA对SV数据进行32位寻址的方法，可用于处理智能变电站设备中的数字采样数据。具体来说，该方法包括以下步骤：FPGA接收基于IEEE802.3标准生成的裸SV数据包; 分析以太网帧的数据结构; 基于SV数据的以太网帧的特性，通过利用ASN.1编码规则对网络字节序列的SV数据进行重组，使得SV数据被转换为可以通过32位寻址直接访问的数据处理器。结果，SV数据解码效率大大提高。本发明可以使32位寻址处理器的解码效率提高5-10倍，从而解决由于分割和重组处理网络字节顺序而导致的效率下降的问题。

4. 发明申请

US20150137620A1 ANTI-INTERFERENCE SWITCH SIGNAL TRANSMISSION CIRCUIT 有权
标题翻译：抗干扰开关信号传输电路
公开(公告)号：US20150137620A1
公开(公告)日：2015-05-21
申请号：US14405449
申请日：2013-08-23
申请人： Beijing Sifang Automation Co., Ltd.
发明人： Gang Xu , Tao Zhang , An Liu , Qiurong Chen , Wenhao Shi
IPC分类号： H01H47/00
CPC分类号： H01H47/00 , H01H47/001 , H01H47/002 , H01H71/04 , Y10T307/937
摘要： An anti-interference switch signal transmission circuit, in which a changeover contact is used at a signal terminal, wherein a normally closed contact is connected to DC−, a normally open contact is connected to DC+, and a common terminal is connected to a switch signal acquisition circuit. When no signal exists, DC− is connected to a positive input terminal of the switch signal acquisition circuit via the normally closed contact. Since a negative input terminal of the switch signal acquisition circuit is also connected to DC−, even if interference is caused, no false signal is generated. When a signal exists, the position of the changeover contact changes and DC+ is connected to DC− via the closed normally open contact through the switch signal acquisition circuit thus a loop is formed, so that the signal can be reflected. The interference problem is solved by connecting both the two terminals of the acquisition circuit to DC− when no signal exists.
摘要翻译：一种抗干扰开关信号传输电路，其中在信号端子处使用转换触点，其中常闭触点连接到DC-，常开触点连接到DC +，并且公共端子连接到开关信号采集电路。当没有信号时，DC-通过常闭触点连接到开关信号采集电路的正输入端。由于开关信号采集电路的负输入端子也连接到DC-，即使产生干扰，也不会产生假信号。当存在信号时，转换触点的位置变化，并且DC +通过开关信号采集电路通过闭合常开触点连接到DC-，从而形成环路，从而可以反射信号。当没有信号存在时，通过将采集电路的两个端子连接到DC-来解决干扰问题。

5. 发明授权

US09871893B2 Method for making 32-bit addressing of SV data by utilizing FPGA 有权
公开(公告)号：US09871893B2
公开(公告)日：2018-01-16
申请号：US14652516
申请日：2013-10-28
申请人： Beijing Sifang Automation Co., Ltd
发明人： Zhengqiang Xiao , Zhiguang Hou , Haitao Yuan , Jiong Hu , Tao Zhou , Qiurong Chen , Wanfang Xu , Kun Xiao , Tongzhong Fang
IPC分类号： H04L29/06 , H04L12/741
CPC分类号： H04L69/08 , H04L45/74 , H04L69/22
摘要： This invention relates to a method for making 32-bit addressing of SV data by utilizing FPGA, which may be applied to processing digital sampling data in an equipment of an intelligent substation. Specifically, the method includes the following steps: FPGA receiving naked SV data packages generated based on IEEE802.3 standard; analyzing data structure of Ethernet frame; based on characteristics of the Ethernet frame of the SV data, the SV data of the network byte sequence being reorganized by utilizing ASN.1 coding rules, so that the SV data being converted into a data that can be directly accessed by 32-bit addressing processors. As a result, SV data decoding efficiency is improved greatly. This invention may make the decoding efficiency of 32-bit addressing processor improved by 5-10 times, thus solve problem of declined efficiency due to processing network byte order by splitting and reorganization.

6. 发明授权

US09748676B2 Electrical connector 有权
公开(公告)号：US09748676B2
公开(公告)日：2017-08-29
申请号：US14917998
申请日：2014-11-05
申请人： Beijing Sifang Automation Co., Ltd
发明人： Zaolin Han , Guanwen Hu , Hui Meng , Lixiang Guo
IPC分类号： H01R9/22 , H01R9/24 , H01R9/18 , H01R13/74
CPC分类号： H01R9/2416 , H01R9/18 , H01R9/2491 , H01R13/748
摘要： The present invention relates to an electrical connector, comprising a connector main body (1) and screws (2, 3). The connector main body (1) includes a housing (4), a multi-socket wire connection structure (5), a multi-socket plug-in connection structure (8), and a multi-socket wire disconnection structure (6). The screws (2, 3) are preferably set screws, which comprise a guide structure (9), a thread structure (10), a fall-off prevention structure (11), and a wrenching structure (12). The present invention has advantages of high connection density, ease of wiring connection, high efficiency, being shock-resistant, loosening-proof and reliable, while meeting the IEC 60603-2 standard.

7. 发明授权

US10418508B2 Full-laser scribing method for large-area copper indium gallium selenide thin-film solar cell module 有权
公开(公告)号：US10418508B2
公开(公告)日：2019-09-17
申请号：US15573275
申请日：2016-05-17
申请人： BEIJING SIFANG AUTOMATION CO., LTD. , BEIJING SIFANG CRENERGEY OPTOELECTRONICS TECHNOLOGY CO., LTD.
发明人： Ning Zhang , Xinping Yu , Wanlei Dai
IPC分类号： H01L31/18 , H01L31/046 , H01L31/0224 , H01L31/0749 , H01L31/0463
摘要： Disclosed is a full-laser scribing method for a large-area copper indium gallium selenide (CIGS) thin-film solar cell module, including: using a laser I to scribe a molybdenum thin film prepared on soda-lime glass to form a first scribed line (P1); preparing the following film layers in sequence on the molybdenum layer in which P1 has been scribed: a CIGS layer, a cadmium sulfide layer and an intrinsic zinc oxide layer; after finishing preparation of the above film layers, using a laser II for scribing to form a second scribed line (P2), wherein the scribed line P2 is parallel with the scribed line P1; and preparing an aluminum-doped zinc oxide layer on the intrinsic zinc oxide layer in which P2 has been scribed, and using a laser III for scribing to form a third scribed line (P3), wherein the scribed line P3 is parallel with the scribed line P1.

8. 发明申请

US20180114876A1 FULL-LASER SCRIBING METHOD FOR LARGE-AREA COPPER INDIUM GALLIUM SELENIDE THIN-FILM SOLAR CELL MODULE 有权
公开(公告)号：US20180114876A1
公开(公告)日：2018-04-26
申请号：US15573275
申请日：2016-05-17
申请人： BEIJING SIFANG AUTOMATION CO., LTD. , BEIJING SIFANG CRENERGEY OPTOELECTRONICS TECHNOLOGY CO., LTD.
发明人： Ning ZHANG , Xinping YU , Wanlei DAI
IPC分类号： H01L31/18 , H01L31/046 , H01L31/0749 , H01L31/0224
CPC分类号： H01L31/186 , H01L31/022425 , H01L31/022483 , H01L31/046 , H01L31/0463 , H01L31/0749 , H01L31/1884 , Y02E10/541
摘要： Disclosed is a full-laser scribing method for a large-area copper indium gallium selenide (CIGS) thin-film solar cell module, including: using a laser I to scribe a molybdenum thin film prepared on soda-lime glass to form a first scribed line (P1); preparing the following film layers in sequence on the molybdenum layer in which P1 has been scribed: a CIGS layer, a cadmium sulfide layer and an intrinsic zinc oxide layer; after finishing preparation of the above film layers, using a laser II for scribing to form a second scribed line (P2), wherein the scribed line P2 is parallel with the scribed line P1; and preparing an aluminum-doped zinc oxide layer on the intrinsic zinc oxide layer in which P2 has been scribed, and using a laser III for scribing to form a third scribed line (P3), wherein the scribed line P3 is parallel with the scribed line P1.

9. 发明申请

US20160226163A1 AN ELECTRICAL CONNECTOR 有权
标题翻译：电气连接器
公开(公告)号：US20160226163A1
公开(公告)日：2016-08-04
申请号：US14917998
申请日：2014-11-05
申请人： BEIJING SIFANG AUTOMATION CO., LTD
发明人： Zaolin Han , Guanwen Hu , Hui Meng , Lixiang Guo
IPC分类号： H01R9/24 , H01R9/18
CPC分类号： H01R9/2416 , H01R9/18 , H01R9/2491 , H01R13/748
摘要： The present invention relates to an electrical connector, comprising a connector main body (1) and screws (2, 3). The connector main body (1) includes a housing (4), a multi-socket wire connection structure (5), a multi-socket plug-in connection structure (8), and a multi-socket wire disconnection structure (6). The screws (2, 3) are preferably set screws, which comprise a guide structure (9), a thread structure (10), a fall-off prevention structure (11), and a wrenching structure (12). The present invention has advantages of high connection density, ease of wiring connection, high efficiency, being shock-resistant, loosening-proof and reliable, while meeting the IEC 60603-2 standard.
摘要翻译：电连接器技术领域本发明涉及一种电连接器，包括连接器主体（1）和螺钉（2,3）。连接器主体（1）包括壳体（4），多插座线连接结构（5），多插座插入式连接结构（8）和多插座线断开结构（6）。螺钉（2,3）优选是定位螺钉，其包括导向结构（9），螺纹结构（10），防脱落结构（11）和扳手结构（12）。本发明具有连接密度高，接线方便，效率高，耐冲击，松动可靠，符合IEC 60603-2标准的优点。

10. 发明授权

US10784389B2 Full-laser scribing method for flexible stainless steel substrate solar cell module 有权
公开(公告)号：US10784389B2
公开(公告)日：2020-09-22
申请号：US16313215
申请日：2016-12-28
申请人： Beijing Sifang Crenergey Optoelectronics Technology Co., Ltd. , Beijing Sifang Automation Co., Ltd
发明人： Ning Zhang , Xinping Yu , Wanlei Dai , Yuandong Liu , Wei Zhang , Zhe Sun
IPC分类号： H01L31/0392 , H01L31/18 , H01L31/0463 , B23K26/402 , B23K26/361
摘要： The invention relates a full-laser scribing method for a flexible stainless steel substrate solar cell module, comprising: preparing an insulating layer and a molybdenum layer on a stainless steel substrate in sequence; using a laser I to scribe the prepared insulating layer and molybdenum layer to form a first scribed line (P1); preparing the following film layers in sequence on the molybdenum layer in which P1 has been scribed: a CIGS layer, a cadmium sulfide layer and an intrinsic zinc oxide layer; using a laser II to make scribe and thus form a second scribed line (P2), wherein the second scribed line P2 is parallel with the first scribed line P1; and preparing an aluminum-doped zinc oxide layer on the intrinsic zinc oxide layer in which P2 has been scribed, and using a laser III to make scribe and thus form a third scribed line (P3), wherein the third scribed line P3 is parallel with the first scribed line P1. The invention may avoid disadvantages caused by the screen printing, such as large dead zone, expensive screen printing paste and frequent replacement of screens for screen printing, thereby improve efficiency and stability of the module and save cost and increase production efficiency.

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