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1. 发明授权

US09871893B2 Method for making 32-bit addressing of SV data by utilizing FPGA 有权
公开(公告)号：US09871893B2
公开(公告)日：2018-01-16
申请号：US14652516
申请日：2013-10-28
申请人： Beijing Sifang Automation Co., Ltd
发明人： Zhengqiang Xiao , Zhiguang Hou , Haitao Yuan , Jiong Hu , Tao Zhou , Qiurong Chen , Wanfang Xu , Kun Xiao , Tongzhong Fang
IPC分类号： H04L29/06 , H04L12/741
CPC分类号： H04L69/08 , H04L45/74 , H04L69/22
摘要： This invention relates to a method for making 32-bit addressing of SV data by utilizing FPGA, which may be applied to processing digital sampling data in an equipment of an intelligent substation. Specifically, the method includes the following steps: FPGA receiving naked SV data packages generated based on IEEE802.3 standard; analyzing data structure of Ethernet frame; based on characteristics of the Ethernet frame of the SV data, the SV data of the network byte sequence being reorganized by utilizing ASN.1 coding rules, so that the SV data being converted into a data that can be directly accessed by 32-bit addressing processors. As a result, SV data decoding efficiency is improved greatly. This invention may make the decoding efficiency of 32-bit addressing processor improved by 5-10 times, thus solve problem of declined efficiency due to processing network byte order by splitting and reorganization.

2. 发明授权

US09679726B2 Anti-interference switch signal transmission circuit 有权
公开(公告)号：US09679726B2
公开(公告)日：2017-06-13
申请号：US14405449
申请日：2013-08-23
申请人： Beijing Sifang Automation Co., Ltd.
发明人： Gang Xu , Tao Zhang , An Liu , Qiurong Chen , Wenhao Shi
IPC分类号： H01H47/00 , H01H71/04
CPC分类号： H01H47/00 , H01H47/001 , H01H47/002 , H01H71/04 , Y10T307/937
摘要： An anti-interference switch signal transmission circuit, in which a changeover switch is used at a signal terminal, is disclosed. A normally closed contact is connected to DC−, a normally open contact is connected to DC+, and a common contact is connected to a switch signal acquisition circuit. When no signal exists, DC− is provided to a positive input terminal of the switch signal acquisition circuit via the normally closed contact. Since a negative input terminal of the switch signal acquisition circuit is also connected to DC−, even if interference is caused, no false signal is generated. When a signal exists, the position of the changeover switch changes and DC+ is connected to DC− via the closed normally open contact through the switch signal acquisition circuit thus a loop is formed, so that the signal can be detected.

3. 发明申请

US20150341471A1 METHOD FOR MAKING 32-BIT ADDRESSING OF SV DATA BY UTILIZING FPGA 有权
标题翻译：通过FPGA实现SV数据32位寻址的方法
公开(公告)号：US20150341471A1
公开(公告)日：2015-11-26
申请号：US14652516
申请日：2013-10-28
申请人： BEIJING SIFANG AUTOMATION CO., LTD
发明人： Zhengqiang Xiao , Zhiguang Hou , Haitao Yuan , Jiong Hu , Tao Zhou , Qiurong Chen , Wanfang Xu , Kun Xiao , Tongzhong Fang
IPC分类号： H04L29/06 , H04L12/741
CPC分类号： H04L69/08 , H04L45/74 , H04L69/22
摘要： This invention relates to a method for making 32-bit addressing of SV data by utilizing FPGA, which may be applied to processing digital sampling data in an equipment of an intelligent substation. Specifically, the method includes the following steps: FPGA receiving naked SV data packages generated based on IEEE802.3 standard; analyzing data structure of Ethernet frame; based on characteristics of the Ethernet frame of the SV data, the SV data of the network byte sequence being reorganized by utilizing ASN.1 coding rules, so that the SV data being converted into a data that can be directly accessed by 32-bit addressing processors. As a result, SV data decoding efficiency is improved greatly. This invention may make the decoding efficiency of 32-bit addressing processor improved by 5-10 times, thus solve problem of declined efficiency due to processing network byte order by splitting and reorganization.
摘要翻译：本发明涉及一种通过利用FPGA对SV数据进行32位寻址的方法，可用于处理智能变电站设备中的数字采样数据。具体来说，该方法包括以下步骤：FPGA接收基于IEEE802.3标准生成的裸SV数据包; 分析以太网帧的数据结构; 基于SV数据的以太网帧的特性，通过利用ASN.1编码规则对网络字节序列的SV数据进行重组，使得SV数据被转换为可以通过32位寻址直接访问的数据处理器。结果，SV数据解码效率大大提高。本发明可以使32位寻址处理器的解码效率提高5-10倍，从而解决由于分割和重组处理网络字节顺序而导致的效率下降的问题。

4. 发明申请

US20150137620A1 ANTI-INTERFERENCE SWITCH SIGNAL TRANSMISSION CIRCUIT 有权
标题翻译：抗干扰开关信号传输电路
公开(公告)号：US20150137620A1
公开(公告)日：2015-05-21
申请号：US14405449
申请日：2013-08-23
申请人： Beijing Sifang Automation Co., Ltd.
发明人： Gang Xu , Tao Zhang , An Liu , Qiurong Chen , Wenhao Shi
IPC分类号： H01H47/00
CPC分类号： H01H47/00 , H01H47/001 , H01H47/002 , H01H71/04 , Y10T307/937
摘要： An anti-interference switch signal transmission circuit, in which a changeover contact is used at a signal terminal, wherein a normally closed contact is connected to DC−, a normally open contact is connected to DC+, and a common terminal is connected to a switch signal acquisition circuit. When no signal exists, DC− is connected to a positive input terminal of the switch signal acquisition circuit via the normally closed contact. Since a negative input terminal of the switch signal acquisition circuit is also connected to DC−, even if interference is caused, no false signal is generated. When a signal exists, the position of the changeover contact changes and DC+ is connected to DC− via the closed normally open contact through the switch signal acquisition circuit thus a loop is formed, so that the signal can be reflected. The interference problem is solved by connecting both the two terminals of the acquisition circuit to DC− when no signal exists.
摘要翻译：一种抗干扰开关信号传输电路，其中在信号端子处使用转换触点，其中常闭触点连接到DC-，常开触点连接到DC +，并且公共端子连接到开关信号采集电路。当没有信号时，DC-通过常闭触点连接到开关信号采集电路的正输入端。由于开关信号采集电路的负输入端子也连接到DC-，即使产生干扰，也不会产生假信号。当存在信号时，转换触点的位置变化，并且DC +通过开关信号采集电路通过闭合常开触点连接到DC-，从而形成环路，从而可以反射信号。当没有信号存在时，通过将采集电路的两个端子连接到DC-来解决干扰问题。

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