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1. 发明授权

US08712183B2 System and method for performing image correction 有权
标题翻译：执行图像校正的系统和方法
公开(公告)号：US08712183B2
公开(公告)日：2014-04-29
申请号：US12753775
申请日：2010-04-02
申请人： Brian Cabral , Hu He , Elena Ing , Sohei Takemoto
发明人： Brian Cabral , Hu He , Elena Ing , Sohei Takemoto
IPC分类号： G06K9/40 , H04N5/357 , G06T17/30
CPC分类号： H04N17/00 , G06T17/30 , H04N5/3572
摘要： A system and method for correcting image data. Embodiments of the present invention provide image correction to overcome various lens effects, optical crosstalk, and electrical crosstalk. In one embodiment, the method includes accessing, within an electronic system, a plurality of control points for a patch of a spline surface and calculating a plurality of intermediate control points corresponding to a row of pixels of the patch. The method further includes receiving a pixel of an image and correcting the pixel based on the plurality of intermediate control points in streaming scanline column-wise or row-wise order.
摘要翻译：一种用于校正图像数据的系统和方法。本发明的实施例提供了用于克服各种透镜效应，光学串扰和电串扰的图像校正。在一个实施例中，该方法包括在电子系统内访问用于花键表面的块的多个控制点并且计算对应于该补丁的像素行的多个中间控制点。该方法还包括接收图像的像素并基于流式扫描线中的多个中间控制点逐行或逐行顺序校正像素。

2. 发明授权

US08223150B2 Translation of register-combiner state into shader microcode 有权
标题翻译：寄存器组合器状态转换为着色器微码
公开(公告)号：US08223150B2
公开(公告)日：2012-07-17
申请号：US13193524
申请日：2011-07-28
申请人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
发明人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
IPC分类号： G06T15/50 , G06F12/02 , G06F9/44 , G09G5/36
CPC分类号： G06T15/50 , G06F8/441 , G06T15/005 , G06T2210/32
摘要： An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is translated into shader program instructions. Registers specified by the program instructions are allocated for processing in the shader program. The registers may be remapped for more efficient use of the register storage space.
摘要翻译：一种用于将固定功能状态转换为着色器程序的装置和方法。固定功能状态被接收和存储，当检测到新的着色器程序时，固定功能状态被转换为着色器程序指令。由程序指令指定的寄存器被分配给着色器程序中的处理。可以重新映射寄存器以更有效地使用寄存器存储空间。

3. 发明申请

US20110279473A1 TRANSLATION OF REGISTER-COMBINER STATE INTO SHADER MICROCODE 有权
标题翻译：寄存器组合器状态转换为阴影微码
公开(公告)号：US20110279473A1
公开(公告)日：2011-11-17
申请号：US13193524
申请日：2011-07-28
申请人： Brian CABRAL , Amy J. Midgal , Rui M. Bastos , Karim M. Adballa
发明人： Brian CABRAL , Amy J. Midgal , Rui M. Bastos , Karim M. Adballa
IPC分类号： G09G5/02
CPC分类号： G06T15/50 , G06F8/441 , G06T15/005 , G06T2210/32
摘要： An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is translated into shader program instructions. Registers specified by the program instructions are allocated for processing in the shader program. The registers may be remapped for more efficient use of the register storage space.
摘要翻译：一种用于将固定功能状态转换为着色器程序的装置和方法。固定功能状态被接收和存储，当检测到新的着色器程序时，固定功能状态被转换成着色器程序指令。由程序指令指定的寄存器被分配给着色器程序中的处理。可以重新映射寄存器以更有效地使用寄存器存储空间。

4. 发明授权

US08004523B1 Translation of register-combiner state into shader microcode 有权
标题翻译：寄存器组合器状态转换为着色器微码
公开(公告)号：US08004523B1
公开(公告)日：2011-08-23
申请号：US11966905
申请日：2007-12-28
申请人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
发明人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
IPC分类号： G06T15/50 , G06F12/02 , G06F9/44 , G09G5/36
CPC分类号： G06T15/50 , G06F8/441 , G06T15/005 , G06T2210/32
摘要： An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is translated into shader program instructions. Registers specified by the program instructions are allocated for processing in the shader program. The registers may be remapped for more efficient use of the register storage space.
摘要翻译：一种用于将固定功能状态转换为着色器程序的装置和方法。固定功能状态被接收和存储，当检测到新的着色器程序时，固定功能状态被转换成着色器程序指令。由程序指令指定的寄存器被分配给着色器程序中的处理。可以重新映射寄存器以更有效地使用寄存器存储空间。

5. 发明申请

US20100265358A1 SYSTEM AND METHOD FOR IMAGE CORRECTION 有权
标题翻译：用于图像校正的系统和方法
公开(公告)号：US20100265358A1
公开(公告)日：2010-10-21
申请号：US12752878
申请日：2010-04-01
申请人： Brian Cabral , Hu He , Elena Ing , Sohei Takemoto
发明人： Brian Cabral , Hu He , Elena Ing , Sohei Takemoto
IPC分类号： H04N9/73 , G06K9/40
CPC分类号： H04N17/00 , G06T17/30 , H04N5/3572
摘要： A system and method for correcting image data. Embodiments of the present invention provide calibration and image correction to overcome various lens effects including lens shading and lens imperfections. In one embodiment, the correction of image data is performed via utilization of a spline surface (e.g., Bezier surface). The use of spline surfaces facilitates efficient hardware implementation. The image correction may be performed on a per channel and illumination type basis. In another embodiment, the present invention provides a method for determine a spline surface to be used for calibrating an image signal processor to be used in correcting image data.
摘要翻译：一种用于校正图像数据的系统和方法。本发明的实施例提供校准和图像校正以克服包括镜头遮蔽和镜头缺陷在内的各种镜头效果。在一个实施例中，图像数据的校正是通过使用样条曲面（例如Bezier曲面）来执行的。使用花键表面有助于高效的硬件实现。可以在每个通道和照明类型的基础上执行图像校正。在另一个实施例中，本发明提供一种用于确定用于校准要用于校正图像数据的图像信号处理器的样条曲面的方法。

6. 发明授权

US07408553B1 Inside testing for paths 有权
标题翻译：内部测试路径
公开(公告)号：US07408553B1
公开(公告)日：2008-08-05
申请号：US11305483
申请日：2005-12-15
申请人： Michael J. M. Toksvig , Edward A. Hutchins , Brian Cabral
发明人： Michael J. M. Toksvig , Edward A. Hutchins , Brian Cabral
IPC分类号： G06T11/40
CPC分类号： G06T11/40
摘要： Systems and methods for identifying pixels that are inside a two-dimensional path may be used to fill the path. The path is segmented and a point in space is identified that is used to generate a triangle fan, where each triangle in the fan is formed by one of the segments of the path and the point. Locations in a winding buffer are updated for each pixel that is within a triangle of the triangle fan. The resulting winding buffer indicates the pixels that are inside the two-dimensional path. The winding buffer may be used to fill the path.
摘要翻译：用于识别二维路径内的像素的系统和方法可以用于填充路径。路径被分割，并且识别用于产生三角形风扇的空间中的点，其中风扇中的每个三角形由路径和点之一的一个段形成。针对三角形风扇三角形内的每个像素，更新绕组缓冲区中的位置。得到的卷绕缓冲器指示二维路径内的像素。卷绕缓冲器可用于填充路径。

7. 发明授权

US08749662B2 System and method for lens shading image correction 有权
标题翻译：透镜阴影图像校正的系统和方法
公开(公告)号：US08749662B2
公开(公告)日：2014-06-10
申请号：US12752878
申请日：2010-04-01
申请人： Brian Cabral , Hu He , Elena Ing , Sohei Takemoto
发明人： Brian Cabral , Hu He , Elena Ing , Sohei Takemoto
IPC分类号： H04N9/68
CPC分类号： H04N17/00 , G06T17/30 , H04N5/3572
摘要： A system and method for correcting image data. Embodiments of the present invention provide calibration and image correction to overcome various lens effects including lens shading and lens imperfections. In one embodiment, the correction of image data is performed via utilization of a spline surface (e.g., Bezier surface). The use of spline surfaces facilitates efficient hardware implementation. The image correction may be performed on a per channel and illumination type basis. In another embodiment, the present invention provides a method for determine a spline surface to be used for calibrating an image signal processor to be used in correcting image data.
摘要翻译：一种用于校正图像数据的系统和方法。本发明的实施例提供校准和图像校正以克服包括镜头遮蔽和镜头缺陷在内的各种镜头效果。在一个实施例中，图像数据的校正是通过使用样条曲面（例如Bezier曲面）来执行的。使用花键表面有助于高效的硬件实现。可以在每个通道和照明类型的基础上执行图像校正。在另一个实施例中，本发明提供一种用于确定用于校准要用于校正图像数据的图像信号处理器的样条曲面的方法。

8. 发明授权

US07852340B2 Scalable shader architecture 有权
标题翻译：可扩展着色器架构
公开(公告)号：US07852340B2
公开(公告)日：2010-12-14
申请号：US11957358
申请日：2007-12-14
申请人： Rui M. Bastos , Karim M. Abdalla , Christian Rouet , Michael J.M. Toksvig , Johnny S Rhoades , Roger L. Allen , John Douglas Tynefield, Jr. , Emmett M. Kilgariff , Gary M. Tarolli , Brian Cabral , Craig Michael Wittenbrink , Sean J. Treichler
发明人： Rui M. Bastos , Karim M. Abdalla , Christian Rouet , Michael J.M. Toksvig , Johnny S Rhoades , Roger L. Allen , John Douglas Tynefield, Jr. , Emmett M. Kilgariff , Gary M. Tarolli , Brian Cabral , Craig Michael Wittenbrink , Sean J. Treichler
IPC分类号： G06F15/80 , G06T15/50 , G06T15/00
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译：公开了可扩展着色器架构。根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。着色器包括一个着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管道，有利于平衡工作负载。着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。

9. 发明申请

US20080246764A1 Early Z scoreboard tracking system and method 有权
标题翻译：早期Z记分牌跟踪系统和方法
公开(公告)号：US20080246764A1
公开(公告)日：2008-10-09
申请号：US12002732
申请日：2007-12-17
申请人： Brian Cabral , Edward A. Hutchins , Christopher Donham
发明人： Brian Cabral , Edward A. Hutchins , Christopher Donham
IPC分类号： G06T15/40 , G06T1/20 , G09G5/36
CPC分类号： G06T15/005 , G06T1/20 , G06T15/405
摘要： Early Z scoreboard tracking systems and methods in accordance with the present invention are described. Multiple pixels are received and a pixel depth raster operation is performed on the pixels. The pixel depth raster operation comprises discarding a pixel that is occluded. In one exemplary implementation, the depth raster operation is done at a faster rate than a color raster operation. Pixels that pass the depth raster operation are checked for screen coincidence. Pixels with screen coincidence are stalled and pixels without screen coincidence are forwarded to lower stages of the pipeline. The lower stages of the pipeline are programmable and pixel flight time can vary (e.g., can include multiple passes through the lower stages). Execution through the lower stages is directed by a program sequencer which also directs notification to the pixel flight tracking when a pixel is done processing.
摘要翻译：描述根据本发明的早期Z记分板跟踪系统和方法。接收多个像素，并对像素执行像素深度光栅操作。像素深度光栅操作包括丢弃被遮挡的像素。在一个示例性实现中，深度光栅操作以比彩色光栅操作更快的速度完成。检查通过深度光栅操作的像素的屏幕重合。具有屏幕巧合的像素停止，而没有屏幕一致的像素被转发到流水线的较低阶段。管道的较低级是可编程的，并且像素飞行时间可以变化（例如，可以包括通过下级的多次）。较低阶段的执行由程序定序器执行，程序定序器还在像素完成处理时指示像素飞行跟踪。

10. 发明授权

US07385607B2 Scalable shader architecture 有权
标题翻译：可扩展着色器架构
公开(公告)号：US07385607B2
公开(公告)日：2008-06-10
申请号：US10938042
申请日：2004-09-10
申请人： Rui M. Bastos , Karim M. Abdalla , Christian Rouet , Michael J. M. Toksvig , Johnny S. Rhoades , Roger L. Allen , John Douglas Tynefield, Jr. , Emmett M. Kilgariff , Gary M. Tarolli , Brian Cabral , Craig Michael Wittenbrink , Sean J. Treichler
发明人： Rui M. Bastos , Karim M. Abdalla , Christian Rouet , Michael J. M. Toksvig , Johnny S. Rhoades , Roger L. Allen , John Douglas Tynefield, Jr. , Emmett M. Kilgariff , Gary M. Tarolli , Brian Cabral , Craig Michael Wittenbrink , Sean J. Treichler
IPC分类号： G06F15/16 , G06F15/80 , G06T1/20
CPC分类号： G06T15/005
摘要： A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
摘要翻译：公开了可扩展着色器架构。根据该架构，着色器包括多个着色器管线，每个着色器管线可以对光栅化像素数据执行处理操作。着色器管线可以根据需要进行功能删除，从而防止着色器流水线造成芯片排斥。着色器包括一个着色器分配器，用于处理光栅化的像素数据，然后有选择地将经处理的光栅化像素数据分配到各种着色器管道，有利于平衡工作负载。着色器收集器将各种着色器管线的输出格式化为正确的顺序，以形成阴影像素数据。着色器指令处理器（调度器）对各个着色器管线进行编程，以执行其预期任务。每个着色器管道具有与着色器分配器和着色器指令处理器交互的着色器网守，使得通过着色器管线的像素数据被根据需要被控制和处理。

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