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    • 3. 发明授权
    • Cache configuration for compressed memory systems
    • 压缩内存系统的缓存配置
    • US07103722B2
    • 2006-09-05
    • US10200937
    • 2002-07-22
    • Caroline BenvenistePeter FranaszekJohn T. RobinsonCharles Schulz
    • Caroline BenvenistePeter FranaszekJohn T. RobinsonCharles Schulz
    • G06F12/00
    • G06F12/127G06F12/0813G06F12/0864G06F2212/2542G06F2212/401
    • A method and structure is disclosed for constraining cache line replacement that processes a cache miss in a computer system. The invention contains a K-way set associative cache that selects lines in the cache for replacement. The invention constrains the selecting process so that only a predetermined subset of each set of cache lines is selected for replacement. The subset has at least a single cache line and the set size is at least two cache lines. The invention may further select between at least two cache lines based upon which of the cache lines was accessed least recently. A selective enablement of the constraining process is based on a free space memory condition of a memory associated with the cache memory. The invention may further constrain cache line replacement based upon whether the cache miss is from a non-local node in a nonuniform-memory-access system. The invention may also process cache writes so that a predetermined subset of each set is known to be in an unmodified state.
    • 公开了一种用于约束处理计算机系统中的高速缓存未命中的高速缓存行替换的方法和结构。 本发明包含一个K路组合关联高速缓存,用于选择高速缓存中的行进行替换。 本发明限制了选择过程,使得仅选择每组高速缓存行的预定子集用于替换。 该子集具有至少一条缓存行,并且集合大小至少为两条缓存行。 本发明还可以基于最近访问哪个高速缓存行,在至少两条高速缓存行之间进行选择。 约束过程的选择性启用基于与高速缓存存储器相关联的存储器的空闲存储器条件。 本发明还可以基于高速缓存未命中来自非均匀存储器访问系统中的非本地节点来进一步约束高速缓存行替换。 本发明还可以处理高速缓存写入,使得每组的预定子集已知处于未修改状态。
    • 4. 发明授权
    • Method and system for storing memory compressed data onto memory compressed disks
    • 将内存压缩数据存储到内存压缩磁盘上的方法和系统
    • US08161206B2
    • 2012-04-17
    • US13083400
    • 2011-04-08
    • Caroline BenvenisteVittorio CastelliPeter A. Franaszek
    • Caroline BenvenisteVittorio CastelliPeter A. Franaszek
    • G06F13/38G06F13/00
    • G06F3/0608G06F3/064G06F3/0676G06F12/08G06F2212/401
    • In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.
    • 在支持存储器压缩的计算机系统中,其中数据以不同的压缩格式存储在磁盘上,并且其中IOA(输入/输出适配器)/ IOP(输入/输出处理器)通过以下方式选择性地读取和写入主存储器 直接存储器访问(DMA)操作,用于将压缩数据从IOA / IOP发送到主存储器的方法包括保留一组空闲存储器扇区以包含所述主存储器中的数据,发送到所述存储器的IOA / IOP地址 扇区,使用所述DMA操作将数据从IOA / IOP复制到所述存储器扇区,在IOA / IOP压缩存储器目录中构造定义数据存储在存储器中的方式和位置的信息,将存储器目录信息发送到存储器控制器, 并将存储器目录信息存储在压缩存储器目录结构中。
    • 7. 发明授权
    • Selective memory controller access path for directory caching
    • 用于目录缓存的选择性内存控制器访问路径
    • US06795897B2
    • 2004-09-21
    • US10146692
    • 2002-05-15
    • Caroline BenvenisteVittorio CastelliPeter A. Franaszek
    • Caroline BenvenisteVittorio CastelliPeter A. Franaszek
    • G06F1200
    • G06F12/10G06F12/08G06F12/0802G06F12/1027G06F2212/401Y10S707/99942
    • A computer system and corresponding method for supporting a compressed main memory includes a processor, a processor cache in signal communication with the processor, a memory controller in signal communication with the processor cache, a compression translation table entry register in signal communication with the processor cache and the memory controller, a compression translation table directory in signal communication with the compression translation table entry register, and a compressed main memory in signal communication with the memory controller wherein the memory controller manages the compressed main memory by storing entries of the compression translation table directory into the processor cache from the compression translation table entry register; where the corresponding method includes receiving a real address for a processor cache miss, finding a compression translation table address for the cache miss within the processor cache, if the cache miss is a cache write miss: decompressing the memory line corresponding to the cache line being written, writing the content of the cache line into the appropriate position in the memory line, compressing the data contained in said memory line, and storing the compressed data into the compressed main memory, and, if the cache miss is a cache read miss: retrieving the compressed data corresponding to the compression translation table address from the compressed main memory and decompressing the retrieved data.
    • 用于支持压缩主存储器的计算机系统和相应方法包括处理器,与处理器进行信号通信的处理器高速缓存器,与处理器高速缓存器进行信号通信的存储器控​​制器,与处理器高速缓存器进行信号通信的压缩转换表输入寄存器 和存储器控制器,与压缩转换表入口寄存器进行信号通信的压缩转换表目录以及与存储器控制器进行信号通信的压缩主存储器,其中存储器控制器通过存储压缩转换表的条目来管理压缩主存储器 目录进入处理器缓存从压缩转换表入口寄存器; 其中相应的方法包括接收处理器高速缓存未命中的实际地址,如果高速缓存未命中是高速缓存写入未命中,则为处理器高速缓存中的高速缓存未命中找到压缩转换表地址;解压缩对应于高速缓存行的存储器行为 写入,将高速缓存行的内容写入存储器线中的适当位置,压缩所述存储器线中包含的数据,并将压缩数据存储到压缩主存储器中,并且如果高速缓存未命中是高速缓存读取缺失: 从压缩的主存储器中检索与压缩转换表地址相对应的压缩数据,并解压缩检索的数据。
    • 9. 发明申请
    • METHOD AND SYSTEM FOR STORING MEMORY COMPRESSED DATA ONTO MEMORY COMPRESSED DISKS
    • 将内存压缩数据存储到内存压缩磁盘上的方法和系统
    • US20110185132A1
    • 2011-07-28
    • US13083400
    • 2011-04-08
    • Caroline BenvenisteVittorio CastelliPeter A. Franaszek
    • Caroline BenvenisteVittorio CastelliPeter A. Franaszek
    • G06F12/00
    • G06F3/0608G06F3/064G06F3/0676G06F12/08G06F2212/401
    • In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.
    • 在支持存储器压缩的计算机系统中,其中数据以不同的压缩格式存储在磁盘上,并且其中IOA(输入/输出适配器)/ IOP(输入/输出处理器)通过以下方式选择性地读取和写入主存储器 直接存储器访问(DMA)操作,用于将压缩数据从IOA / IOP发送到主存储器的方法包括保留一组空闲存储器扇区以包含所述主存储器中的数据,发送到所述存储器的IOA / IOP地址 扇区,使用所述DMA操作将数据从IOA / IOP复制到所述存储器扇区,在IOA / IOP压缩存储器目录中构造定义数据存储在存储器中的方式和位置的信息,将存储器目录信息发送到存储器控制器, 并将存储器目录信息存储在压缩存储器目录结构中。