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1. 发明授权

US08161206B2 Method and system for storing memory compressed data onto memory compressed disks 有权
标题翻译：将内存压缩数据存储到内存压缩磁盘上的方法和系统
公开(公告)号：US08161206B2
公开(公告)日：2012-04-17
申请号：US13083400
申请日：2011-04-08
申请人： Caroline Benveniste , Vittorio Castelli , Peter A. Franaszek
发明人： Caroline Benveniste , Vittorio Castelli , Peter A. Franaszek
IPC分类号： G06F13/38 , G06F13/00
CPC分类号： G06F3/0608 , G06F3/064 , G06F3/0676 , G06F12/08 , G06F2212/401
摘要： In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.
摘要翻译：在支持存储器压缩的计算机系统中，其中数据以不同的压缩格式存储在磁盘上，并且其中IOA（输入/输出适配器）/ IOP（输入/输出处理器）通过以下方式选择性地读取和写入主存储器直接存储器访问（DMA）操作，用于将压缩数据从IOA / IOP发送到主存储器的方法包括保留一组空闲存储器扇区以包含所述主存储器中的数据，发送到所述存储器的IOA / IOP地址扇区，使用所述DMA操作将数据从IOA / IOP复制到所述存储器扇区，在IOA / IOP压缩存储器目录中构造定义数据存储在存储器中的方式和位置的信息，将存储器目录信息发送到存储器控制器，并将存储器目录信息存储在压缩存储器目录结构中。

2. 发明授权

US07716424B2 Victim prefetching in a cache hierarchy 失效
标题翻译：受害者在缓存层次结构中预取
公开(公告)号：US07716424B2
公开(公告)日：2010-05-11
申请号：US10989997
申请日：2004-11-16
申请人： Peter A. Franaszek , Steven R. Kunkel , Luis Alfonso Lastras Montaño , Aaron C. Sawdey
发明人： Peter A. Franaszek , Steven R. Kunkel , Luis Alfonso Lastras Montaño , Aaron C. Sawdey
IPC分类号： G06F12/08
CPC分类号： G06F12/122 , G06F12/0862 , G06F12/0897
摘要： We present a “directory extension” (hereinafter “DX”) to aid in prefetching between proximate levels in a cache hierarchy. The DX may maintain (1) a list of pages which contains recently ejected lines from a given level in the cache hierarchy, and (2) for each page in this list, the identity of a set of ejected lines, provided these lines are prefetchable from, for example, the next level of the cache hierarchy. Given a cache fault to a line within a page in this list, other lines from this page may then be prefetched without the substantial overhead to directory lookup which would otherwise be required.
摘要翻译：我们提出一个“目录扩展名”（以下简称“DX”）来辅助缓存层级中的邻近级别之间的预取。 DX可以维护（1）包含最近从缓存层级中的给定级别排出的行的页面列表，以及（2）对于该列表中的每个页面，提供这些行是可预取的集合的标识从例如缓存层次结构的下一级。给定列表中页面内的行的高速缓存错误，然后可以预取此页面中的其他行，而不需要大量额外的目录查找开销。

3. 发明授权

US07610541B2 Computer compressed memory system and method for storing and retrieving data in a processing system 失效
标题翻译：计算机压缩存储器系统和用于在处理系统中存储和检索数据的方法
公开(公告)号：US07610541B2
公开(公告)日：2009-10-27
申请号：US11369987
申请日：2006-03-08
申请人： Robert Brett Tremaine , Peter A. Franaszek
发明人： Robert Brett Tremaine , Peter A. Franaszek
IPC分类号： G11C29/00
CPC分类号： G06F13/16 , G06F12/0802 , G06F12/10
摘要： A computer compressed memory system for storing and retrieving data in a processing system, includes a memory including at least one memory device for storing at least one of uncompressed data and compressed data, a compressor for encoding data blocks into smaller compressed data blocks for storage in the memory, a decompressor for reconstituting encoded data into original uncompressed data blocks, a memory controller for generating, receiving and responding to memory access requests from processing and input/output units and responsively controlling access to the memory from the compressor and the decompressor for storing and retrieving data, and a hardware priority filter associated with the memory controller for selecting specific memory access requests according to attributes and access type within prescribed rates and under specific conditions.
摘要翻译：一种用于在处理系统中存储和检索数据的计算机压缩存储器系统，包括存储器，其包括用于存储未压缩数据和压缩数据中的至少一个的至少一个存储器设备，用于将数据块编码为较小压缩数据块以用于存储的压缩器存储器，用于将编码数据重构成原始未压缩数据块的解压缩器，存储器控制器，用于生成，接收和响应来自处理和输入/输出单元的存储器访问请求，以及响应地控制来自压缩器和解压缩器的存储器的存取以及检索数据，以及与所述存储器控制器相关联的硬件优先级过滤器，用于根据规定速率内的特定条件下的属性和访问类型来选择特定存储器访问请求。

4. 发明申请

US20090070762A1 SYSTEM AND METHOD FOR EVENT-DRIVEN SCHEDULING OF COMPUTING JOBS ON A MULTI-THREADED MACHINE USING DELAY-COSTS 审中-公开
标题翻译：使用延迟成本在多台机器上计算工作的事件驱动调度的系统和方法
公开(公告)号：US20090070762A1
公开(公告)日：2009-03-12
申请号：US11850914
申请日：2007-09-06
申请人： Peter A. Franaszek , Dan E. Poff
发明人： Peter A. Franaszek , Dan E. Poff
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/5038 , G06F2209/483 , G06F2209/5021
摘要： A computer system includes N multi-threaded processors and an operating system. The N multi-threaded processors each have O hardware threads forming a pool of P hardware threads, where N, O, and P are positive integers and P is equal to N times O. The operating system includes a scheduler which receives events for one or more computing jobs. The scheduler receives one of the events and allocates R hardware threads of the pool of P hardware threads to one of the computing jobs by optimizing a sum of priorities of the computing jobs, where each priority is based in part on the number of logical processors requested by a corresponding computing job and R is an integer that is greater than or equal to 0.
摘要翻译：计算机系统包括N个多线程处理器和一个操作系统。 N个多线程处理器各自具有形成P个硬件线程池的O个硬件线程，其中N，O和P是正整数，P等于N倍。操作系统包括调度器，其接收一个或更多的计算工作。调度器接收事件中的一个事件，并通过优化计算作业的优先级之和来分配P个硬件线程池的R个硬件线程到其中一个计算作业，其中每个优先级部分地基于所请求的逻辑处理器的数量通过相应的计算作业，R是大于或等于0的整数。

5. 发明申请

US20080184240A1 SYSTEM AND METHOD FOR PROCESSOR THREAD ALLOCATION USING DELAY-COSTS 有权
标题翻译：使用延迟成本处理器螺纹分配的系统和方法
公开(公告)号：US20080184240A1
公开(公告)日：2008-07-31
申请号：US11669724
申请日：2007-01-31
申请人： Peter A. Franaszek
发明人： Peter A. Franaszek
IPC分类号： G06F9/46
CPC分类号： G06F9/4881
摘要： A computer system includes a plurality of multi-threaded processors, and a scheduler. The multi-threaded processors each have a set of hardware threads forming a pool of hardware threads. The scheduler allocates hardware threads of the pool of hardware threads to one or more guest operating systems based on priorities of the guest operating systems. The priorities of the guest operating systems are based on logical processors requested by the guest operating systems.
摘要翻译：计算机系统包括多个多线程处理器和调度器。多线程处理器各有一组形成硬件线程的硬件线程。调度器基于客户机操作系统的优先级将硬件线程池的硬件线程分配给一个或多个客户机操作系统。客户操作系统的优先级基于客户操作系统所要求的逻辑处理器。

6. 发明授权

US07337278B2 System, method and storage medium for prefetching via memory block tags 有权
标题翻译：用于通过存储器块标签预取的系统，方法和存储介质
公开(公告)号：US07337278B2
公开(公告)日：2008-02-26
申请号：US10709127
申请日：2004-04-15
申请人： Peter A. Franaszek , Luis A. Lastras
发明人： Peter A. Franaszek , Luis A. Lastras
IPC分类号： G06F12/08
CPC分类号： G06F12/0862
摘要： A system for memory management including a tag cache in communication with one or more cache devices in a storage hierarchy. The tag cache includes tags of recently accessed memory blocks where each tag corresponds to one of the pages and each tag includes tag contents. The tag contents control which memory lines of the corresponding memory block are prefetched into at least one of the cache devices. The tag contents are updated using a selected subset of processor references. The subset is referred to as filtered references. The tag contents are modified probabilistically at selected time or events.
摘要翻译：一种用于存储器管理的系统，包括与存储层级中的一个或多个高速缓存设备通信的标签缓存。标签缓存包括最近访问的存储器块的标签，其中每个标签对应于其中一个页面，并且每个标签包括标签内容。标签内容控制对应的存储器块的哪些存储器行被预取到至少一个高速缓存器件中。使用选定的处理器引用子集来更新标签内容。该子集称为过滤引用。标签内容在选定的时间或事件中被概率地修改。

7. 发明授权

US06842832B1 Reclaim space reserve for a compressed memory system 失效
标题翻译：回收压缩内存系统的空间预留
公开(公告)号：US06842832B1
公开(公告)日：2005-01-11
申请号：US09648681
申请日：2000-08-25
申请人： Peter A. Franaszek , Dan E. Poff
发明人： Peter A. Franaszek , Dan E. Poff
IPC分类号： G06F12/00 , G06F12/02 , G06F12/04 , G06F12/08 , G06F12/10 , G06F12/12
CPC分类号： G06F12/023 , G06F12/08 , G06F12/0802 , G06F12/12 , G06F2212/401
摘要： A system and method for managing a memory storage device including a physical memory having free space for storing content maintained in compressed form and organized as pages. The system includes a control device for managing performance of input and output operations of compressed content to and from the memory storage device, with output operations including a memory pageout operations for recovering free memory storage space. The control device maintains an amount of free storage space readily available for recovery to above a threshold amount so as to enable subsequent pageout operations to be performed. A novel data construct is provided that includes locations of pages which may be immediately cleared from the physical memory for a subsequent pageout operation, the control device performing a flush operation by accessing the data construct and expediently deleting one or more pages identified in the list as available for deletion. With this data construct and flush operation, the threshold amount for free storage space recovery is able to be significantly reduced.
摘要翻译：一种用于管理存储器存储设备的系统和方法，所述存储器存储设备包括物理存储器，所述物理存储器具有用于存储以压缩形式保存的内容的自由该系统包括用于管理来自存储器存储设备的压缩内容的输入和输出操作的性能的控制设备，其中输出操作包括用于恢复可用存储器存储空间的存储器输出操作。控制装置将可用于恢复的可用存储空间的量保持在阈值以上，以便能够执行后续的页面输出操作。提供了一种新颖的数据结构，其包括可以立即从物理存储器清除的用于随后的页面输出操作的页面的位置，所述控制设备通过访问数据结构来执行刷新操作，并方便地删除列表中标识的一个或多个页面，可供删除。通过这种数据结构和刷新操作，可以显着降低空闲存储空间恢复的阈值。

8. 发明授权

US06587923B1 Dual line size cache directory 失效
标题翻译：双行大小缓存目录
公开(公告)号：US06587923B1
公开(公告)日：2003-07-01
申请号：US09575549
申请日：2000-05-22
申请人： Caroline D. Benveniste , Peter A. Franaszek , John T. Robinson
发明人： Caroline D. Benveniste , Peter A. Franaszek , John T. Robinson
IPC分类号： G06F1206
CPC分类号： G06F12/0864 , G06F12/0897 , G06F2212/401
摘要： In a computer system having a processor, a memory system including multiple levels of caches L1, L2, . . . , Ln−1 and including main memory Ln, and in which the cache Li−1 includes lines of size s and the cache Li includes lines of size t with t>s, a dual line size cache directory mechanism, in which the contents of a cache Li−1 may be accessed at line size granularity s (in which case it is determined whether a line corresponding to a given memory address is stored in Li−1, and if so its location and status), and in which the contents of Li−1 may also be accessed at line size granularity t (in which case it is determined whether any of the t/s lines of size s residing in the larger line of size t corresponding to a given memory address are stored in Li−1, and if so their locations and status) without multiple sequential accesses to a cache Li−1 directory structure.
摘要翻译：在具有处理器的计算机系统中，包括多级缓存L1，L2的存储器系统。。。 Ln-1并且包括主存储器Ln，并且其中高速缓存Li-1包括大小为s的行，并且高速缓存Li包括具有t> s的大小为t的行，双行大小的高速缓存目录机制，其中，可以以行尺寸粒度s访问高速缓存Li-1（在这种情况下，确定对应于给定存储器地址的行是否存储在Li-1中，如果存储在Li-1中，则确定其位置和状态），并且其中内容还可以以行大小粒度t访问Li-1（在这种情况下，确定驻留在对应于给定存储器地址的较大行的大小为t的t / s行中的任一个是否存储在Li- 1，如果是这样，他们的位置和状态）没有多次顺序访问缓存Li-1目录结构。

9. 发明授权

US06401181B1 Dynamic allocation of physical memory space 失效
标题翻译：动态分配物理内存空间
公开(公告)号：US06401181B1
公开(公告)日：2002-06-04
申请号：US09627516
申请日：2000-07-28
申请人： Peter A. Franaszek , Michel Hack , Charles O. Schulz , T. Basil Smith, III , R. Brett Tremaine
发明人： Peter A. Franaszek , Michel Hack , Charles O. Schulz , T. Basil Smith, III , R. Brett Tremaine
IPC分类号： G06F1202
CPC分类号： G06F12/1009 , Y10S707/99953 , Y10S707/99956
摘要： In a computer system, a system and methodology for dynamically allocating available physical memory to addressable memory space on an as needed basis, and to recover unused physical memory space when it is no longer needed. Physical memory is assigned to addressable memory space when that memory space is first written. When the system software determines it has no further need of a memory space, the physical memory is recovered and made available for reuse.
摘要翻译：在计算机系统中，用于根据需要将可用物理存储器动态地分配给可寻址存储器空间的系统和方法，以及在不再需要时恢复未使用的物理存储器空间。当第一次写入该存储空间时，物理内存被分配给可寻址的存储器空间。当系统软件确定不再需要存储器空间时，物理存储器被恢复并可用于重用。

10. 发明授权

US5522032A Raid level 5 with free blocks parity cache 失效
标题翻译： RAID 5级带有自由块奇偶缓存
公开(公告)号：US5522032A
公开(公告)日：1996-05-28
申请号：US238769
申请日：1994-05-05
申请人： Peter A. Franaszek , John T. Robinson , Alexander Thomasian
发明人： Peter A. Franaszek , John T. Robinson , Alexander Thomasian
IPC分类号： G06F3/06 , G06F11/10 , G06F12/08 , G06F11/34
CPC分类号： G06F11/1076 , G06F12/0866 , G06F2211/1009 , G06F2211/1033 , G06F2211/1059 , G06F2212/312
摘要： A system for writing data to a disk array includes a cache memory coupled to the disk array for storing data indicative of locations on the disk array and parity blocks associated with parity groups including the locations. Each of the parity blocks includes an identifier indicative of locations within a particular parity group which are protected by the parity data. Write logic reads the identifier from the parity block, and based thereon, determines whether a disk location is not protected by the parity data. The write logic also writes to the location and updates the parity data and the identifier associated with the parity block to include the location of the data block to indicate that the location is protected.
摘要翻译：用于将数据写入磁盘阵列的系统包括耦合到磁盘阵列的高速缓存存储器，用于存储指示磁盘阵列上的位置的数据以及与包括位置的奇偶校验组相关联的奇偶校验块。每个奇偶校验块包括指示由奇偶校验数据保护的特定奇偶校验组内的位置的标识符。写入逻辑从奇偶校验块读取标识符，并且基于此，确定磁盘位置是否不被奇偶校验数据保护。写入逻辑还写入位置并且更新奇偶校验数据和与奇偶校验块相关联的标识符以包括数据块的位置以指示该位置被保护。

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