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1. 发明申请

US20120105373A1 METHOD FOR DETECTING TOUCH STATUS OF SURFACE OF INPUT DEVICE AND INPUT DEVICE THEREOF 审中-公开
标题翻译：检测输入装置表面触摸状态及其输入装置的方法
公开(公告)号：US20120105373A1
公开(公告)日：2012-05-03
申请号：US12916593
申请日：2010-10-31
申请人： Chih-Min Liu , Yi-Cheng Chou
发明人： Chih-Min Liu , Yi-Cheng Chou
IPC分类号： G06F3/042
CPC分类号： G06F3/0428
摘要： A method for detecting a touch status of a surface of an input device, comprising: utilizing a first two-dimension (2D) image sensor disposed at a first location for capturing a first captured image of an object on the surface; and outputting a plurality of first positions of the object relative to the surface respectively by analyzing horizontal lines of the first captured image.
摘要翻译：一种用于检测输入设备的表面的触摸状态的方法，包括：利用设置在第一位置处的第一二维（2D）图像传感器来捕获表面上的对象的第一捕获图像; 并通过分析第一拍摄图像的水平线分别输出物体相对于表面的多个第一位置。

2. 发明授权

US08130290B2 Black level compensation circuit 有权
标题翻译：黑电平补偿电路
公开(公告)号：US08130290B2
公开(公告)日：2012-03-06
申请号：US12477899
申请日：2009-06-03
申请人： Chih-Min Liu , Boh-Shun Chiu , Ping-Hung Yin
发明人： Chih-Min Liu , Boh-Shun Chiu , Ping-Hung Yin
IPC分类号： H04N9/64 , H04N5/217
CPC分类号： H04N5/361 , H04N5/367
摘要： A black level compensation (BLC) circuit is disclosed. The BLC circuit includes a switched-capacitor (SC) integrator configured to compensate a readout amplifier of an image sensor. An output of the readout amplifier is clamped to a reference voltage at which a black level of the image sensor is defined. According to one aspect, a bad pixel detector is used to detect a bad pixel or pixels and disconnect the BLC loop when the bad pixel or pixels are detected.
摘要翻译：公开了黑电平补偿（BLC）电路。 BLC电路包括被配置为补偿图像传感器的读出放大器的开关电容（SC）积分器。读出放大器的输出被钳位到定义图像传感器的黑色电平的参考电压。根据一个方面，当检测到不良像素或像素时，使用不良像素检测器来检测不良像素或断开BLC环路。

3. 发明申请

US20110058073A1 Signal Chain of an Imaging System 有权
标题翻译：成像系统的信号链
公开(公告)号：US20110058073A1
公开(公告)日：2011-03-10
申请号：US12555654
申请日：2009-09-08
申请人： CHIH-MIN LIU , AMIT MITTRA , CHI-SHAO LIN
发明人： CHIH-MIN LIU , AMIT MITTRA , CHI-SHAO LIN
IPC分类号： H04N9/64
CPC分类号： H04N5/361
摘要： A signal chain of an imaging system is disclosed. The system includes three circuit stages. The first circuit stage includes a programmable gain amplifier (PGA) and a black level compensation (BLC) circuit that form a BLC loop. The second circuit stage includes an analog-to-digital converter (ADC), where a dark signal offset is added at an input of the ADC. The third circuit stage includes a digital gain circuit and a digital loop that makes a final output of the imaging system settle on a target level in the BLC mode.
摘要翻译：公开了一种成像系统的信号链。该系统包括三个电路级。第一电路级包括形成BLC回路的可编程增益放大器（PGA）和黑电平补偿（BLC）电路。第二电路级包括模数转换器（ADC），其中在ADC的输入处加上暗信号偏移。第三电路级包括数字增益电路和使得成像系统的最终输出在BLC模式下达到目标电平的数字环路。

4. 发明授权

US07863666B2 Capacitor pair structure for increasing the match thereof 有权
标题翻译：用于增加其匹配的电容器对结构
公开(公告)号：US07863666B2
公开(公告)日：2011-01-04
申请号：US12219364
申请日：2008-07-21
申请人： Chih-Min Liu
发明人： Chih-Min Liu
IPC分类号： H01L29/92
CPC分类号： H01L23/5223 , H01L23/5225 , H01L28/60 , H01L2924/0002 , H01L2924/00
摘要： A capacitor pair structure for increasing the match thereof has two finger electrode structures interlacing with each other in parallel and a common electrode being between the two finger electrode structures to form a capacitor pair structure with an appropriate ratio. Also, the capacitor pair structure could further increase its entire capacitance through vias connecting the same capacitor pair structures on different metal layers.
摘要翻译：用于增加其匹配的电容器对结构具有两个手指电极结构彼此并联并且公共电极在两个指状电极结构之间，以形成具有适当比例的电容器对结构。此外，电容器对结构可以通过连接不同金属层上的相同电容器对结构的通孔进一步增加其整个电容。

5. 发明授权

US07443211B2 Transmitter and transmission circuit 有权
标题翻译：发射机和传输电路
公开(公告)号：US07443211B2
公开(公告)日：2008-10-28
申请号：US11562426
申请日：2006-11-22
申请人： Chih-Min Liu
发明人： Chih-Min Liu
IPC分类号： H03B1/00
CPC分类号： H03K5/1534 , H03K17/6872 , H03K19/01721 , H04L25/0272 , H04L25/0286
摘要： Transmitter and transmission circuit. For realizing a differential transmitter, a switch circuit is connected between two load transistors of two complementary MOS pairs. The switch circuit can have two inductors. When the two complementary MOS pairs are conducting current to drive signal transition at output nodes, the inductors open to make the load transistors stop draining current. Also, the switch circuit can have switch transistor controlled by an edge detector for detecting raising and falling edges of the input signals, such that the switch circuit can make the load transistors stop draining current accordingly. In this way, raising and falling edges of the output signals are emphasized to improve signal propagation.
摘要翻译：发射机和传输电路。为了实现差分发射器，开关电路连接在两个互补MOS对的两个负载晶体管之间。开关电路可以有两个电感器。当两个互补MOS对导通电流以驱动输出节点处的信号转换时，电感器打开以使负载晶体管停止引流。此外，开关电路可以由用于检测输入信号的升高和下降沿的边沿检测器控制开关晶体管，使得开关电路可以使负载晶体管相应地停止排水电流。以这种方式，强调输出信号的上升沿和下降沿以改善信号传播。

6. 发明申请

US20080054843A1 LINEAR BATTERY CHARGER 有权
标题翻译：线性电池充电器
公开(公告)号：US20080054843A1
公开(公告)日：2008-03-06
申请号：US11758711
申请日：2007-06-06
申请人： Chih-Min Liu
发明人： Chih-Min Liu
IPC分类号： H02J7/00
CPC分类号： H02J7/0052
摘要： A linear battery chargers is disclosed which comprises a current generator, a current detector, an operational amplifier, and a multiplexing device. The current generator provides current to charge a battery module, and the current is detected and transformed to a detected voltage by the current detector. The operational amplifier has an output terminal coupled to a control terminal of the current generator. In a constant current charge mode, the multiplexing device couples a first reference voltage and the detected voltage to first and second input terminals of the operational amplifier, respectively. The current generated by the current generator is maintained at a constant current level. In a constant voltage charge mode, the multiplexing device couples a second reference voltage and the voltage level of the battery module to the first and second input terminals of the operational amplifier, respectively. The voltage level of the battery module gradually approaches a constant voltage level.
摘要翻译：公开了一种线性电池充电器，其包括电流发生器，电流检测器，运算放大器和多路复用装置。电流发生器提供电流以对电池模块充电，并且通过电流检测器检测电流并将其转换为检测到的电压。运算放大器具有耦合到电流发生器的控制端的输出端。在恒流充电模式中，多路复用器件将第一参考电压和检测电压分别耦合到运算放大器的第一和第二输入端。由电流发生器产生的电流保持在恒定电流水平。在恒压充电模式中，多路复用器件将第二参考电压和电池模块的电压电平分别耦合到运算放大器的第一和第二输入端。电池模块的电压电平逐渐接近恒定电压电平。

7. 发明申请

US20070152749A1 Transmission Circuit and Related Method 有权
标题翻译：传输电路及相关方法
公开(公告)号：US20070152749A1
公开(公告)日：2007-07-05
申请号：US11538060
申请日：2006-10-03
申请人： Chih-Min Liu
发明人： Chih-Min Liu
IPC分类号： H03G3/20
CPC分类号： H03K5/151 , H03K5/01 , H04L25/0272 , H04L25/028
摘要： A transmission circuit and related method are disclosed. A transmitter in the transmission circuit has CMOS transistors as driving units for responding an input signal to drive an output signal at an output node, and each driving unit has a corresponding charge unit formed by a capacitor-connected MOS of a same type as that of the corresponding driving unit. Each charge unit is controlled by an auxiliary signal inverse to the input signal. When a level transition occurs in the input signal, the charge unit can compensate charge injection and clock feed-through caused by the driving unit at the output node, and form peaks for pre-emphasis. In this way, a better transmission property can be realized by using a simpler and low-power circuit design.
摘要翻译：公开了一种传输电路及相关方法。传输电路中的发射机具有CMOS晶体管作为用于响应输入信号以驱动输出节点处的输出信号的驱动单元，并且每个驱动单元具有由电容器连接的MOS形成的对应的充电单元，该电容器连接的MOS与相应的驱动单元。每个充电单元由与输入信号相反的辅助信号控制。当输入信号发生电平转换时，充电单元可以补偿由输出节点上的驱动单元引起的电荷注入和时钟馈通，并形成预加重的峰值。以这种方式，通过使用更简单和低功耗的电路设计可以实现更好的传输特性。

8. 发明申请

US20060002282A1 System of sampling interface for an optical pick-up head 有权
公开(公告)号：US20060002282A1
公开(公告)日：2006-01-05
申请号：US11088856
申请日：2005-03-25
申请人： Chih-Min Liu
发明人： Chih-Min Liu
IPC分类号： G11B7/00
CPC分类号： H03F3/087
摘要： A system of sampling interface for an optical pick-up head comprises an optical pick-up head, a PMOS, a boost circuit, and a sample and hold circuit. The optical pick-up head outputs one of a reading voltage and a writing voltage. The PMOS gate receives the gate voltage and then the PMOS is turned on to pass the reading voltage to the sample and hold circuit. Moreover, the substrate of the PMOS receives a control voltage. The boost circuit is used to boost the gate voltage higher than the control voltage for turning off the PMOS and isolating the writing voltage.

9. 发明申请

US20050281168A1 System of sampling interface for an optical pick-up head 审中-公开
标题翻译：光学拾音头采样接口系统
公开(公告)号：US20050281168A1
公开(公告)日：2005-12-22
申请号：US11090020
申请日：2005-03-28
申请人： Chih-Min Liu
发明人： Chih-Min Liu
IPC分类号： G11B7/00 , G11C27/02
CPC分类号： G11C27/02
摘要： A system of sampling interface for an optical pick-up head includes an optical pick-up head, a switch circuit and a sample and hold circuit. The optical pick-up head outputs one of a reading voltage and a writing voltage. The switch circuit includes a NMOS. The NMOS has a first source/drain for receiving the reading voltage and the writing voltage, and has a gate for receiving the gate voltage. The NMOS turns on the first source/drain and the second source/drain when receiving the reading voltage, and turns them off when receiving the writing voltage. Finally, a sample and hold circuit connects to the second source/drain of the NMOS for sampling and holding the reading voltage.
摘要翻译：用于光学拾取头的采样接口系统包括光学拾取头，开关电路和采样和保持电路。拾光头输出读取电压和写入电压之一。开关电路包括NMOS。 NMOS具有用于接收读取电压和写入电压的第一源极/漏极，并且具有用于接收栅极电压的栅极。当接收到读取电压时，NMOS接通第一个源极/漏极和第二个源极/漏极，并在接收到写入电压时将其关断。最后，采样和保持电路连接到NMOS的第二个源极/漏极，用于采样并保持读取电压。

10. 发明申请

US20130266231A1 SERIAL IMAGE DATA FORMAT AND METHOD AND APPARATUS FOR CONVERING IMAGE DATA FROM SERIAL TO PARALLEL 有权
标题翻译：串行图像数据格式和将图像数据从串行转换为并行的方法和装置
公开(公告)号：US20130266231A1
公开(公告)日：2013-10-10
申请号：US13439123
申请日：2012-04-04
申请人： Chih-Min LIU
发明人： Chih-Min LIU
IPC分类号： G06K9/36
CPC分类号： G09G5/12 , G09G5/006 , G09G2370/10
摘要： A method for converting image data from serial to parallel is provided. The method has steps of: receiving serial data of an image into a line buffer according to a serial clock signal of the image, wherein the serial data at least comprises a frame start code, and a row start code; detecting the frame start code of the serial data in the line buffer to trigger a vertical synchronous signal of the image; and detecting the row start code of the serial data in the line buffer to trigger a horizontal synchronous signal of the image.
摘要翻译：提供了一种将图像数据从串行转换为并行的方法。该方法具有以下步骤：根据图像的串行时钟信号将图像的串行数据接收到行缓冲器中，其中串行数据至少包括帧起始码和行起始码; 检测行缓冲器中的串行数据的帧起始码，以触发图像的垂直同步信号; 并且检测行缓冲器中的串行数据的行起始码以触发图像的水平同步信号。

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