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1. 发明授权

US08487792B2 Method of gain calibration of an ADC stage and an ADC stage 有权
标题翻译： ADC级和ADC级的增益校准方法
公开(公告)号：US08487792B2
公开(公告)日：2013-07-16
申请号：US13121951
申请日：2009-10-05
申请人： Christophe Erdmann
发明人： Christophe Erdmann
IPC分类号： H03M1/06
CPC分类号： H03M1/0641
摘要： A method of gain calibration of an ADC stage is provided. The method includes steps of receiving an input analog signal, converting the input analog signal into an m-bit digital signal by means of an analog to digital converter, generating a calibration signal by means of a random number generator, adding the calibration signal to the m-bit digital signal to produce an adjusted m-bit digital signal, converting the adjusted m-bit digital signal into an adjusted partial analog signal by means of a digital to analogue converter, subtracting the partial analog signal from the input analog signal, to produce a residual analog signal, amplifying the residual analog signal. The the calibration signal may take any one of three values and may be constrained to one of only two of these three values. An ADC stage adapted to operate according to the method is also provided.
摘要翻译：提供了ADC级的增益校准方法。该方法包括以下步骤：接收输入模拟信号，借助于模数转换器将输入模拟信号转换成m位数字信号，通过随机数发生器产生校准信号，将校准信号加到 m比特数字信号，以产生经调整的m位数字信号，通过数模转换器将调整后的m位数字信号转换成调整后的部分模拟信号，从输入模拟信号中减去部分模拟信号，产生残留模拟信号，放大残留的模拟信号。校准信号可以采用三个值中的任何一个，并且可以被限制为这三个值中的仅两个之一。还提供了适于根据该方法操作的ADC级。

2. 发明申请

US20110285564A1 METHOD OF GAIN CALIBRATION OF AN ADC STAGE AND AN ADC STAGE 有权
标题翻译： ADC阶段和ADC阶段的校准方法
公开(公告)号：US20110285564A1
公开(公告)日：2011-11-24
申请号：US13121951
申请日：2009-10-05
申请人： Christophe Erdmann
发明人： Christophe Erdmann
IPC分类号： H03M1/10
CPC分类号： H03M1/0641
摘要： A method of gain calibration of an ADC stage is disclosed. The method comprises receiving an input analog signal, converting the input analog signal into an m-bit digital signal by means of an analog to digital converter, generating a calibration signal by means of a random number generator, adding the calibration signal to the m-bit digital signal to produce an adjusted m-bit digital signal, converting the adjusted m-bit digital signal into an adjusted partial analog signal by means of a digital to analogue converter, subtracting the partial analog signal from the input analog signal, to produce a residual analog signal, amplifying the residual analog signal. The method is characterised in that the calibration signal may take any one of three values. In a preferred embodiment, the calibration is constrained to one of only two of these three values, when the input signal is in an outermost sub-range. An ADC stage adapted to operate according to the method is also disclosed.
摘要翻译：公开了一种ADC级的增益校准方法。该方法包括接收输入模拟信号，借助于模拟 - 数字转换器将输入的模拟信号转换为m位数字信号，通过随机数发生器产生校准信号，将校准信号加到m- 以产生经调整的m位数字信号，通过数模转换器将调整的m位数字信号转换成调整后的部分模拟信号，从输入的模拟信号中减去部分模拟信号，产生一个残留模拟信号，放大残留模拟信号。该方法的特征在于，校准信号可以采用三个值中的任何一个。在优选实施例中，当输入信号处于最外侧子范围时，校准被限制为这三个值中的仅两个之一。还公开了适于根据该方法操作的ADC级。

3. 发明申请

US20140084477A1 NOISE ATTENUATION WALL 有权
标题翻译：噪声衰减墙
公开(公告)号：US20140084477A1
公开(公告)日：2014-03-27
申请号：US13626829
申请日：2012-09-25
申请人： Christophe Erdmann , Edward Cullen , Donnacha Lowney
发明人： Christophe Erdmann , Edward Cullen , Donnacha Lowney
IPC分类号： H01L23/50 , H01L25/00
CPC分类号： H01L23/49827 , H01L23/5382 , H01L23/5384 , H01L23/552 , H01L23/66 , H01L24/16 , H01L25/0655 , H01L2223/6622 , H01L2224/16225 , H01L2924/14 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311
摘要： An embodiment of an apparatus is disclosed. For this embodiment of the apparatus, an interposer has first vias. First interconnects and second interconnects respectively are coupled on opposite surfaces of the interposer. A first portion of the first interconnects and a second portion of the first interconnects are spaced apart from one another defining an isolation region between them. A substrate has second vias. Third interconnects and the second interconnects are respectively coupled on opposite surfaces of the package substrate. A first portion of the first vias and a first portion of the second vias are both in the isolation region and are coupled to one another with a first portion of the second interconnects.
摘要翻译：公开了一种装置的实施例。对于该装置的该实施例，插入器具有第一通孔。第一互连和第二互连分别耦合在插入器的相对表面上。第一互连的第一部分和第一互连的第二部分彼此间隔开，在它们之间限定隔离区。衬底具有第二通孔。第三互连和第二互连分别耦合在封装衬底的相对表面上。第一通孔的第一部分和第二通孔的第一部分都在隔离区域中并且彼此耦合，具有第二互连的第一部分。

4. 发明授权

US08451154B2 Pipelined ADC calibration 有权
标题翻译：流水线ADC校准
公开(公告)号：US08451154B2
公开(公告)日：2013-05-28
申请号：US13124780
申请日：2009-10-19
申请人： Christophe Erdmann , Arnaud Antoine Paul Biallais
发明人： Christophe Erdmann , Arnaud Antoine Paul Biallais
IPC分类号： H03M1/06
CPC分类号： H03M1/1057 , H03M1/0695 , H03M1/164 , H03M1/804
摘要： A method of calibrating a pipelined analog to digital converter having a plurality of DAC elements and an additional calibration DAC element is provided. In the method as provided herein, a combination of positive, negative and zero reference voltages are applied to the element under calibration and positive and negative reference voltages are applied to the additional calibration DAC element to obtain four calibration states. An error of the DAC element under calibration is extracted by calculating an average of the difference between the four calibration states.
摘要翻译：提供了一种校准具有多个DAC元件和附加校准DAC元件的流水线模数转换器的方法。在本文提供的方法中，将正，负和零参考电压的组合施加到校准元件，并将正和负参考电压施加到附加校准DAC元件以获得四个校准状态。通过计算四个校准状态之间的差的平均值来提取校准下的DAC元件的误差。

5. 发明申请

US20110199244A1 Pipelined ADC Calibration 有权
标题翻译：流水线ADC校准
公开(公告)号：US20110199244A1
公开(公告)日：2011-08-18
申请号：US13124780
申请日：2009-10-19
申请人： Christophe Erdmann , Arnaud Antoine Paul Biallais
发明人： Christophe Erdmann , Arnaud Antoine Paul Biallais
IPC分类号： H03M1/10 , H03M1/00
CPC分类号： H03M1/1057 , H03M1/0695 , H03M1/164 , H03M1/804
摘要： A method of calibrating a pipelined analog to digital converter (400) having a plurality of DAC elements (410) and an additional calibration DAC element (420), in which a combination of positive, negative and zero reference voltages to the element under calibration and positive and negative reference voltages to the additional calibration DAC element to obtain four calibration states from which an error of the element under calibration is extracted by calculating an average of the difference between the four calibration states.
摘要翻译：一种校准具有多个DAC元件（410）和附加校准DAC元件（420）的流水线模数转换器（400）的方法，其中正，负和零参考电压组合到校准元件上，以及正和负参考电压到附加校准DAC元件，以获得四个校准状态，通过计算四个校准状态之间的差的平均值，从中提取校准元件的误差。

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