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1. 发明授权

US09230932B2 Interconnect crack arrestor structure and methods 有权
标题翻译：互连防爆器结构和方法
公开(公告)号：US09230932B2
公开(公告)日：2016-01-05
申请号：US13370127
申请日：2012-02-09
申请人： Chen-Hua Yu , Da-Yuan Shih
发明人： Chen-Hua Yu , Da-Yuan Shih
IPC分类号： H01L23/544 , H01L23/48 , H01L23/00
CPC分类号： H01L23/562 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/45 , H01L24/49 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/0361 , H01L2224/0401 , H01L2224/05012 , H01L2224/05013 , H01L2224/05014 , H01L2224/05015 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05583 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/1131 , H01L2224/1134 , H01L2224/114 , H01L2224/1145 , H01L2224/1146 , H01L2224/11462 , H01L2224/1147 , H01L2224/1161 , H01L2224/11616 , H01L2224/11825 , H01L2224/11849 , H01L2224/13011 , H01L2224/13012 , H01L2224/13014 , H01L2224/13076 , H01L2224/13078 , H01L2224/13111 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/13582 , H01L2224/13644 , H01L2224/13655 , H01L2224/13657 , H01L2224/13664 , H01L2224/13671 , H01L2224/13672 , H01L2224/1601 , H01L2224/16237 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4554 , H01L2224/81191 , H01L2224/81193 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2924/15787 , H01L2924/3512 , H01L2924/00014 , H01L2924/01029 , H01L2924/01074 , H01L2924/00012 , H01L2224/10125 , H01L2224/10155 , H01L2924/00
摘要： A system and method for preventing cracks is provided. An embodiment comprises placing crack stoppers into a connection between a semiconductor die and a substrate. The crack stoppers may be in the shape of hollow or solid cylinders and may be placed so as to prevent any cracks from propagating through the crack stoppers.
摘要翻译：提供一种用于防止裂纹的系统和方法。一个实施例包括将裂缝塞子放置在半导体管芯和衬底之间的连接中。裂缝止动器可以是中空或实心圆筒的形状，并且可以放置成防止任何裂纹通过裂缝塞子传播。

2. 发明授权

US08476773B2 Electrical interconnect structure 有权
标题翻译：电互连结构
公开(公告)号：US08476773B2
公开(公告)日：2013-07-02
申请号：US12787485
申请日：2010-05-26
申请人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
发明人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L23/52
CPC分类号： H01L24/16 , H01L21/563 , H01L21/6835 , H01L24/11 , H01L24/12 , H01L24/27 , H01L24/28 , H01L24/31 , H01L24/73 , H01L24/81 , H01L24/94 , H01L2221/68377 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/11003 , H01L2224/1131 , H01L2224/11334 , H01L2224/114 , H01L2224/116 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2224/16 , H01L2224/16225 , H01L2224/17051 , H01L2224/274 , H01L2224/29111 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2924/0001 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H05K3/3436 , H05K2201/0379 , H05K2201/094 , H05K2201/10234 , H05K2201/10242 , H05K2201/10977 , Y02P70/613 , Y10T29/49165 , H01L2224/45111 , H01L2924/01047 , H01L2224/13099 , H01L2924/01083 , H01L2924/00 , H01L2224/29099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An electrical structure including a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要翻译：一种电结构，包括包括第一导电焊盘的第一基板，包括第二导电焊盘的第二基板和将第一导电焊盘电连接和机械连接到第二导电焊盘的互连结构。互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

3. 发明申请

US20130037950A1 Multi-Chip Wafer Level Package 有权
标题翻译：多芯片晶圆级封装
公开(公告)号：US20130037950A1
公开(公告)日：2013-02-14
申请号：US13206694
申请日：2011-08-10
申请人： Chun Hui Yu , Chih-Hang Tung , Tung-Liang Shao , Chen-Hua Yu , Da-Yuan Shih
发明人： Chun Hui Yu , Chih-Hang Tung , Tung-Liang Shao , Chen-Hua Yu , Da-Yuan Shih
IPC分类号： H01L23/485 , H01L21/82 , H01L21/56
CPC分类号： H01L23/481 , H01L21/563 , H01L21/568 , H01L21/76805 , H01L21/76838 , H01L23/3121 , H01L23/3128 , H01L23/49816 , H01L23/5226 , H01L23/5389 , H01L24/16 , H01L24/19 , H01L24/24 , H01L24/82 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/19 , H01L2224/32145 , H01L2224/32245 , H01L2224/73253 , H01L2224/73267 , H01L2224/81005 , H01L2224/8203 , H01L2224/94 , H01L2225/06513 , H01L2225/06524 , H01L2225/06548 , H01L2225/06568 , H01L2924/01029 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18162 , H01L2924/351 , H01L2924/00 , H01L2224/03 , H01L2224/83005
摘要： A multi-chip wafer level package comprises three stacked semiconductor dies. A first semiconductor die is embedded in a first photo-sensitive material layer. A second semiconductor die is stacked on top of the first semiconductor die wherein the second semiconductor die is face-to-face coupled to the first semiconductor die. A third semiconductor die is back-to-back attached to the second semiconductor die. Both the second semiconductor die and the third semiconductor die are embedded in a second photo-sensitive material layer. The multi-chip wafer level package further comprises a plurality of through assembly vias formed in the first photo-sensitive material layer and the second photo-sensitive material layer.
摘要翻译：多芯片晶片级封装包括三个堆叠的半导体管芯。第一半导体管芯被嵌入在第一光敏材料层中。第二半导体管芯堆叠在第一半导体管芯的顶部上，其中第二半导体管芯与第一半导体管芯面对面连接。第三半导体管芯背靠背连接到第二半导体管芯。第二半导体管芯和第三半导体管芯都嵌入第二光敏材料层。多芯片晶片级封装还包括形成在第一光敏材料层和第二光敏材料层中的多个通过组装通孔。

4. 发明授权

US08242010B2 Electrical interconnect forming method 有权
标题翻译：电互连成型方法
公开(公告)号：US08242010B2
公开(公告)日：2012-08-14
申请号：US12787503
申请日：2010-05-26
申请人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
发明人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L21/44
CPC分类号： H01L24/16 , H01L21/563 , H01L21/6835 , H01L24/11 , H01L24/12 , H01L24/27 , H01L24/28 , H01L24/31 , H01L24/73 , H01L24/81 , H01L24/94 , H01L2221/68377 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/11003 , H01L2224/1131 , H01L2224/11334 , H01L2224/114 , H01L2224/116 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2224/16 , H01L2224/16225 , H01L2224/17051 , H01L2224/274 , H01L2224/29111 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2924/0001 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H05K3/3436 , H05K2201/0379 , H05K2201/094 , H05K2201/10234 , H05K2201/10242 , H05K2201/10977 , Y02P70/613 , Y10T29/49165 , H01L2224/45111 , H01L2924/01047 , H01L2224/13099 , H01L2924/01083 , H01L2924/00 , H01L2224/29099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An electrical interconnect forming method. The electrical interconnect includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要翻译：电互连形成方法。电互连包括包括第一导电焊盘的第一衬底，包括第二导电焊盘的第二衬底以及将第一导电焊盘电连接和机械地连接到第二导电焊盘的互连结构。互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

5. 发明授权

US08156998B2 Patterned metal thermal interface 有权
标题翻译：图案金属热接口
公开(公告)号：US08156998B2
公开(公告)日：2012-04-17
申请号：US12710951
申请日：2010-02-23
申请人： Bruce K. Furman , Sushumna Iruvanti , Paul A. Lauro , Yves C. Martin , Da Yuan Shih , Theodore G. Van Kessel , Wei Zou
发明人： Bruce K. Furman , Sushumna Iruvanti , Paul A. Lauro , Yves C. Martin , Da Yuan Shih , Theodore G. Van Kessel , Wei Zou
IPC分类号： F28F7/00
CPC分类号： H01L23/433 , F28F13/00 , F28F2013/005 , H01L2224/73253 , Y10T29/4935 , Y10T29/53113
摘要： The present invention is a patterned metal thermal interface. In one embodiment a system for dissipating heat from a heat-generating device includes a heat sink having a first surface adapted for thermal coupling to a first surface of the heat generating device and a thermal interface having at least one patterned surface, the thermal interface being adapted to thermally couple the first surface of the heat sink to the first surface of the heat generating device. The patterned surface of the thermal interface allows the thermal interface to deform under compression between the heat sink and the heat generating device, leading to better conformity of the thermal interface to the surfaces of the heat sink and the heat generating device.
摘要翻译：本发明是图案化的金属热界面。在一个实施例中，用于从发热装置散热的系统包括具有适于热耦合到发热装置的第一表面的第一表面的散热器和具有至少一个图案化表面的热界面，所述热界面是适于将散热器的第一表面热耦合到发热装置的第一表面。热界面的图案化表面允许热界面在散热器和发热装置之间的压缩下变形，导致热界面与散热器和发热装置的表面更好地一致。

6. 发明申请

US20120063090A1 COOLING MECHANISM FOR STACKED DIE PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：堆叠式包装的冷却机构及其制造方法
公开(公告)号：US20120063090A1
公开(公告)日：2012-03-15
申请号：US12878319
申请日：2010-09-09
申请人： Yi-Li HSIAO , Chen-Hua YU , Da-Yuan SHIH , Chih-Hang TUNG , Chun Hui YU
发明人： Yi-Li HSIAO , Chen-Hua YU , Da-Yuan SHIH , Chih-Hang TUNG , Chun Hui YU
IPC分类号： H01L23/34 , H01L21/50
CPC分类号： H01L23/44 , H01L23/473 , H01L24/14 , H01L24/16 , H01L25/0652 , H01L25/0657 , H01L25/165 , H01L25/18 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06589 , H01L2924/01019 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1461 , H01L2924/157 , H01L2924/00
摘要： An apparatus for cooling a stacked die package comprises a substrate, a first die above the substrate, a second die above the first die, and a housing containing the first and second dies. The housing seals the first and second dies from the environment. The apparatus further includes a cooling fluid in fluid communication with the first die and the second die to transfer the heat from the dies to the housing.
摘要翻译：一种用于冷却堆叠管芯封装的装置，包括：衬底，在衬底上方的第一裸片，在第一裸片上方的第二裸片;以及容纳第一和第二裸片的外壳。壳体将第一和第二模具与环境密封。该装置还包括与第一模具和第二模具流体连通的冷却流体，以将来自模具的热量传递到壳体。

7. 发明申请

US20110240279A1 HYBRID LIQUID METAL-SOLDER THERMAL INTERFACE 审中-公开
标题翻译：混合液体金属焊接热界面
公开(公告)号：US20110240279A1
公开(公告)日：2011-10-06
申请号：US12750258
申请日：2010-03-30
申请人： BRUCE K. Furman , Paul A. Lauro , Yves C. Martin , Robert L. Sandstrom , Da-Yuan Shih , Theodore G. Van Kessel
发明人： BRUCE K. Furman , Paul A. Lauro , Yves C. Martin , Robert L. Sandstrom , Da-Yuan Shih , Theodore G. Van Kessel
IPC分类号： F28F21/08 , B32B15/01 , B23K35/02 , B32B15/04
CPC分类号： B23K35/0238 , B32B15/01 , F28F3/02 , F28F2013/006 , H01L23/3735 , H01L23/42 , H01L23/427 , H01L2924/0002 , Y10T428/12222 , Y10T428/12493 , Y10T428/12681 , Y10T428/12701 , Y10T428/12708 , Y10T428/12889 , Y10T428/12896 , H01L2924/00
摘要： The present invention is hybrid liquid metal-solder thermal interface. In one embodiment, a thermal interface for coupling a heat generating device to a heat sink includes a first metal interface layer, a second metal interface layer, and an isolation layer positioned between the first metal interface layer and the second metal interface layer, where at least one of the first metal interface layer and the second metal interface layer comprises a liquid metal.
摘要翻译：本发明是混合液态金属 - 焊料热界面。在一个实施例中，用于将发热装置耦合到散热器的热界面包括第一金属界面层，第二金属界面层和位于第一金属界面层和第二金属界面层之间的隔离层，其中在第一金属界面层和第二金属界面层中的至少一个包括液态金属。

8. 发明申请

US20110156256A1 ELECTROMIGRATION-RESISTANT UNDER-BUMP METALLIZATION OF NICKEL-IRON ALLOYS FOR SN-RICH SOLDER BUMPS OF PB-FREE FLIP-CHIP APPLICATIONS 有权
标题翻译：镍基合金的电阻耐受性低金属化，用于无铅自由切片应用的SN型多孔焊料
公开(公告)号：US20110156256A1
公开(公告)日：2011-06-30
申请号：US12647999
申请日：2009-12-28
申请人： Sung K. Kang , Paul A. Lauro , Minhua Lu , Da-Yuan Shih
发明人： Sung K. Kang , Paul A. Lauro , Minhua Lu , Da-Yuan Shih
IPC分类号： H01L23/485 , H01L21/768
CPC分类号： H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/81 , H01L2224/0401 , H01L2224/05147 , H01L2224/05562 , H01L2224/05564 , H01L2224/05655 , H01L2224/11849 , H01L2224/13111 , H01L2224/16503 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01021 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01041 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0109 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1461 , H01L2924/15787 , H01L2924/01026 , H01L2924/00014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： A process comprises manufacturing an electromigration-resistant under-bump metallization (UBM) flip chip structure comprising a Cu layer by applying to the Cu layer a metallic reaction barrier layer comprising NiFe. The solder employed in the flip chip structure comprise substantially lead-free tin. A structure comprises a product produced by this process. In another embodiment a process comprises manufacturing an electromigration-resistant UBM Sn-rich Pb-free solder bump flip chip structure wherein the electromigration-resistant UBM structure comprises a four-layer structure, or a three-layer structure, wherein the four layer structure is formed by providing 1) an adhesion layer, 2) a Cu seed layer for plating, 3) a reaction barrier layer, and 4) a wettable layer for joining to the solder, and the three-layer structure is formed by providing 1) an adhesion layer, 2) a reaction barrier layer, and 3) a wettable layer. In a further embodiment, the reaction barrier layer comprises metals selected from Ni, Fe, Pd, Pt, Co, Cu and their alloys, and combinations thereof. A structure comprises a product produced by the immediately foregoing process.
摘要翻译：一种方法包括通过向Cu层施加包含NiFe的金属反应阻挡层来制造包含Cu层的电迁移性凸块下金属化（UBM）倒装芯片结构。在倒装芯片结构中使用的焊料基本上包括无铅锡。一种结构包括通过该方法生产的产品。在另一个实施方案中，一种方法包括制造抗电镀UBM Sn的无铅焊料凸块倒装芯片结构，其中电迁移阻挡UBM结构包括四层结构或三层结构，其中四层结构是通过提供1）粘合层形成，2）用于电镀的Cu籽晶层，3）反应阻挡层，以及4）用于与焊料接合的可湿性层，并且通过提供1）一种粘合层，2）反应阻挡层，和3）可湿性层。在另一个实施方案中，反应阻挡层包含选自Ni，Fe，Pd，Pt，Co，Cu及其合金的金属及其组合。一种结构包括由上述方法生产的产品。

9. 发明授权

US07928585B2 Sprocket opening alignment process and apparatus for multilayer solder decal 失效
标题翻译：用于多层焊料贴花的链轮开口对准工艺和装置
公开(公告)号：US07928585B2
公开(公告)日：2011-04-19
申请号：US11869573
申请日：2007-10-09
申请人： Stephen L. Buchwalter , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
发明人： Stephen L. Buchwalter , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L23/488
CPC分类号： H01L24/11 , H01L24/13 , H01L24/742 , H01L2224/0401 , H01L2224/05571 , H01L2224/11003 , H01L2224/1111 , H01L2224/1131 , H01L2224/11849 , H01L2224/131 , H01L2924/0002 , H01L2924/14 , Y10T29/49149 , H01L2924/00012 , H01L2924/014 , H01L2224/05552
摘要： A process for aligning at least two layers in an abutting relationship with each other comprises forming a plurality of sprocket openings in each of the layers for receiving a sprocket of diminishing diameters as the sprocket extends outwardly from a base, with the center axes of the sprocket openings in each layer being substantially alignable with one another, the diameter of the sprocket openings in an abutting layer for first receiving the sprocket being greater than the diameter of the sprocket openings in an abutted layer. This is followed by forming a plurality of reservoir openings in each of at least two of the layers and positioning the sprocket openings in the layers to correspond with one another and the reservoir openings in the layers to correspond with one another so that substantial alignment of the center axes of the corresponding sprocket openings in the layers effects substantial alignment of the center axes of the corresponding reservoir openings in the layers. Engaging the sprocket openings with the sprocket by inserting the end of the sprocket having the smallest diameter into the sprocket openings having the largest diameter in the layers and continuing through to the sprocket opening having the smallest diameter in the layers effects substantial alignment of the center axes of the corresponding sprocket openings and substantial alignment of the center axes of the corresponding reservoir openings in the layers. The invention also comprises apparatus-for performing this process.
摘要翻译：用于将至少两个彼此邻接的层对准的方法包括在每个层中形成多个链轮开口，用于当链轮从基座向外延伸时接收链轮直径减小的链轮，链轮的中心轴线每个层中的开口基本上彼此对准，用于首先接收链轮的邻接层中的链轮开口的直径大于邻接层中链轮开口的直径。随后在至少两个层中的每一个中形成多个储存器开口，并且将链轮开口定位在层中以彼此对应并且层中的储存器开口彼此对应，使得层中对应的链轮开口的中心轴线对层中对应的储存器开口的中心轴进行实质上的对准。通过将具有最小直径的链轮的端部插入到具有最大直径的链轮的链轮开口中并且连续到具有最小直径的链轮开口，使链轮开口与链轮接合，使得中心轴线的对应的链轮开口和相应的储存器开口的中心轴线在层中的基本对准。本发明还包括用于执行该过程的装置。

10. 发明授权

US07923849B2 Interconnections for flip-chip using lead-free solders and having reaction barrier layers 有权
标题翻译：使用无铅焊料并具有反应阻挡层的倒装芯片的互连
公开(公告)号：US07923849B2
公开(公告)日：2011-04-12
申请号：US12113152
申请日：2008-04-30
申请人： Keith E. Fogel , Balaram Ghosal , Sung K. Kang , Stephen Kilpatrick , Paul A. Lauro , Henry A. Nye, III , Da-Yuan Shih , Donna S. Zupanski-Nielsen
发明人： Keith E. Fogel , Balaram Ghosal , Sung K. Kang , Stephen Kilpatrick , Paul A. Lauro , Henry A. Nye, III , Da-Yuan Shih , Donna S. Zupanski-Nielsen
IPC分类号： H01L21/00
CPC分类号： H01L24/05 , H01L24/03 , H01L24/11 , H01L24/12 , H01L2224/03912 , H01L2224/0401 , H01L2224/05 , H01L2224/1147 , H01L2224/11849 , H01L2224/119 , H01L2224/13023 , H01L2224/13099 , H01L2224/131 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01055 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/30107 , H01L2924/00014
摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.
摘要翻译：一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限球组合物，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

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