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1. 发明授权

US09218775B2 Display driving circuit, display device, and display driving method 有权
标题翻译：显示驱动电路，显示装置和显示驱动方法
公开(公告)号：US09218775B2
公开(公告)日：2015-12-22
申请号：US13501174
申请日：2010-06-04
申请人： Shige Furuta , Etsuo Yamamoto , Yuhichiroh Murakami , Seijirou Gyouten
发明人： Shige Furuta , Etsuo Yamamoto , Yuhichiroh Murakami , Seijirou Gyouten
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3614 , G09G3/3655 , G09G2310/0267
摘要： A display device employing CC driving switches from (i) a first mode in which to carry out a display by converting resolution of a video signal by a factor of 2 in a column-wise direction to (ii) a second mode in which to carry out a display at the resolution of the video signal. During the first mode, signal potentials having the same polarity and the same gray scale are supplied to pixel electrodes included in respective two pixels that correspond to two adjacent scanning signal lines and that are adjacent to each other in the column-wise direction, and a direction of change in the signal potentials written to the pixel electrodes varies every two adjacent rows (2-line inversion driving). During the second mode, the direction of change in the signal potentials written to the pixel electrodes lines varies every single row (1-line inversion driving).
摘要翻译：一种采用CC驱动开关的显示装置，其从（i）第一模式，其中通过将视频信号的分辨率在列方向上转换为因子2来执行显示，以（ii）携带的第二模式以视频信号的分辨率输出显示。在第一模式中，具有相同极性和相同灰度的信号电位被提供给包括在相应于两个相邻扫描信号线并且在列方向上彼此相邻的两个像素中的像素电极，并且写入像素电极的信号电位的变化方向每两个相邻行（2行反转驱动）变化。在第二模式中，写入像素电极线的信号电位的变化方向每一行变化（1行反转驱动）。

2. 发明授权

US09030237B2 Transistor circuit, flip-flop, signal processing circuit, driver circuit, and display device 有权
标题翻译：晶体管电路，触发器，信号处理电路，驱动电路和显示装置
公开(公告)号：US09030237B2
公开(公告)日：2015-05-12
申请号：US13818693
申请日：2011-09-01
申请人： Takuya Hachida , Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
发明人： Takuya Hachida , Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
IPC分类号： H03B1/00 , H03K3/00 , H03K17/687 , G09G3/36 , H03K19/017 , H01L27/12 , H03K3/356
CPC分类号： H03K17/687 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , H01L27/124 , H01L27/1255 , H03K3/356008 , H03K3/356026 , H03K19/01714
摘要： A transistor circuit includes at least one transistor, wherein at least part of a connecting portion that connects the transistor (Tr1) and a power supply line (33) is formed from a material of which a channel of the transistor (Tr1) is made. This configuration reduces a circuit area of the transistor circuit.
摘要翻译：晶体管电路包括至少一个晶体管，其中连接晶体管（Tr1）和电源线（33）的连接部分的至少一部分由形成晶体管（Tr1）的沟道的材料形成。该配置减小了晶体管电路的电路面积。

3. 发明授权

US08923472B2 Flip flop, shift register, driver circuit, and display device 有权
标题翻译：触发器，移位寄存器，驱动电路和显示设备
公开(公告)号：US08923472B2
公开(公告)日：2014-12-30
申请号：US13819046
申请日：2011-08-31
申请人： Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
发明人： Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
IPC分类号： G11C19/00 , H03K3/02 , G11C19/18 , G11C19/28 , G09G3/36
CPC分类号： H03K3/02 , G09G3/3677 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A flip-flop of the present invention includes: an input terminal; an output terminal; a first control signal terminal and a second control signal terminal; a first output section including a bootstrap capacitor, the first output section being connected to the first control signal terminal and the output terminal; a second output section connected to a first output section source and the output terminal; a first input section connected to the input terminal, the first input section charging the bootstrap capacitor; a discharge section discharging the bootstrap capacitor; a second input section connected to the input terminal, the second input section being also connected to the second output section; a reset section controlling the discharge section and the second output section, the reset section being connected to the second control signal terminal; a first initialization section controlling the first output section; a second initialization section controlling the first input section; and a third initialization section controlling the discharge section and the second output section. This makes it possible to realize a shift register capable of performing an all-ON operation regardless of clock signals.
摘要翻译：本发明的触发器包括：输入端子; 输出端子; 第一控制信号端和第二控制信号端; 第一输出部分，包括自举电容器，第一输出部分连接到第一控制信号端子和输出端子; 连接到第一输出部分源和输出端的第二输出部分; 连接到所述输入端子的第一输入部分，所述第一输入部分对所述自举电容器充电; 放电部，使自举电容器放电; 连接到所述输入端子的第二输入部分，所述第二输入部分也连接到所述第二输出部分; 控制所述放电部和所述第二输出部的复位部，所述复位部与所述第二控制信号端子连接; 控制所述第一输出部的第一初始化部; 控制所述第一输入部的第二初始化部; 以及控制排出部和第二输出部的第三初始化部。这使得可以实现无论时钟信号如何执行全导通操作的移位寄存器。

4. 发明申请

US20130155044A1 SHIFT REGISTER, AND DISPLAY DEVICE 有权
标题翻译：移位寄存器和显示设备
公开(公告)号：US20130155044A1
公开(公告)日：2013-06-20
申请号：US13818462
申请日：2011-08-30
申请人： Hiroyuki Ohkawa , Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
发明人： Hiroyuki Ohkawa , Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
IPC分类号： G11C19/28
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/0286
摘要： A unit circuit (11) includes: a transistor (T2) having its drain terminal to be supplied with a clock signal (CK) and its source terminal connected to an output terminal (OUT); a transistor (T9) which, when supplied with an active all-on control signal (AON), outputs an ON voltage to the output terminal (OUT), and which, when supplied with a nonactive all-on control signal (AONB), stops outputting the ON voltage; a transistor (T1) which supplies the ON voltage to a control terminal of the transistor (T2) in accordance with an input signal (IN); a transistor (T4) which, when supplied with the active all-on control signal (AON), supplies an OFF voltage to a control terminal of the transistor (T2). This makes it possible to provide a shift register of a simple structure that can prevent a malfunction from occurring after all-on operation, and to provide a display device.
摘要翻译：单元电路（11）包括：晶体管（T2），其漏极端子被提供有时钟信号（CK），其源极端子连接到输出端子（OUT）; 当提供有源全通控制信号（AON）时，将晶体管（T9）输出到输出端（OUT）的导通电压，并且当被提供有非活动全通控制信号（AONB）时，停止输出ON电压; 晶体管（T1），其根据输入信号（IN）将导通电压提供给晶体管（T2）的控制端子; 当提供有源全通控制信号（AON）时，晶体管（T4）向晶体管（T2）的控制端提供OFF电压。这使得可以提供能够防止在全部操作之后发生故障的简单结构的移位寄存器，并且提供显示装置。

5. 发明申请

US20130147524A1 TRANSISTOR CIRCUIT, FLIP-FLOP, SIGNAL PROCESSING CIRCUIT, DRIVER CIRCUIT, AND DISPLAY DEVICE 有权
标题翻译：晶体管电路，FLOP-FLOP，信号处理电路，驱动电路和显示装置
公开(公告)号：US20130147524A1
公开(公告)日：2013-06-13
申请号：US13818693
申请日：2011-09-01
申请人： Takuya Hachida , Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
发明人： Takuya Hachida , Yasushi Sasaki , Yuhichiroh Murakami , Etsuo Yamamoto
IPC分类号： H03K17/687
CPC分类号： H03K17/687 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , H01L27/124 , H01L27/1255 , H03K3/356008 , H03K3/356026 , H03K19/01714
摘要： A transistor circuit includes at least one transistor, wherein at least part of a connecting portion that connects the transistor (Tr1) and a power supply line (33) is formed from a material of which a channel of the transistor (Tr1) is made. This configuration reduces a circuit area of the transistor circuit.
摘要翻译：晶体管电路包括至少一个晶体管，其中连接晶体管（Tr1）和电源线（33）的连接部分的至少一部分由形成晶体管（Tr1）的沟道的材料形成。该配置减小了晶体管电路的电路面积。

6. 发明授权

US08427206B2 Buffer and display device 有权
标题翻译：缓冲和显示设备
公开(公告)号：US08427206B2
公开(公告)日：2013-04-23
申请号：US12734691
申请日：2008-08-19
申请人： Etsuo Yamamoto , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten , Shinsaku Shimizu
发明人： Etsuo Yamamoto , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten , Shinsaku Shimizu
IPC分类号： H03K3/00
CPC分类号： G09G3/3677 , G09G2310/0291 , G09G2330/021 , H03K19/0013 , H03K19/01714 , H03K19/018507 , H03K19/09441
摘要： A single-phase input including transistors all of which have only a single type of channel polarity, which buffer includes: a buffer section 32, including a first series circuit formed by two n-channel transistors connected to each other in series, a second series circuit formed by two n-channel transistors connected to each other in series at a connection point OUT, and a capacitor; and an inverted-signal generating section for generating an inverted-signal from an input signal, the inverted-signal generating section including n-channel transistors but no p-channel transistor, the input signal being inputted to respective gates of the transistors, the inverted-signal being inputted to a gate of the transistor 4, and an output signal being outputted via the connection point OUT. With the buffer, it is possible that a consumption current be reduced and a current drive for a load is enhanced.
摘要翻译：包括晶体管的单相输入，所述晶体管仅具有单一类型的沟道极性，该缓冲器包括：缓冲器部分32，包括由串联连接的两个n沟道晶体管构成的第一串联电路，第二系列由在连接点OUT处彼此串联连接的两个n沟道晶体管形成的电路，以及电容器; 以及反相信号生成部，用于从输入信号产生反相信号，所述反相信号生成部包括n沟道晶体管，但不包括p沟道晶体管，所述输入信号被输入到所述晶体管的各个栅极，所述反相信号生成部信号被输入到晶体管4的栅极，并且输出信号经由连接点OUT输出。使用缓冲器，可以减少消耗电流并且增加用于负载的电流驱动。

7. 发明授权

US08398007B2 Jet mill 有权
标题翻译：喷射磨
公开(公告)号：US08398007B2
公开(公告)日：2013-03-19
申请号：US13317414
申请日：2011-10-18
申请人： Kenzo Ito , Masahiro Yamamoto , Etsuo Yamamoto
发明人： Kenzo Ito , Masahiro Yamamoto , Etsuo Yamamoto
IPC分类号： B02C19/06
CPC分类号： B02C19/061
摘要： A jet mill in which crushed material introduced into a crushing chamber is comminuted by gas being sprayed from a plurality of gas-jet nozzles, wherein high-efficiency pulverization is performed by optimizing various pulverization conditions according to the type of crushed material or other such properties. The direction in which gas is sprayed into the crushing chamber is variable adjustable; the spraying direction of each nozzle is displaced simultaneously by the electromotive actuator; swirl flow is produced in three dimensions, including the flow of a directional component that is perpendicular to the horizontal swirl flow; and a fine-powder discharge port of a first pulverization chamber and a fine powder introduction port of a second pulverization chamber are communicatingly connected by a ventilation duct.
摘要翻译：一种喷射式粉碎机，其中引入破碎室的粉碎材料被从多个气体喷嘴喷射的气体粉碎，其中通过根据粉碎材料的类型或其他这些性质优化各种粉碎条件来进行高效粉碎。气体喷入破碎室的方向是可变的; 每个喷嘴的喷射方向由电动致动器同时移动; 漩涡流在三个维度上产生，包括垂直于水平涡流的方向分量的流动; 并且第一粉碎室的细粉末排出口和第二粉碎室的细粉末导入口通过通风管连通。

8. 发明授权

US07701426B2 Display device and method of driving the same 有权
标题翻译：显示装置及其驱动方法
公开(公告)号：US07701426B2
公开(公告)日：2010-04-20
申请号：US10941082
申请日：2004-09-15
申请人： Makoto Yokoyama , Hajime Washio , Yuhichiroh Murakami , Etsuo Yamamoto
发明人： Makoto Yokoyama , Hajime Washio , Yuhichiroh Murakami , Etsuo Yamamoto
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G2310/0251 , G09G2310/0297 , G09G2320/0219
摘要： In each horizontal period, by switching ON switches respectively provided for three data signal lines for R, G and B in a group at the same time only in a predetermined period, the data signal lines in the group are preliminary charged to a predetermined potential at the same time before a data signal supply period. In a subsequent data signal supply period, respective switches of data signal lines for R, G and B are switched ON sequentially, to sequentially supply respective data for R, G and B to pixels on a scanning signal line as selected are supplied via data signal lines. As a result, in a display device driven by time-division based on a group of sequentially provided data signal lines, it is possible to suppress up-throw potential fluctuations when display.
摘要翻译：在每个水平周期中，通过仅在预定周期内同时分别为组中的R，G和B的三条数据信号线分别设置ON开关，将组中的数据信号线预先充电至预定电位在数据信号提供期之前的同一时间。在随后的数据信号供给周期中，对于R，G，B的数据信号线的各自的开关顺序地接通，顺序地向R，G，B的各个数据提供经选择的扫描信号线上的像素，经由数据信号线条。结果，在基于一组顺序提供的数据信号线的时分驱动的显示装置中，可以抑制显示时的上投电位波动。

9. 发明授权

US06280642B1 Ink jet head and method of manufacturing same 失效
标题翻译：喷墨头及其制造方法
公开(公告)号：US06280642B1
公开(公告)日：2001-08-28
申请号：US09051267
申请日：1998-04-07
申请人： Tomoo Ikeda , Etsuo Yamamoto , Yoshimasa Shirai
发明人： Tomoo Ikeda , Etsuo Yamamoto , Yoshimasa Shirai
IPC分类号： G11B5127
CPC分类号： B41J2/14201 , B41J2/1607 , B41J2/1625 , B41J2/1629 , B41J2/1631 , B41J2/1637 , B41J2/1645
摘要： An ink jet print head suitable for high-density printing. The ink jet print head comprises a plurality of nozzles for ejecting an ink, ink chambers, for passage and pressurization of the ink, communicating with the nozzles, and pressurizing means for creating a change in volume of the ink in the ink chamber to eject the ink through the nozzles. The ink chamber comprises a base plate member comprised of a transparent substrate having a predetermined form and dimension, a base wall member made of a material impermeable to light, the base wall member being provided above the base plate member in a pattern form according to the form of the ink chamber, and a partitioning member provided, above the base plate member, in areas not occupied by the base wall member. The partitioning member is formed from a partitioning member-forming, photosensitive material by photolithography using the base wall member pattern as a mask. A process of producing the above ink jet head is also disclosed.
摘要翻译：适用于高密度印刷的喷墨打印头。喷墨打印头包括用于喷射墨水的多个喷嘴，用于墨水的通过和加压的墨水室，与喷嘴连通的加压装置，以及用于产生墨水室中的墨水的体积变化的喷墨墨水通过喷嘴。墨水室包括由具有预定形状和尺寸的透明基板构成的基板构件，由不透光材料制成的底壁构件，底壁构件以根据该图案形式的图案形式设置在基板构件的上方墨水室的形式，以及设置在基板部件的上方的未被基壁部件占据的区域的分隔部件。分隔构件通过使用基壁构件图案作为掩模的光刻法由形成分隔构件的感光材料形成。还公开了制造上述喷墨头的方法。

10. 发明授权

US08779809B2 Signal processing circuit, inverter circuit, buffer circuit, level shifter, flip-flop, driver circuit, and display device 有权
标题翻译：信号处理电路，逆变电路，缓冲电路，电平转换器，触发器，驱动电路和显示装置
公开(公告)号：US08779809B2
公开(公告)日：2014-07-15
申请号：US13819400
申请日：2011-08-31
申请人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： H03K3/00
CPC分类号： H02J4/00 , H03K3/356008 , H03K3/356026 , H03K19/01714 , H03K19/01735 , Y10T307/50
摘要： A signal processing circuit of the present invention includes: first and second input terminals; an output terminal; a bootstrap capacitor; a first output section connected to the second input terminal and the output terminal; a second output section connected to the first input terminal, a first power source, and the output terminal; and an electric charge control section for controlling the electric charge of the bootstrap capacitor, the electric charge control section being connected to the first input terminal, the electric charge control section and the first output section being connected to each other via a relay section for either electrically connecting the electric charge control section and the first output section to each other or electrically blocking the electric charge control section and the first output section from each other, the electric charge control section including a resistor connected to a second power source. This configuration can increase reliability of a bootstrap-type signal processing circuit.
摘要翻译：本发明的信号处理电路包括：第一和第二输入端; 输出端子; 自举电容器; 与第二输入端子和输出端子连接的第一输出部分; 连接到第一输入端子的第二输出部分，第一电源和输出端子; 以及用于控制自举电容器的电荷的电荷控制部分，所述电荷控制部分连接到所述第一输入端子，所述电荷控制部分和所述第一输出部分经由继电器部分彼此连接，用于任一将电荷控制部和第一输出部彼此电连接，或者将电荷控制部和第一输出部彼此电阻塞，电荷控制部包括与第二电源连接的电阻。该配置可以增加自举式信号处理电路的可靠性。

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