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1. 发明授权

US6025742A Low voltage differential swing driver circuit 失效
标题翻译：低电压差动摆幅驱动电路
公开(公告)号：US6025742A
公开(公告)日：2000-02-15
申请号：US1989
申请日：1997-12-31
申请人： Francis H. Chan
发明人： Francis H. Chan
IPC分类号： H03F3/18 , H03F3/45
CPC分类号： H04L25/0272 , H03K19/018528
摘要： A low voltage differential swing driver circuit comprises first and second serially connected field effect transistors connected in series through first and second resistors. Third and fourth field effect transistors are serially connected together through third and fourth resistors. A diode connects one side of each of the serially connected transistors to one side of a source of regulated low voltage. A remaining side of the regulated low voltage source is connected to a remaining side of the serially connected transistors whereby differential currents are produced through the pairs of transistors. A voltage bias source is connected to a junction of said first and second resistors and to the junction of said third and fourth resistors. Control logic supplies a data switching signal to a gate of the first and fourth transistors, and a complementary data switching signal to a gate of said second and third transistors. A differential signal is produced between said junctions which are connected to first and second transmission lines.
摘要翻译：低电压差动摆幅驱动器电路包括通过第一和第二电阻器串联连接的第一和第二串联的场效应晶体管。第三和第四场效应晶体管通过第三和第四电阻器串联连接在一起。二极管将串联连接的每个晶体管的一侧连接到调节低电压源的一侧。调节低压源的剩余侧连接到串联连接的晶体管的剩余侧，由此通过晶体管对产生差分电流。电压偏置源连接到所述第一和第二电阻器的连接点以及所述第三和第四电阻器的结点。控制逻辑将数据切换信号提供给第一和第四晶体管的栅极，并将互补数据切换信号提供给所述第二和第三晶体管的栅极。在连接到第一和第二传输线的所述连接点之间产生差分信号。

2. 发明授权

US5969554A Multi-function pre-driver circuit with slew rate control, tri-state operation, and level-shifting 失效
标题翻译：具有压摆率控制，三态运算和电平转换功能的多功能预驱动电路
公开(公告)号：US5969554A
公开(公告)日：1999-10-19
申请号：US871743
申请日：1997-06-09
申请人： Francis H. Chan , Douglas Willard Stout
发明人： Francis H. Chan , Douglas Willard Stout
IPC分类号： H03K19/003 , H03K19/0185 , H03K19/094 , H03K5/12 , H03K17/16 , H03L5/00
CPC分类号： H03K19/09429 , H03K19/00361 , H03K19/018521
摘要： A pre-driver circuit in an I/O circuit for an integrated circuit performs the combined functions of voltage level shifting, slew rate control, and tri-state capability, in a single circuit to avoid additional delay caused by implementing any combination of these functions in two or more circuits.
摘要翻译：用于集成电路的I / O电路中的预驱动电路在单个电路中执行电压电平转换，转换速率控制和三态能力的组合功能，以避免由于实现这些功能的任何组合而导致的额外延迟在两个或多个电路中。

3. 发明授权

US5719509A Method of controlling transmission of binary pulses on a transmission line 失效
标题翻译：控制传输线二进制脉冲传输的方法
公开(公告)号：US5719509A
公开(公告)日：1998-02-17
申请号：US461483
申请日：1995-06-05
申请人： Francis H. Chan
发明人： Francis H. Chan
IPC分类号： H03K17/16 , H03K17/687 , H03K19/003 , H03K19/017 , H03K19/0175 , H03K19/0944 , H03K3/00
CPC分类号： H03K17/167 , H03K19/00361
摘要： A push-pull output driver includes a pair of auxiliary, low current capacity output circuits connected in parallel with a pair of high current capacity, series connected devices. In response to a pulse transition at the input of the driver circuit, one of the high current capacity devices is turned on to provide the current necessary for a change in state of the output signal. After the output signal has reached a steady state level, the associated auxiliary low current capacity device is turned on and the high current capacity device is turned off. For the remainder of the duration of the pulse, the relatively low current required to maintain the output signal is provided by the auxiliary gate. At the next pulse transition, the other of the high current capacity gates is turned on. Since the first high current capacity gate was turned off prior to the pulse transition, only one of the high current capacity devices is drawing current from the supply and the need for a large current supply is eliminated. The circuit of the invention allows for the design of very high speed drivers and the totem pole currents which are the source of Delta-I noise do not occur. The driver includes a pulse circuit responsive to voltage levels of the driver output terminals to selectively turn off the primary, high current carrying capacity gates and to selectively turn on and off the auxiliary gates.
摘要翻译：推挽输出驱动器包括一对与一对高电流容量串联连接的并联连接的辅助低电流容量输出电路。响应于驱动器电路的输入处的脉冲转变，高电流容量器件中的一个导通以提供输出信号的状态改变所必需的电流。输出信号达到稳定状态后，相关的辅助低电流容量器件导通，高电流容量器件关闭。对于脉冲持续时间的剩余时间，维持输出信号所需的相对低的电流由辅助栅极提供。在下一个脉冲转换时，另一个高电流容量门被打开。由于第一高电流容量栅极在脉冲转变之前被关断，所以只有一个高电流容量器件从电源中抽出电流，并且消除了对大电流源的需要。本发明的电路允许设计非常高速的驱动器，并且不会发生作为Delta-I噪声源的图腾柱电流。驱动器包括响应于驱动器输出端子的电压电平的脉冲电路，以选择性地关闭初级，高电流承载容量门并选择性地打开和关闭辅助门。

4. 发明授权

US5486782A Transmission line output driver 失效
标题翻译：传输线路输出驱动
公开(公告)号：US5486782A
公开(公告)日：1996-01-23
申请号：US312731
申请日：1994-09-27
申请人： Francis H. Chan
发明人： Francis H. Chan
IPC分类号： H03K17/16 , H03K17/687 , H03K19/003 , H03K19/017 , H03K19/0175 , H03K19/0944 , H03K3/00
CPC分类号： H03K17/167 , H03K19/00361
摘要： A push-pull output driver includes a pair of auxiliary, low current capacity output circuits connected in parallel with a pair of high current capacity, series connected devices. In response to a pulse transition at the input of the driver circuit, one of the high current capacity devices is turned on to provide the current necessary for a change in state of the output signal. After the output signal has reached a steady state level, the associated auxiliary low current capacity device is turned on and the high current capacity device is turned off. For the remainder of the duration of the pulse, the relatively low current required to maintain the output signal is provided by the auxiliary gate. At the next pulse transition, the other of the high current capacity gates is turned on. Since the first high current capacity gate was turned off prior to the pulse transition, only one of the high current capacity devices is drawing current from the supply and the need for a large current supply is eliminated. The circuit of the invention allows for the design of very high speed drivers and the totem pole currents which are the source of Delta-I noise do not occur. The driver includes a pulse circuit responsive to voltage levels of the driver output terminals to selectively turn off the primary, high current carrying capacity gates and to selectively turn on and off the auxiliary gates.
摘要翻译：推挽输出驱动器包括一对与一对高电流容量串联连接的并联连接的辅助低电流容量输出电路。响应于驱动器电路的输入处的脉冲转变，高电流容量器件中的一个导通以提供输出信号的状态改变所必需的电流。输出信号达到稳定状态后，相关的辅助低电流容量器件导通，高电流容量器件关闭。对于脉冲持续时间的剩余时间，维持输出信号所需的相对低的电流由辅助栅极提供。在下一个脉冲转换时，另一个高电流容量门被打开。由于第一高电流容量栅极在脉冲转变之前被关断，所以只有一个高电流容量器件从电源中抽出电流，并且消除了对大电流源的需要。本发明的电路允许设计非常高速的驱动器，并且不会发生作为Delta-I噪声源的图腾柱电流。驱动器包括响应于驱动器输出端子的电压电平的脉冲电路，以选择性地关闭初级，高电流承载容量门并选择性地打开和关闭辅助门。

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