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1. 发明申请

US20080188994A1 FAN SPEED CONTROL FROM ADAPTIVE VOLTAGE SUPPLY 失效
标题翻译：风扇自适应电压调节
公开(公告)号：US20080188994A1
公开(公告)日：2008-08-07
申请号：US11671555
申请日：2007-02-06
申请人： Deepak K. Singh , Francois Ibrahim Atallah , David Howard Allen
发明人： Deepak K. Singh , Francois Ibrahim Atallah , David Howard Allen
IPC分类号： G05D23/19 , F04B49/20
CPC分类号： F04D27/004
摘要： Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.
摘要翻译：测量电路元件包括在制造在半导体衬底上的集成电路中。提供了一种用于控制设置用于冷却集成电路的冷却风扇的速度的方法，其中包括从热二极管接收电压的步骤，通过将每个时钟周期的每个时钟周期的表项的地址递增电路时钟，将寻址的数据转换为表示温度的第二电压，将第一电压与第二电压进行比较，当第一和第二电压都相等时提供所得到的温度，并相应地调整风扇速度。

2. 发明申请

US20080186082A1 Digital Adaptive Voltage Supply 失效
标题翻译：数字自适应电源
公开(公告)号：US20080186082A1
公开(公告)日：2008-08-07
申请号：US11671531
申请日：2007-02-06
申请人： Deepak K Singh , Francois Ibrahim Atallah , David John Seman
发明人： Deepak K Singh , Francois Ibrahim Atallah , David John Seman
IPC分类号： G05F3/02
CPC分类号： H03K19/00384
摘要： Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. These measurement circuits include registers that are connected to a voltage regulation circuit that provides the integrated circuit voltage source and to a power management circuit. These measurement circuits provide signals to control the voltage regulation circuit for adjusting the voltage output to the integrated circuit based upon a measurement values obtained on the semiconductor device. These measurements include temperature, IR drop at locations on the semiconductor substrate, along with the frequency response of integrated circuit.
摘要翻译：测量电路元件包括在制造在半导体衬底上的集成电路中。这些测量电路包括连接到提供集成电路电压源和电源管理电路的电压调节电路的寄存器。这些测量电路提供信号以控制电压调节电路，用于基于在半导体器件上获得的测量值来调节输出到集成电路的电压。这些测量包括半导体衬底上的位置处的温度，IR下降以及集成电路的频率响应。

3. 发明授权

US06798858B1 Lock detector for delay or phase locked loops 失效
标题翻译：锁定检测器用于延迟或锁相环
公开(公告)号：US06798858B1
公开(公告)日：2004-09-28
申请号：US09497962
申请日：2000-02-04
申请人： Francois Ibrahim Atallah , David John Seman
发明人： Francois Ibrahim Atallah , David John Seman
IPC分类号： H03D324
CPC分类号： H03L7/085 , H03L7/087 , H03L7/095 , H03L7/10
摘要： The present invention discloses a lock indicator circuit used to indicate a phase lock condition between logic signals. The lock indicator circuit uses a phase detector that generates a pulse width proportional to the phase difference between a reference signal and a feedback signal. Another circuit generates, on each positive edge of the reference and the feedback signals, pulses whose widths are primarily dependent on fixed delay elements. These fixed pulse determine a window in which the pulse from the phase detector will fall as the two signals approach phase lock. Phase lock is signaled by the logic AND of the window pulse and the phase detector pulse. Other circuitry generates a phase lock indication signal if the phase lock signal remains true for a number of consecutive transitions of the reference signal. Likewise a phase unlock indication signal is generated if after phase lock indication, phase unlock occurs and remains for a number of consecutive transitions of the reference signal.
摘要翻译：本发明公开了一种用于指示逻辑信号之间的锁相状态的锁定指示器电路。锁定指示器电路使用产生与参考信号和反馈信号之间的相位差成比例的脉冲宽度的相位检测器。另一个电路在参考的每个正边沿和反馈信号上产生其宽度主要取决于固定延迟元件的脉冲。这些固定脉冲决定了一个窗口，其中来自相位检测器的脉冲将随着两个信号接近相位锁定而下降。相位锁定由窗口脉冲和相位检测器脉冲的逻辑“和”发出信号。如果参考信号的多次连续转换的锁相信号保持为真，则其它电路产生锁相指示信号。同样地，如果在相位锁定指示，相位解锁发生之后产生相位解锁指示信号，并且在参考信号的多个连续转换中保持相位解锁指示信号。

4. 发明授权

US08615767B2 Using IR drop data for instruction thread direction 有权
标题翻译：使用IR drop数据指示线程方向
公开(公告)号：US08615767B2
公开(公告)日：2013-12-24
申请号：US11671613
申请日：2007-02-06
申请人： Deepak K. Singh , Francois Ibrahim Atallah
发明人： Deepak K. Singh , Francois Ibrahim Atallah
IPC分类号： G06F9/46
CPC分类号： G06F9/3851 , G06F1/3203 , G06F1/3243 , Y02D10/152
摘要： A data processing system having a memory for storing instructions and several central processing units for executing instructions, each central processing unit including an adaptive power supply which provides, among other data, IR (voltage) drop information. Circuitry is provided that receives the IR drop information from the many central processing units, selects a central processing unit which has the lowest IR drop and which is available to execute instructions and dispatches instructions to the selected central processing unit from the memory.
摘要翻译：一种具有用于存储指令的存储器和用于执行指令的几个中央处理单元的数据处理系统，每个中央处理单元包括自适应电源，其提供IR（电压）丢弃信息等。提供了从许多中央处理单元接收IR丢弃信息的电路，选择具有最低IR丢弃的中央处理单元，并且可用于执行指令并从存储器向所选择的中央处理单元发送指令。

5. 发明授权

US07797131B2 On-chip frequency response measurement 失效
标题翻译：片上频率响应测量
公开(公告)号：US07797131B2
公开(公告)日：2010-09-14
申请号：US11844393
申请日：2007-08-24
申请人： Deepak K. Singh , Francois Ibrahim Atallah , David John Seman
发明人： Deepak K. Singh , Francois Ibrahim Atallah , David John Seman
IPC分类号： G06F19/00 , G06F17/40
CPC分类号： G01R31/31708 , G01R31/31725
摘要： A method and circuit are provided for measuring frequency response performance of an integrated circuit by providing a pulse having a rising edge and a falling edge where the pulse is provided to a plurality of serially connected components. The number of these components which have propagated the leading edge of the pulse before the occurrence of the falling edge provide a numeric indication of the circuit's frequency response and performance.
摘要翻译：提供了一种用于通过提供具有上升沿和下降沿的脉冲来测量集成电路的频率响应性能的方法和电路，其中脉冲被提供给多个串联连接的部件。在发生下降沿之前传播脉冲前沿的这些部件的数量提供了电路的频率响应和性能的数字指示。

6. 发明申请

US20090055122A1 On-Chip Frequency Response Measurement 失效
标题翻译：片内频率响应测量
公开(公告)号：US20090055122A1
公开(公告)日：2009-02-26
申请号：US11844393
申请日：2007-08-24
申请人： Deepak K. Singh , Francois Ibrahim Atallah , David John Seman
发明人： Deepak K. Singh , Francois Ibrahim Atallah , David John Seman
IPC分类号： G01R31/317
CPC分类号： G01R31/31708 , G01R31/31725
摘要： A method and circuit are provided for measuring frequency response performance of an integrated circuit by providing a pulse having a rising edge and a falling edge where the pulse is provided to a plurality of serially connected components. The number of these components which have propagated the leading edge of the pulse before the occurrence of the falling edge provide a numeric indication of the circuit's frequency response and performance.
摘要翻译：提供了一种用于通过提供具有上升沿和下降沿的脉冲来测量集成电路的频率响应性能的方法和电路，其中脉冲被提供给多个串联连接的部件。在发生下降沿之前传播脉冲前沿的这些部件的数量提供了电路的频率响应和性能的数字指示。

7. 发明申请

US20080189520A1 USING PERFORMANCE DATA FOR INSTRUCTION THREAD DIRECTION 失效
标题翻译：使用性能数据指导螺纹方向
公开(公告)号：US20080189520A1
公开(公告)日：2008-08-07
申请号：US11671627
申请日：2007-02-06
申请人： Deepak K. Singh , Francois Ibrahim Atallah
发明人： Deepak K. Singh , Francois Ibrahim Atallah
IPC分类号： G06F9/30
CPC分类号： G06F9/3851
摘要： A method for dispatching instructions in the data processing system, having in memory for storing instructions and a plurality of central processing units, where each central processing unit includes a circuit to provide data indicating internal performance, the method having steps of receiving internal performance data signals from a pool of central processing units, selecting a central processing unit according to the received internal performance data and dispatching instructions from the memory to the selected central processing unit.
摘要翻译：一种用于在数据处理系统中调度指令的方法，具有用于存储指令的存储器和多个中央处理单元，其中每个中央处理单元包括提供指示内部性能的数据的电路，所述方法具有接收内部性能数据信号从中央处理单元池中选择中央处理单元，根据接收到的内部性能数据和从存储器向所选择的中央处理单元发送调度指令。

8. 发明授权

US06441600B1 Apparatus for measuring the duty cycle of a high speed clocking signal 失效
标题翻译：用于测量高速时钟信号占空比的装置
公开(公告)号：US06441600B1
公开(公告)日：2002-08-27
申请号：US09766200
申请日：2001-01-19
申请人： Francois Ibrahim Atallah , Anthony Correale, Jr.
发明人： Francois Ibrahim Atallah , Anthony Correale, Jr.
IPC分类号： G01R1900
CPC分类号： G01R31/2882
摘要： A system and method for accurately measuring the duty cycle of an input periodic pulsed signal. The system includes a device for converting the input signal to be measured into a first dc voltage and, a device maintaining representations of potential duty cycle values that are selectable in an iterative fashion. At each iteration, in response to a selected duty cycle value, a second dc voltage is generated that represents the difference between the duty cycle of the input signal to be measured and the duty cycle represented by a current selected encoded duty cycle value. A selection mechanism responds to the first and second dc voltages for selecting a different encoded duty cycle for a successive iteration. The system selects an encoded duty cycle value at each iteration until the first and second dc voltages match. At such time, the current selected encoded duty cycle value represents the duty cycle of the input voltage for output thereof. By representing the input signal's duty cycle as a dc voltage, the system may measure the input signal's duty cycle accurately regardless of its frequency.
摘要翻译：一种用于精确测量输入周期性脉冲信号占空比的系统和方法。该系统包括用于将待测量的输入信号转换为第一直流电压的装置，以及维持以迭代方式选择的潜在占空比值的表示的装置。在每次迭代中，响应于所选择的占空比值，产生表示要测量的输入信号的占空比与由当前选择的编码占空比值表示的占空比之间的差的第二直流电压。选择机构响应第一和第二直流电压以选择用于连续迭代的不同的编码占空比。系统在每次迭代时选择编码的占空比值，直到第一和第二直流电压相匹配。此时，当前选择的编码占空比值表示用于其输出的输入电压的占空比。通过将输入信号的占空比表示为直流电压，系统可以准确地测量输入信号的占空比，而不管其频率如何。

9. 发明授权

US06330296B1 Delay-locked loop which includes a monitor to allow for proper alignment of signals 失效
标题翻译：延迟锁定环路，其包括监视器以允许信号的正确对准
公开(公告)号：US06330296B1
公开(公告)日：2001-12-11
申请号：US09097130
申请日：1998-06-12
申请人： Francois Ibrahim Atallah , George Diniz , James Norris Dieffenderfer , David John Seman
发明人： Francois Ibrahim Atallah , George Diniz , James Norris Dieffenderfer , David John Seman
IPC分类号： H03D324
CPC分类号： H03L7/0812 , H03L7/0891 , H03L7/10
摘要： The present invention provides a delay-locked loop (DLL). The DLL comprises a phase-frequency detector (PFD) for receiving a reference signal. The DLL further includes a charge pump which is coupled to the PFD. The DLL also includes a loop filter which is coupled to the charge pump and the PFD. Additionally in the DLL, delay line means is coupled to the charge pump and the loop filter. The delay line means provides a feedback signal to the PFD. The DLL further includes monitor means coupled to the PFD, the charge pump and the loop filter. The monitor means is for detecting when a voltage across the loop filter is at a predetermined level, wherein when the voltage is at the predetermined level the monitor means causes the PFD to enter a pump-down mode until the feedback signal is aligned with the reference signal. An advantage of the present invention is that DLL loop tracking failures based upon a stuck condition are reliably avoided. Specifically, the DLL in accordance with the present invention can reliably recover from the stuck condition in which the adjustable delay is at its lower limit and the PFD asserts the UP control signal. Additionally, the DLL is cost effective and is easily implemented utilizing existing processes.
摘要翻译：本发明提供一种延迟锁定环（DLL）。该DLL包括用于接收参考信号的相位频率检测器（PFD）。该DLL还包括耦合到PFD的电荷泵。 DLL还包括耦合到电荷泵和PFD的环路滤波器。另外在DLL中，延迟线装置耦合到电荷泵和环路滤波器。延迟线装置向PFD提供反馈信号。 DLL还包括耦合到PFD的监视器装置，电荷泵和环路滤波器。监视器装置用于检测环路滤波器两端的电压何时处于预定电平，其中当电压处于预定电平时，监视装置使PFD进入降压模式，直到反馈信号与参考电压对齐信号。本发明的优点是可靠地避免了基于卡住状态的DLL循环跟踪故障。具体地说，根据本发明的DLL可以可靠地从可调延迟处于其下限的停滞状态恢复，PFD断言UP控制信号。此外，DLL是具有成本效益的，并且可以利用现有的过程容易地实现。

10. 发明授权

US08515590B2 Fan speed control from adaptive voltage supply 失效
标题翻译：风扇速度控制自适应电源
公开(公告)号：US08515590B2
公开(公告)日：2013-08-20
申请号：US13448525
申请日：2012-04-17
申请人： Deepak K. Singh , Francois Ibrahim Atallah , David Howard Allen
发明人： Deepak K. Singh , Francois Ibrahim Atallah , David Howard Allen
IPC分类号： G05D23/00
CPC分类号： F04D27/004
摘要： Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.
摘要翻译：测量电路元件包括在制造在半导体衬底上的集成电路中。提供了一种用于控制设置用于冷却集成电路的冷却风扇的速度的方法，其中包括从热二极管接收电压的步骤，通过将每个时钟周期的每个时钟周期的表项的地址递增电路时钟，将寻址的数据转换为表示温度的第二电压，将第一电压与第二电压进行比较，当第一和第二电压都相等时提供所得到的温度，并相应地调整风扇速度。

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