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    • 6. 发明授权
    • Thin film magnetic memory device suitable for drive by battery
    • 适用于电池驱动的薄膜磁存储器件
    • US07616476B2
    • 2009-11-10
    • US11882577
    • 2007-08-02
    • Hideto Hidaka
    • Hideto Hidaka
    • G11C11/00
    • G11C11/16
    • After a digit line is charged to a power supply voltage by turn-on of a first switching element, the first switching element is turned off and a second switching element is turned on, whereby the digit line is connected to a ground voltage. Similarly, in order to feed data write current, a bit line is charged to a data voltage in accordance with write data through a third switching element. Then, the bit line is connected to a voltage different from the data voltage by a fourth switching element while the third switching element is turned off. Therefore, a load current from a power supply to an MRAM device is supplied during charging of a digit line capacitance and a bit line capacitance, without being consumed when the data write current flows. Consequently, a peak of the load current supplied from the power supply is suppressed.
    • 在通过第一开关元件的接通将数字线充电到电源电压之后,第一开关元件被断开并且第二开关元件导通,从而数字线连接到接地电压。 类似地,为了馈送数据写入电流,根据通过第三开关元件的写入数据将位线充电到数据电压。 然后,第三开关元件断开时,位线被第四开关元件连接到与数据电压不同的电压。 因此,在数字线电容和位线电容的充电期间,从电源到MRAM器件的负载电流被提供,而不会在数据写入电流流动时被消耗。 因此,抑制了从电源供给的负载电流的峰值。
    • 7. 发明申请
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE OPERATING WITH LOW POWER CONSUMPTION
    • 具有低功耗的半导体集成电路设备
    • US20090179692A1
    • 2009-07-16
    • US12403830
    • 2009-03-13
    • Hideto HIDAKA
    • Hideto HIDAKA
    • G05F1/10
    • H03K19/0016
    • Transistors having large gate tunnel barriers are used as transistors to be on in a standby state, MIS transistors having thin gate insulating films are used as transistors to be off in the standby state, and main and sub-power supply lines and main and sub-ground lines forming a hierarchical power supply structure are isolated from each other in the standby state so that a gate tunnel current is reduced in the standby state in which a low power consumption is required. In general, a gate tunnel current reducing mechanism is provided for any circuitry operating in a standby state and an active state, and is activated in the standby state to reduce the gate tunnel current in the circuitry in the standby state, to reduce power consumption in the standby state.
    • 使用具有大栅极通道势垒的晶体管作为晶体管处于待机状态,具有薄栅极绝缘膜的MIS晶体管被用作在备用状态下关断的晶体管,以及主和副电源线以及主和副电源, 形成分层供电结构的接地线在待机状态下彼此隔离,使得在需要低功耗的待机状态下,栅极隧道电流减小。 通常,为处于待机状态和有效状态的任何电路提供栅极通道电流减小机构,并且在备用状态下被激活以减少处于待机状态的电路中的栅极隧道电流,从而降低功耗 待机状态。
    • 9. 发明授权
    • Magnetic thin-film memory device for quick and stable reading data
    • 磁性薄膜记忆装置,用于快速,稳定地读取数据
    • US07489001B2
    • 2009-02-10
    • US11708030
    • 2007-02-20
    • Hideto Hidaka
    • Hideto Hidaka
    • H01L27/108
    • H01L27/228G11C8/08G11C11/15G11C11/16
    • An MTJ memory cell is independently provided with a write word line and a read word line used for data write and data read. By separately arranging read word lines every two regions formed by dividing a memory array in the column direction, it is possible to reduce signal propagation delays of the read word lines and accelerate the data read operation. Activation of each read word line is controlled by a write word line in accordance with a row selection result in a hierarchical manner. A word-line-current control circuit forms and cuts off the current path of a write word line correspondingly to data write and data read.
    • MTJ存储单元独立地具有用于数据写入和数据读取的写字线和读字线。 通过在列方向上划分存储器阵列形成的每两个区域分开布置读取字线,可以减少读取的字线的信号传播延迟并加速数据读取操作。 每个读取字线的激活根据分层方式的行选择结果由写入字线控制。 字线电流控制电路对应于数据写入和数据读取形成并切断写入字线的当前路径。