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    • 5. 发明授权
    • Anti-fuse, anti-fuse circuit including the same, and method of fabricating the anti-fuse
    • 防熔丝,反熔丝电路包括相同,以及制造防熔丝的方法
    • US08514648B2
    • 2013-08-20
    • US13051998
    • 2011-03-18
    • Jong-Pil SonSeong-Jin JangByung-Sik MoonDoo-Young KimHyoung-Joo KimJu-Seop Park
    • Jong-Pil SonSeong-Jin JangByung-Sik MoonDoo-Young KimHyoung-Joo KimJu-Seop Park
    • G11C17/18
    • H01L23/5252G11C17/16G11C29/785H01L27/101H01L2924/0002H01L2924/00
    • Provided are an anti-fuse, an anti-fuse circuit, and a method of fabricating the anti-fuse. The anti-fuse includes a semiconductor substrate, an isolation region, a channel diffusion region, a gate oxide layer, and a gate electrode. The semiconductor substrate includes a top surface and a bottom portion, the bottom portion of the semiconductor substrate having a first conductivity type. The isolation region is disposed inward from the top surface of the semiconductor substrate to a first depth. The channel diffusion region is disposed inward from the top surface of the semiconductor substrate to a second depth, the second depth located at a depth where the channel diffusion region meets an upper boundary of the bottom portion of the semiconductor substrate. The channel diffusion region is surrounded by the isolation region, the first depth is a greater distance from the top surface of the semiconductor substrate than the second depth, and the channel diffusion region has a second conductivity type opposite to the first conductivity type. The gate oxide layer is disposed on the channel diffusion region, and the gate electrode is disposed on the gate oxide layer to cover a top surface of the gate oxide layer.
    • 提供反熔丝,反熔丝电路和制造反熔丝的方法。 反熔丝包括半导体衬底,隔离区,沟道扩散区,栅极氧化层和栅电极。 半导体衬底包括顶表面和底部,半导体衬底的底部具有第一导电类型。 隔离区域从半导体衬底的顶表面向内设置到第一深度。 沟道扩散区域从半导体衬底的顶表面向内设置到第二深度,第二深度位于沟道扩散区域与半导体衬底的底部的上边界相交的深度处。 沟道扩散区域由隔离区域包围,第一深度比半导体衬底的顶表面的距离大于第二深度,并且沟道扩散区域具有与第一导电类型相反的第二导电类型。 栅极氧化层设置在沟道扩散区上,并且栅电极设置在栅极氧化层上以覆盖栅极氧化物层的顶表面。
    • 7. 发明申请
    • ANTI-FUSE, ANTI-FUSE CIRCUIT INCLUDING THE SAME, AND METHOD OF FABRICATING THE ANTI-FUSE
    • 抗保险丝,包括其中的防熔丝电路以及制造防熔丝的方法
    • US20110267915A1
    • 2011-11-03
    • US13051998
    • 2011-03-18
    • Jong-Pil SONSeong-Jin JangByung-Sik MoonDoo-Young KimHyoung-Joo KimJu-Seop Park
    • Jong-Pil SONSeong-Jin JangByung-Sik MoonDoo-Young KimHyoung-Joo KimJu-Seop Park
    • G11C8/10H01L29/78H01L27/088
    • H01L23/5252G11C17/16G11C29/785H01L27/101H01L2924/0002H01L2924/00
    • Provided are an anti-fuse, an anti-fuse circuit, and a method of fabricating the anti-fuse. The anti-fuse includes a semiconductor substrate, an isolation region, a channel diffusion region, a gate oxide layer, and a gate electrode. The semiconductor substrate includes a top surface and a bottom portion, the bottom portion of the semiconductor substrate having a first conductivity type. The isolation region is disposed inward from the top surface of the semiconductor substrate to a first depth. The channel diffusion region is disposed inward from the top surface of the semiconductor substrate to a second depth, the second depth located at a depth where the channel diffusion region meets an upper boundary of the bottom portion of the semiconductor substrate. The channel diffusion region is surrounded by the isolation region, the first depth is a greater distance from the top surface of the semiconductor substrate than the second depth, and the channel diffusion region has a second conductivity type opposite to the first conductivity type. The gate oxide layer is disposed on the channel diffusion region, and the gate electrode is disposed on the gate oxide layer to cover a top surface of the gate oxide layer.
    • 提供反熔丝,反熔丝电路和制造反熔丝的方法。 反熔丝包括半导体衬底,隔离区,沟道扩散区,栅极氧化层和栅电极。 半导体衬底包括顶表面和底部,半导体衬底的底部具有第一导电类型。 隔离区域从半导体衬底的顶表面向内设置到第一深度。 沟道扩散区域从半导体衬底的顶表面向内设置到第二深度,第二深度位于沟道扩散区域与半导体衬底的底部的上边界相交的深度处。 沟道扩散区域由隔离区域包围,第一深度比半导体衬底的顶表面的距离大于第二深度,并且沟道扩散区域具有与第一导电类型相反的第二导电类型。 栅极氧化层设置在沟道扩散区上,并且栅电极设置在栅极氧化层上以覆盖栅极氧化物层的顶表面。