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    • 1. 发明授权
    • Fabricating method of semiconductor device
    • 半导体器件的制造方法
    • US07732283B2
    • 2010-06-08
    • US11876069
    • 2007-10-22
    • Hyun Ju Lim
    • Hyun Ju Lim
    • H01L21/336
    • H01L27/115H01L27/11521
    • A method of fabricating a semiconductor device is provided. Spacers can be formed on adjacent gate structures and used as an ion implantation mask for forming source/drain regions. The spacers can include a nitride layer and an oxide layer. An etch stop layer can be provided between the gate structures, and the oxide layer can be removed from the spacers. A first oxide layer formed below the nitride layer can be protected from being etched away during removal of the oxide layer from the spacers by the etch stop layer. The etch stop layer and the first oxide layer can be removed, and an interlayer dielectric layer can be deposited.
    • 提供一种制造半导体器件的方法。 间隔件可以形成在相邻的栅极结构上,并用作用于形成源极/漏极区域的离子注入掩模。 间隔物可以包括氮化物层和氧化物层。 可以在栅极结构之间提供蚀刻停止层,并且可以从间隔物去除氧化物层。 在氮化物层下方形成的第一氧化物层可被保护,以便通过蚀刻停止层从间隔物去除氧化物层而被去除。 可以去除蚀刻停止层和第一氧化物层,并且可以沉积层间电介质层。
    • 2. 发明申请
    • Fabricating Method of Semiconductor Device
    • 半导体器件制造方法
    • US20080160691A1
    • 2008-07-03
    • US11876069
    • 2007-10-22
    • Hyun Ju Lim
    • Hyun Ju Lim
    • H01L21/336
    • H01L27/115H01L27/11521
    • A method of fabricating a semiconductor device is provided. Spacers can be formed on adjacent gate structures and used as an ion implantation mask for forming source/drain regions. The spacers can include a nitride layer and an oxide layer. An etch stop layer can be provided between the gate structures, and the oxide layer can be removed from the spacers. A first oxide layer formed below the nitride layer can be protected from being etched away during removal of the oxide layer from the spacers by the etch stop layer. The etch stop layer and the first oxide layer can be removed, and an interlayer dielectric layer can be deposited.
    • 提供一种制造半导体器件的方法。 间隔件可以形成在相邻的栅极结构上,并用作用于形成源极/漏极区域的离子注入掩模。 间隔物可以包括氮化物层和氧化物层。 可以在栅极结构之间提供蚀刻停止层,并且可以从间隔物去除氧化物层。 在氮化物层下方形成的第一氧化物层可被保护,以便通过蚀刻停止层从间隔物去除氧化物层而被去除。 可以去除蚀刻停止层和第一氧化物层,并且可以沉积层间电介质层。
    • 7. 发明授权
    • Method of manufacturing flash memory device
    • 制造闪存设备的方法
    • US07883952B2
    • 2011-02-08
    • US12146486
    • 2008-06-26
    • Hyun-Ju Lim
    • Hyun-Ju Lim
    • H01L21/8238
    • H01L27/11534H01L27/105H01L27/11526H01L29/66825H01L29/7883
    • A method of manufacturing a flash memory device that prevents generation of voids when forming an interlayer dielectric film. The method may include forming a gate on a semiconductor substrate, and then sequentially stacking a first dielectric film and a second dielectric film on the semiconductor substrate, and then forming a first spacer comprising a first dielectric film pattern and a second dielectric film pattern on sidewalls of the gate by performing a first etching process, and then forming source and drain areas in the semiconductor substrate, and then removing the second dielectric film, and then sequentially stacking a third dielectric film and a fourth dielectric film on the semiconductor substrate, and then forming a second spacer comprising the first dielectric pattern and a third dielectric pattern on the sidewalls of the gate by performing a second etching process, and then forming an interlayer dielectric film on the semiconductor substrate including the gate and the first spacer.
    • 一种在形成层间电介质膜时防止产生空隙的闪速存储器件的制造方法。 该方法可以包括在半导体衬底上形成栅极,然后在半导体衬底上依次层叠第一电介质膜和第二电介质膜,然后在侧壁上形成包括第一电介质膜图案和第二电介质膜图案的第一间隔物 通过进行第一蚀刻处理,然后在半导体衬底中形成源极和漏极区域,然后去除第二电介质膜,然后在半导体衬底上依次堆叠第三电介质膜和第四电介质膜,然后 通过执行第二蚀刻工艺,在栅极的侧壁上形成包括第一电介质图案和第三电介质图案的第二间隔物,然后在包括栅极和第一间隔物的半导体衬底上形成层间电介质膜。
    • 8. 发明授权
    • Method of manufacturing semiconductor device
    • 制造半导体器件的方法
    • US07745304B2
    • 2010-06-29
    • US12140817
    • 2008-06-17
    • Hyun-Ju Lim
    • Hyun-Ju Lim
    • H01L21/762
    • H01L21/7621H01L21/76232
    • A method of manufacturing a semiconductor device begins when a first dielectric pattern is formed on and/or over a substrate, and a first etching process is performed to form a trench in the substrate. An edge portion of the first trench is exposed. An oxidation process is performed on and/or over the substrate rounding the edge portion of the trench. A second dielectric is formed on and/or over the substrate including the trench, and a planarization process is performed on the second dielectric. A photoresist pattern is formed on and/or over the second dielectric corresponding to the trench, and a second etching process is performed to form a second dielectric pattern filling the trench. The photoresist pattern is removed. A second cleaning process is performed on the substrate including the trench to form a device isolation layer, which is formed by removing a portion of the second dielectric pattern. A portion of the second dielectric remains on the first dielectric pattern after the performing of the planarization process on the second dielectric.
    • 当在衬底上和/或衬底上形成第一电介质图案时,开始制造半导体器件的方法,并且执行第一蚀刻工艺以在衬底中形成沟槽。 暴露第一沟槽的边缘部分。 在围绕沟槽的边缘部分的基底上和/或上方进行氧化处理。 在包括沟槽的衬底上和/或上方形成第二电介质,并且在第二电介质上进行平坦化处理。 在对应于沟槽的第二电介质上和/或上方形成光致抗蚀剂图案,并且执行第二蚀刻工艺以形成填充沟槽的第二电介质图案。 去除光致抗蚀剂图案。 在包括沟槽的衬底上进行第二清洁处理,以形成通过去除第二电介质图案的一部分而形成的器件隔离层。 在对第二电介质进行平坦化处理之后,第二电介质的一部分保留在第一电介质图案上。