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    • 1. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US08493135B2
    • 2013-07-23
    • US13100991
    • 2011-05-04
    • Jae-Boum Park
    • Jae-Boum Park
    • G05F1/10
    • H02M1/36H02M3/07H02M2001/0041
    • A semiconductor integrated circuit includes a pre-charge signal generator configured to pre-charge a plurality of oscillation signals to a certain voltage level in a pre-charge mode, wherein the pre-charge signal generator includes: a first storage unit for storing a first pre-charge oscillation signal in response to a reference oscillation signal, a feedback unit for feeding back a second pre-charge oscillation signal, a second storage unit for storing the second pre-charge oscillation signal corresponding to an output signal of the first storage unit in response to the reference oscillation signal, and a pre-charge signal output unit for outputting a pre-charge signal in response to the first pre-charge oscillation signal and the second pre-charge oscillation signal.
    • 半导体集成电路包括预充电信号发生器,其被配置为在预充电模式下将多个振荡信号预充电到一定电压电平,其中所述预充电信号发生器包括:第一存储单元,用于存储第一 响应于参考振荡信号的预充电振荡信号,用于反馈第二预充电振荡信号的反馈单元,用于存储与第一存储单元的输出信号相对应的第二预充电振荡信号的第二存储单元 响应于参考振荡信号,以及预充电信号输出单元,用于响应于第一预充电振荡信号和第二预充电振荡信号而输出预充电信号。
    • 2. 发明授权
    • Test entry circuit and method for generating test entry signal
    • 测试录入电路和产生测试录入信号的方法
    • US07949923B2
    • 2011-05-24
    • US12165008
    • 2008-06-30
    • Jae-Boum Park
    • Jae-Boum Park
    • G06F11/263G06F11/30
    • G11C29/06G11C29/46
    • Test entry circuit and method for generating test entry signal including a first source signal generator configured to receive a test signal through a pad to generate a first mode source signal for a first test mode, a second source signal generator configured to count activation transitions of the test signal to generate a second mode source signal for a second test mode and an entry signal generator configured to receive the first and second mode source signals to generate a first test mode entry signal for entering the first test mode and a second test mode entry signal for entering the second test mode.
    • 用于生成测试入口信号的测试入口电路和方法,包括第一源信号发生器,其被配置为通过焊盘接收测试信号以产生用于第一测试模式的第一模式源信号;第二源信号发生器,被配置为对 测试信号以产生用于第二测试模式的第二模式源信号和输入信号发生器,其被配置为接收第一和第二模式源信号以产生用于进入第一测试模式的第一测试模式输入信号和第二测试模式输入信号 进入第二个测试模式。
    • 6. 发明授权
    • Semiconductor memory device having back-bias voltage in stable range
    • 具有稳定范围的背偏电压的半导体存储器件
    • US07924073B2
    • 2011-04-12
    • US12165040
    • 2008-06-30
    • Jae-Boum Park
    • Jae-Boum Park
    • H03L7/06
    • G05F3/205
    • A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal based on respective higher first and lower second target levels. An oscillator generates an oscillation signal that oscillates at a predetermined frequency, in response to a detection signal of the first voltage detecting unit. A charge pumping unit drives the terminal by performing charge pumping in response to the oscillation signal. A voltage level control unit controls the voltage level of the terminal in response to the detection signals, whereby the terminal's voltage level is lower than the first target level and higher than the second target level.
    • 背偏置电压产生电路通过在背偏电压电平降低到预定目标电平以下的情况下检测反偏压来控制预定范围内的偏置偏压。 该电路包括输出相应检测信号的第一和第二检测单元,其基于相应的较高的第一和较低的第二目标电平来检测终端的电压电平。 响应于第一电压检测单元的检测信号,振荡器产生以预定频率振荡的振荡信号。 电荷泵送单元通过响应于振荡信号进行电荷泵送来驱动端子。 电压电平控制单元响应于检测信号控制端子的电压电平,由此端子的电压电平低于第一目标电平并高于第二目标电平。
    • 9. 发明授权
    • Semiconductor memory device for generating back-BIAS voltage with variable driving force
    • 用于产生具有可变驱动力的反向BIAS电压的半导体存储器件
    • US07768843B2
    • 2010-08-03
    • US12165028
    • 2008-06-30
    • Jae-Boum Park
    • Jae-Boum Park
    • G11C7/00
    • G11C5/145G11C11/4074
    • A semiconductor memory device is capable of maintaining a predetermined back-bias voltage level regardless of operation modes of the semiconductor memory device, by generating a back-bias voltage with driving force changed according to the operation modes. The semiconductor memory device includes an active pumping control signal generating unit for generating an active pumping control signal in response to a plurality of active signals, a voltage detecting unit for detecting a voltage level of a back-bias voltage terminal to output a detection signal, an oscillator for generating an oscillation signal oscillating at a predetermined frequency in response to the detection signal, and a charge pumping unit for performing a charge pumping operation in response to the oscillation signal by controlling a force of driving the back-bias voltage terminal in response to the active pumping control signal.
    • 无论半导体存储器件的操作模式如何,通过产生根据操作模式改变的驱动力的背偏电压,半导体存储器件能够保持预定的反向偏置电压电平。 半导体存储器件包括:主动泵送控制信号产生单元,用于响应于多个有效信号产生主动泵送控制信号;电压检测单元,用于检测反向偏置电压端子的电压电平以输出检测信号; 用于响应于检测信号产生以预定频率振荡的振荡信号的振荡器;以及电荷泵送单元,用于响应于振荡信号通过控制驱动反偏压电压端子的力来执行电荷泵浦操作 到主动泵送控制信号。