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1. 发明申请

US20070281385A1 Process For Fabricating Electronic Components And Electronic Components Obtained By This Process 失效
标题翻译：用于制造通过该工艺获得的电子元件和电子元件的工艺
公开(公告)号：US20070281385A1
公开(公告)日：2007-12-06
申请号：US10599127
申请日：2005-03-21
申请人： Travis Wade , Jean-Eric Wegrowe
发明人： Travis Wade , Jean-Eric Wegrowe
IPC分类号： H01L51/30
CPC分类号： H01L51/0048 , B82Y10/00 , C25D11/12 , C25D11/18 , C25D11/20 , H01L49/006 , H01L51/0512 , Y10S977/89 , Y10T29/49014 , Y10T29/49018 , Y10T29/49155 , Y10T29/49455 , Y10T29/496
摘要： The invention relates to a method for producing electronic components consisting in carrying out a first anodisation of a carrier material (1) for forming at least one first pore (3) extending in a first direction in said carrier material (1) and in carrying out a second anodisation for forming at least one second pore (17) extending in the carrier material (1) in a second direction different from the first direction
摘要翻译：本发明涉及一种用于制造电子部件的方法，该方法包括对载体材料（1）进行第一次阳极氧化，以形成在所述载体材料（1）中沿第一方向延伸的至少一个第一孔（3）第二阳极氧化，用于在不同于第一方向的第二方向上形成在载体材料（1）中延伸的至少一个第二孔（17）

2. 发明授权

US07765690B2 Process for fabricating electronic components and electronic components obtained by this process 失效
标题翻译：用于制造通过该方法获得的电子部件和电子部件的工艺
公开(公告)号：US07765690B2
公开(公告)日：2010-08-03
申请号：US10599127
申请日：2005-03-21
申请人： Travis Wade , Jean-Eric Wegrowe
发明人： Travis Wade , Jean-Eric Wegrowe
IPC分类号： H05K3/02
CPC分类号： H01L51/0048 , B82Y10/00 , C25D11/12 , C25D11/18 , C25D11/20 , H01L49/006 , H01L51/0512 , Y10S977/89 , Y10T29/49014 , Y10T29/49018 , Y10T29/49155 , Y10T29/49455 , Y10T29/496
摘要： The invention relates to a method for producing electronic components consisting in carrying out a first anodization of a carrier material (1) for forming at least one first pore (3) extending in a first direction in said carrier material (1) and in carrying out a second anodization for forming at least one second pore (17) extending in the carrier material (1) in a second direction different from the first direction.
摘要翻译：本发明涉及一种用于制造电子部件的方法，所述方法包括进行载体材料（1）的第一阳极氧化，以形成在所述载体材料（1）中沿第一方向延伸的至少一个第一孔（3）用于在不同于第一方向的第二方向上形成在载体材料（1）中延伸的至少一个第二孔（17）的第二阳极氧化。

3. 发明授权

US07846819B2 Method of synthesizing nanoscale filamentary structures, and electronic components comprising such structures 有权
标题翻译：合成纳米级丝状结构的方法以及包含这种结构的电子部件
公开(公告)号：US07846819B2
公开(公告)日：2010-12-07
申请号：US10574186
申请日：2004-10-12
申请人： Didier Pribat , Jean-Eric Wegrowe , Travis Wade
发明人： Didier Pribat , Jean-Eric Wegrowe , Travis Wade
IPC分类号： H01L21/365 , H01L29/04
CPC分类号： H01L51/0048 , B01J21/04 , B01J21/185 , B01J23/63 , B01J23/83 , B01J35/065 , B82Y10/00 , B82Y30/00 , B82Y40/00 , C01B32/162 , C30B25/18 , C30B29/60 , D01F9/08 , D01F9/12 , H01L21/0242 , H01L21/02527 , H01L21/02532 , H01L21/02603 , H01L21/02606 , H01L21/0262 , H01L21/02642 , H01L21/02645 , Y10S977/742 , Y10S977/762 , Y10S977/843
摘要： A method of synthesizing electronic components incorporating nanoscale filamentary structures in which method a metallic catalyst is deposited in a nanoporous membrane , the catalyst being adapted to penetrate in at least some of the pores of the nanoporous membrane , and filamentary structures are grown on the catalyst in at least some of the pores in the nanoporous membrane . The nanoporous membrane is prepared in a manner suitable for ensuring that the wall of the pores include a single-crystal zone, and at least part of the catalyst is grown epitaxially on said single-crystal zone.
摘要翻译：一种合成纳米尺度丝状结构的电子部件的方法，其中金属催化剂沉积在纳米多孔膜中的方法，所述催化剂适于在纳米多孔膜的至少一些孔中渗透，并且在催化剂上生长丝状结构纳米多孔膜中的至少一些孔。以适于确保孔的壁包括单晶区的方式制备纳米多孔膜，并且至少部分催化剂在所述单晶区上外延生长。

4. 发明授权

US06172902B2 Non-volatile magnetic random access memory 有权
标题翻译：非易失磁性随机存取存储器
公开(公告)号：US06172902B2
公开(公告)日：2001-01-09
申请号：US09376714
申请日：1999-08-13
申请人： Jean-Eric Wegrowe , Jean-Philippe Ansermet , Scott E. Gilbert
发明人： Jean-Eric Wegrowe , Jean-Philippe Ansermet , Scott E. Gilbert
IPC分类号： G11C1115
CPC分类号： G11C11/16 , B82Y10/00 , G11C2213/81 , H01L27/222
摘要： A non-volatile random access memory (NVRAM) of the type with magnetoresistive memory elements (1) connected by sets of non-intersecting conductor sense lines (3, 4) which define the address of each memory element (1) and are connectable to a magnetic write/read recording unit. The memory elements are a plurality of magnetoresistive submicron dots or wires (1) embedded in a membrane (2) through which the submicron dots or wires extend. The sets of non-intersecting conductor sense lines (3, 4) are connected to the opposite ends of the submicron dots or wires (1) on opposite sides of the membrane. Each magnetoresistive submicron dot or wire (1) is composed of ferromagnetic material or a combination of ferromagnetic and non-ferromagnetic materials having at least two magnetic states (“0”; “1”), writeable by passing at an appropriate external field a writing current pulse (iw) in its conductor lines (3, 4, 5) sufficient to switch its magnetic states and readable by passing a an AC or DC current (ir) in its conductor lines below the level for switching its magnetic states.
摘要翻译：一种具有磁阻存储器元件（1）的类型的非易失性随机存取存储器（NVRAM），其通过一组不相交的导体感测线（3,4）连接，所述不相交的导体感测线限定每个存储元件（1）的地址，并且可连接到磁性写/读记录单元。存储器元件是嵌入在膜（2）中的多个磁阻亚微米点或线（1），亚微米点或线延伸穿过该膜。不相交的导体感测线（3,4）的组连接到膜的相对侧上的亚微米点或线（1）的相对端。每个磁阻亚微米点或线（1）由铁磁材料或具有至少两个磁状态（“0”;“1”）的铁磁和非铁磁材料的组合构成，可通过在适当的外部场通过写入其导体线（3,4,5）中的电流脉冲（iw）足以切换其磁状态并且可通过将其导线中的AC或DC电流（ir）传递到低于用于切换其磁状态的电平来读取。

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