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1. 发明授权

US07906772B2 Memory device 有权
标题翻译：内存设备
公开(公告)号：US07906772B2
公开(公告)日：2011-03-15
申请号：US11849632
申请日：2007-09-04
申请人： David Sargent , Jon Maimon
发明人： David Sargent , Jon Maimon
IPC分类号： H01L29/02
CPC分类号： H01L45/06 , G11C13/0004 , H01L45/1233 , H01L45/1293 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/148 , Y10T29/49155
摘要： A memory or switching device includes a mesa and a first electrode conforming to said mesa. The device also includes a second electrode and a phase-change or switching material disposed between said first and second electrodes. The phase-change or switching material is in electrical communication with the first and second electrodes at a first contact region and a second contact region respectively. Also described is a method for making a memory or switching device. The method includes providing a first insulator and configuring the first insulator to provide a mesa. A first conductive layer is provided conforming to the mesa. A phase-change or switching material is provided over a portion of the first conductive layer, and a second conductive layer is provided over the phase-change or switching material.
摘要翻译：存储器或开关器件包括台面和符合所述台面的第一电极。该装置还包括设置在所述第一和第二电极之间的第二电极和相变或开关材料。相变或开关材料分别在第一接触区域和第二接触区域处与第一和第二电极电连通。还描述了一种用于制造存储器或开关装置的方法。该方法包括提供第一绝缘体并配置第一绝缘体以提供台面。提供符合台面的第一导电层。相变或开关材料设置在第一导电层的一部分上，并且第二导电层设置在相变或开关材料上。

2. 发明授权

US08908413B2 Programmable resistance memory 有权
标题翻译：可编程电阻记忆
公开(公告)号：US08908413B2
公开(公告)日：2014-12-09
申请号：US13216675
申请日：2011-08-24
申请人： Tyler Lowrey , Carl Schell , Wally Czubatyj , Steve Hudgens , Jon Maimon , Jeff Fournier , Mike Hennessey , Ed Spall
发明人： Tyler Lowrey , Carl Schell , Wally Czubatyj , Steve Hudgens , Jon Maimon , Jeff Fournier , Mike Hennessey , Ed Spall
IPC分类号： G11C11/00 , G11C11/56 , G11C13/00
CPC分类号： G11C13/0004 , G11C11/56 , G11C11/5678 , G11C13/0035
摘要： A memory includes a programmable resistance array with high ratio of dynamic range to drift coefficient phase change memory devices.
摘要翻译：存储器包括具有高比例的动态范围与漂移系数相变存储器件的可编程电阻阵列。

3. 发明授权

US06972428B2 Programmable resistance memory element 有权
标题翻译：可编程电阻存储元件
公开(公告)号：US06972428B2
公开(公告)日：2005-12-06
申请号：US10914480
申请日：2004-08-09
申请人： Jon Maimon
发明人： Jon Maimon
IPC分类号： G11C11/56 , H01L45/00 , H01L47/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144 , H01L45/1691
摘要： A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode, in a slot-like opening of a dielectric material. A method of making the opening.
摘要翻译：使用导电侧壁层作为底部电极的可编程电阻存储元件。沉积在底部电极的顶部边缘上的可编程电阻存储器材料在电介质材料的狭缝状开口中。制作开口的方法。

4. 发明申请

US20050012086A1 Programmable resistance memory element and method for making same 有权
标题翻译：可编程电阻存储元件及其制造方法
公开(公告)号：US20050012086A1
公开(公告)日：2005-01-20
申请号：US10914480
申请日：2004-08-09
申请人： Jon Maimon
发明人： Jon Maimon
IPC分类号： G11C11/56 , H01L45/00 , H01L47/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144 , H01L45/1691
摘要： A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode, in a slot-like opening of a dielectric material. A method of making the opening.
摘要翻译：使用导电侧壁层作为底部电极的可编程电阻存储元件。沉积在底部电极的顶部边缘上的可编程电阻存储器材料在电介质材料的狭缝状开口中。制作开口的方法。

5. 发明授权

US06613604B2 Method for making small pore for use in programmable resistance memory element 有权
公开(公告)号：US06613604B2
公开(公告)日：2003-09-02
申请号：US09955408
申请日：2001-09-19
申请人： Jon Maimon , Patrick Klersy
发明人： Jon Maimon , Patrick Klersy
IPC分类号： H01L2100
CPC分类号： H01L45/16 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/126 , H01L45/144 , H01L45/1691
摘要： A method for making a small pore. The defined pore is useful for the fabrication of programmable resistance memory elements. The programmable resistance memory material may be a chalcogenide.

6. 发明授权

US08217379B2 Arsenic-containing variable resistance materials 有权
标题翻译：含砷可变电阻材料
公开(公告)号：US08217379B2
公开(公告)日：2012-07-10
申请号：US12505854
申请日：2009-07-20
申请人： Carl Schell , Guy Wicker , Jon Maimon
发明人： Carl Schell , Guy Wicker , Jon Maimon
IPC分类号： H01L29/02
CPC分类号： C22C12/00 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1625 , H01L45/1641 , H01L45/1683 , Y10T428/12
摘要： A variable resistance material for memory applications. The material includes a base Ge—Sb—Te composition and further includes As-doping. The materials were included in variable resistance memory devices. Incorporation of As in the variable resistance composition led to a significant increase in the operational life of the device and, unexpectedly, did not reduce the programming speed of the device. In one embodiment, the composition includes at atomic concentration of Ge in the range from 7%-13%, an atomic concentration of Sb in the range from 50%-70%, an atomic concentration of Te in the range from 20%-30%, and an atomic concentration of As in the range from 2%-15%.
摘要翻译：用于存储器应用的可变电阻材料。该材料包括基底Ge-Sb-Te组合物，并且还包括As掺杂。这些材料包括在可变电阻存储器件中。在可变电阻组合中引入As导致器件的使用寿命显着增加，并且意外地没有降低器件的编程速度。在一个实施方案中，组合物包括Ge原子浓度在7％-13％，Sb的原子浓度在50％-70％范围内，Te的原子浓度在20％-30的范围内％，As的原子浓度在2％-15％的范围内。

7. 发明申请

US20110154663A1 Memory Device 有权
标题翻译：存储设备
公开(公告)号：US20110154663A1
公开(公告)日：2011-06-30
申请号：US13041955
申请日：2011-03-07
申请人： David Sargent , Jon Maimon
发明人： David Sargent , Jon Maimon
IPC分类号： H05K3/10
CPC分类号： H01L45/06 , G11C13/0004 , H01L45/1233 , H01L45/1293 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/148 , Y10T29/49155
摘要： A memory or switching device includes a mesa and a first electrode conforming to said mesa. The device also includes a second electrode and a phase-change or switching material disposed between said first and second electrodes. The phase-change or switching material is in electrical communication with the first and second electrodes at a first contact region and a second contact region respectively. Also described is a method for making a memory or switching device. The method includes providing a first insulator and configuring the first insulator to provide a mesa. A first conductive layer is provided conforming to the mesa. A phase-change or switching material is provided over a portion of the first conductive layer, and a second conductive layer is provided over the phase-change or switching material.
摘要翻译：存储器或开关器件包括台面和符合所述台面的第一电极。该装置还包括设置在所述第一和第二电极之间的第二电极和相变或开关材料。相变或开关材料分别在第一接触区域和第二接触区域处与第一和第二电极电连通。还描述了一种用于制造存储器或开关装置的方法。该方法包括提供第一绝缘体并配置第一绝缘体以提供台面。提供符合台面的第一导电层。相变或开关材料设置在第一导电层的一部分上，并且第二导电层设置在相变或开关材料上。

8. 发明授权

US06733956B2 Method for making programmable resistance memory element 有权
标题翻译：制造可编程电阻存储元件的方法
公开(公告)号：US06733956B2
公开(公告)日：2004-05-11
申请号：US10072324
申请日：2002-02-08
申请人： Jon Maimon , Andrew Pomerene
发明人： Jon Maimon , Andrew Pomerene
IPC分类号： G03F700
CPC分类号： G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144 , H01L45/1691
摘要： A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode in a slot-like opening formed in a dielectric material. A method of making the opening using a silylated photoresist.
摘要翻译：使用导电侧壁层作为底部电极的可编程电阻存储元件。可编程电阻存储材料沉积在形成于电介质材料中的槽状开口中的底部电极的顶部边缘上。使用甲硅烷基化光致抗蚀剂制作开口的方法。

9. 发明授权

US06638832B2 Elimination of narrow device width effects in complementary metal oxide semiconductor (CMOS) devices 失效
公开(公告)号：US06638832B2
公开(公告)日：2003-10-28
申请号：US09741028
申请日：2000-12-21
申请人： Frederick T. Brady , Jon Maimon
发明人： Frederick T. Brady , Jon Maimon
IPC分类号： H01L2176
CPC分类号： H01L21/26506 , H01L21/76237 , H01L21/823412 , H01L21/823481
摘要： Neutral conductivity ions, preferably germanium, are implanted through the oxide of a metal oxide semiconductor after isolation formation to provide a nearly constant threshold voltage for transistor operation independent of transistor channel width as device geometries are scaled down in size. The present invention sets forth a method for fabricating a metal oxide semiconductor (MOS) structure that controls threshold voltage Vt in the structure, the method including generating an isolation region of the semiconductor structure on a major surface of a silicon substrate, growing a thin oxide on the major surface of the semiconductor structure, implanting a large diameter neutral conductivity type ion into the major surface of the semiconductor structure through the thin oxide, annealing the semiconductor structure having the neutral conductivity ion implanted therein, and processing the semiconductor structure to create MOS devices having a near constant threshold voltage over a range of device channel widths.

10. 发明授权

US06589714B2 Method for making programmable resistance memory element using silylated photoresist 有权
公开(公告)号：US06589714B2
公开(公告)日：2003-07-08
申请号：US09891551
申请日：2001-06-26
申请人： Jon Maimon , Andrew Pomerene
发明人： Jon Maimon , Andrew Pomerene
IPC分类号： G02F720
CPC分类号： G11C13/0004 , H01L45/04
摘要： A method of making a electrically operated programmable resistance memory element. A silylated photoresist sidewall spacer is used as a mask for form raised portions on an edge of a conductive layer. The modified conductive layer is used as an electrode for the memory element.

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