会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Semiconductor storage device
    • 半导体存储设备
    • US07215562B2
    • 2007-05-08
    • US11143580
    • 2005-06-03
    • Junichi Sekine
    • Junichi Sekine
    • G11C5/06
    • H01L27/10897G11C11/412
    • A semiconductor storage device in which a pair of wiring lines extending in a first direction are arranged repeatedly with a predetermined pitch, comprising: a group of pair transistors in which a plurality of pair transistors is arranged according to a repetition unit with a predetermined pattern, the pair transistors composed of a MOS transistor of which a gate is connected to one line of the pair of wiring lines and of another MOS transistor of which a gate is connected to the other line of the pair of wiring lines, wherein the repetition unit of the group of pair transistors includes a plurality of the pair transistors such that two MOS transistors are adjacent to each other in the first direction, and at least one pair of pair transistors such that two MOS transistors are not adjacent to each other and diagonally opposite to each other.
    • 一种半导体存储装置,其中沿着第一方向延伸的一对布线以预定间距重复布置,包括:根据具有预定图案的重复单元布置多个对晶体管的一对对晶体管, 所述对晶体管由MOS晶体管构成,其栅极连接到所述一对布线的一条线,以及另一MOS晶体管,栅极连接到所述一对布线的另一条线,其中所述重复单元 成对晶体管组包括多个对晶体管,使得两个MOS晶体管在第一方向上彼此相邻,并且至少一对对晶体管使得两个MOS晶体管彼此不相邻并且与 彼此。
    • 9. 发明申请
    • Semiconductor device having dummy pattern
    • 具有虚拟图案的半导体器件
    • US20080185741A1
    • 2008-08-07
    • US12068306
    • 2008-02-05
    • Junichi Sekine
    • Junichi Sekine
    • H01L23/544
    • G03F9/7076G03F9/7088H01L21/31053H01L23/522H01L2924/0002H01L2924/00
    • A memory device having dummy pattern comprises: an alignment mark, provided at a predetermined position on a semiconductor substrate, for aligning position in manufacturing process based on an optical detection signal obtained by scanning in a first direction or in a second direction orthogonal to the first direction in a substrate plane; a real pattern formed in a wiring layer on the semiconductor substrate and used for circuit wiring; and a dummy pattern formed in the wiring layer and used in CMP method. The dummy pattern includes a plurality of basic patterns having a predetermined shape asymmetrical with respect to the first and second directions, and respective pattern portions crossing the basic patterns in the first and second directions in an area in which the dummy pattern is formed are not repeatedly arranged with a constant gap.
    • 具有虚设图案的存储器件包括:对准标记,设置在半导体衬底上的预定位置处,用于在制造过程中基于通过沿第一方向扫描获得的光学检测信号或与第一方向垂直的第二方向 方向; 形成于半导体基板上的配线层的实线,用于电路布线; 以及形成在布线层中并用于CMP方法的虚设图案。 虚拟图案包括具有相对于第一和第二方向不对称的预定形状的多个基本图案,并且在形成有虚设图案的区域中与第一和第二方向上的基本图案交叉的各图案部分不重复 以一定的差距排列。