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1. 发明授权

US09960116B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US09960116B2
公开(公告)日：2018-05-01
申请号：US12563608
申请日：2009-09-21
申请人： Kazuaki Ohshima
发明人： Kazuaki Ohshima
IPC分类号： H01L29/86 , H01L23/522 , H01C1/16 , H01C13/02 , H01L23/525 , H01L49/02
CPC分类号： H01L23/5228 , H01C1/16 , H01C13/02 , H01L23/5258 , H01L28/20 , H01L28/24 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A resistor whose characteristic value can be changed without requiring a photolithography process again is provided. The resistor includes a plurality of first resistor units which is connected serially to each other and a second resistor unit which is connected in parallel to part of the first resistor units. Then, after the measurement of a semiconductor integrated circuit, the second resistor unit is electrically disconnected as necessary. The first resistor units may be either a unit including a single resistor or may be a unit including a plurality of resistors.

2. 发明授权

US09024317B2 Semiconductor circuit, method for driving the same, storage device, register circuit, display device, and electronic device 有权
标题翻译：半导体电路，其驱动方法，存储装置，寄存器电路，显示装置和电子装置
公开(公告)号：US09024317B2
公开(公告)日：2015-05-05
申请号：US13310824
申请日：2011-12-05
申请人： Masami Endo , Kazuaki Ohshima
发明人： Masami Endo , Kazuaki Ohshima
IPC分类号： H01L29/786 , G09G3/36 , H01L27/12
CPC分类号： H01L27/1225 , G09G3/3648 , G09G2300/043 , G09G2300/0819 , G09G2320/0214 , H01L27/1255 , H01L28/40 , H01L29/7869
摘要： A semiconductor circuit capable of controlling and holding the threshold voltage of a transistor at an optimal level and a driving method thereof are disclosed. A storage device, a display device, or an electronic device including the semiconductor circuit is also provided. The semiconductor circuit comprises a diode and a first capacitor provided in a node to which a transistor to be controlled is connected through its back gate. This structure allows the application of desired voltage to the back gate so that the threshold voltage of the transistor is controlled at an optimal level and can be held for a long time. A second capacitor connected in parallel with the diode is optionally provided so that the voltage of the node can be changed temporarily.
摘要翻译：公开了能够控制并保持晶体管的阈值电压达到最佳水平的半导体电路及其驱动方法。还提供了存储装置，显示装置或包括半导体电路的电子装置。该半导体电路包括一个二极管和一个设置在一个节点上的第一电容器，待控制的晶体管通过其后门连接到该节点上。这种结构允许将期望的电压施加到背栅极，使得晶体管的阈值电压被控制在最佳水平并且可以保持很长时间。可选地提供与二极管并联连接的第二电容器，使得可以暂时改变节点的电压。

3. 发明授权

US08791516B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08791516B2
公开(公告)日：2014-07-29
申请号：US13473014
申请日：2012-05-16
申请人： Kazuaki Ohshima
发明人： Kazuaki Ohshima
IPC分类号： H01L27/108 , H03K19/00 , H03K19/177
CPC分类号： H01L27/105 , H01L27/0605 , H01L27/0688 , H01L27/092 , H01L27/108 , H01L27/1203 , H03K19/0013 , H03K19/1776 , H03K19/17772
摘要： A semiconductor device having a novel structure is provided. The semiconductor device includes a first p-type transistor, a second n-type transistor, a third transistor, and a fourth transistor. One of a source and a drain of the third transistor is connected to a wiring supplying first potential, and the other is connected to one of a source and a drain of the first transistor. One of a source and a drain of the second transistor is connected to the other of the source and the drain of the first transistor, and the other is connected to one of a source and a drain of the fourth transistor. The other of the source and the drain of the fourth transistor is connected to a wiring supplying second potential lower than the first potential. An oxide semiconductor material is used in channel formation regions of the third transistor and the fourth transistor.
摘要翻译：提供具有新颖结构的半导体器件。半导体器件包括第一p型晶体管，第二n型晶体管，第三晶体管和第四晶体管。第三晶体管的源极和漏极之一连接到提供第一电位的布线，另一个连接到第一晶体管的源极和漏极之一。第二晶体管的源极和漏极之一连接到第一晶体管的源极和漏极中的另一个，另一个连接到第四晶体管的源极和漏极之一。第四晶体管的源极和漏极中的另一个连接到提供低于第一电位的第二电位的布线。在第三晶体管和第四晶体管的沟道形成区域中使用氧化物半导体材料。

4. 发明授权

US08570065B2 Programmable LSI 有权
标题翻译：可编程LSI
公开(公告)号：US08570065B2
公开(公告)日：2013-10-29
申请号：US13437961
申请日：2012-04-03
申请人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
发明人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
IPC分类号： H03K19/177 , G11C11/24
CPC分类号： H03K19/17796 , G11C16/0433 , H01L27/11803 , H01L27/1203
摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.
摘要翻译：提供了可以执行动态配置的低功耗可编程LSI。可编程LSI包括多个逻辑元件。多个逻辑元件各自包括配置存储器。多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。配置存储器包括一组易失性存储电路和非易失性存储电路。非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

5. 发明授权

US5213873A Aqueous ink-jet recording sheet 失效
标题翻译： AQUEOUS INK-JET记录表
公开(公告)号：US5213873A
公开(公告)日：1993-05-25
申请号：US600378
申请日：1990-10-19
申请人： Kenji Yasuda , Kazuaki Ohshima , Susumu Hasegawa
发明人： Kenji Yasuda , Kazuaki Ohshima , Susumu Hasegawa
IPC分类号： B41M5/52
CPC分类号： B41M5/5245 , Y10S428/913 , Y10S428/914 , Y10T428/259
摘要： An aqueous ink-jet recording sheet capable of recording clear, brilliant color images, and having a high water resistance, storage durability and resistance to curling and undulations, comprises a neutral paper substrate sheet having a Stoechigt sizing degree of 1 to 15 seconds; and an aqueous ink image-receiving layer in a basis weight of 0.5 to 10 g/m.sup.2 and comprising (a) fine, oil absorbing silica particles, (b) polyvinyl alcohol binder and (c) a water resisting agent comprising a cationic, water-soluble acrylic copolymer having side chains attached to a vinyl backbone chain and each having at least two cationic radicals.

6. 发明授权

US09336845B2 Register circuit including a volatile memory and a nonvolatile memory 有权
标题翻译：包括易失性存储器和非易失性存储器的寄存器电路
公开(公告)号：US09336845B2
公开(公告)日：2016-05-10
申请号：US13467403
申请日：2012-05-09
申请人： Kazuaki Ohshima , Hidetomo Kobayashi
发明人： Kazuaki Ohshima , Hidetomo Kobayashi
IPC分类号： G11C5/06 , G11C11/00 , G11C19/28 , G11C11/404 , G11C14/00 , H01L27/12
CPC分类号： G11C11/005 , G11C11/404 , G11C14/0009 , G11C19/287 , H01L27/1225
摘要： A semiconductor device capable of assessing and rewriting data at a desired timing is provided. A semiconductor device includes a register circuit, a bit line, and a data line. The register circuit includes a flip-flop circuit, a selection circuit, and a nonvolatile memory circuit electrically connected to the flip-flop circuit through the selection circuit. The data line is electrically connected to the flip-flop circuit. The bit line is electrically connected to the nonvolatile memory circuit through the selection circuit. The selection circuit selectively stores data based on a potential of the data line or a potential of the bit line in the nonvolatile memory circuit.
摘要翻译：提供能够在期望的时刻评估和重写数据的半导体器件。半导体器件包括寄存器电路，位线和数据线。寄存器电路包括触发器电路，选择电路和通过选择电路电连接到触发器电路的非易失性存储器电路。数据线电连接到触发器电路。位线通过选择电路电连接到非易失性存储器电路。选择电路基于数据线的电位或非易失性存储器电路中的位线的电位有选择地存储数据。

7. 发明授权

US09059704B2 Programmable logic device 有权
标题翻译：可编程逻辑器件
公开(公告)号：US09059704B2
公开(公告)日：2015-06-16
申请号：US13477192
申请日：2012-05-22
申请人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
发明人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
IPC分类号： G06F1/00 , H03K19/177 , H03K19/173 , G06F3/06
CPC分类号： H03K19/173 , G06F1/3243 , G06F3/0679 , H03K19/17772 , Y02D10/152
摘要： An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.
摘要翻译：目的是提供一种可编程逻辑器件，其被配置为即使在电源电压停止时仍保持逻辑电路的连接状态。可编程逻辑器件包括可以改变其逻辑状态的运算电路; 配置改变电路改变运算电路的逻辑状态; 电源控制电路，控制对所述运算电路的电源电压供给; 存储关于逻辑状态的数据的状态存储电路和关于运算电路的电源电压的状态的数据; 以及算术状态控制电路，根据存储在状态存储电路中的数据控制配置改变电路和电源控制电路。在配置改变电路和每个运算电路之间设置有在氧化物半导体层中形成沟道形成区的晶体管。

8. 发明申请

US20120161139A1 SEMICONDUCTOR CIRCUIT, METHOD FOR DRIVING THE SAME, STORAGE DEVICE, REGISTER CIRCUIT, DISPLAY DEVICE, AND ELECTRONIC DEVICE 有权
标题翻译：半导体电路，驱动它们的方法，存储器件，寄存器电路，显示器件和电子器件
公开(公告)号：US20120161139A1
公开(公告)日：2012-06-28
申请号：US13310824
申请日：2011-12-05
申请人： Masami ENDO , Kazuaki OHSHIMA
发明人： Masami ENDO , Kazuaki OHSHIMA
IPC分类号： H01L29/786 , H01L33/16
CPC分类号： H01L27/1225 , G09G3/3648 , G09G2300/043 , G09G2300/0819 , G09G2320/0214 , H01L27/1255 , H01L28/40 , H01L29/7869
摘要： A semiconductor circuit capable of controlling and holding the threshold voltage of a transistor at an optimal level and a driving method thereof are disclosed. A storage device, a display device, or an electronic device including the semiconductor circuit is also provided. The semiconductor circuit comprises a diode and a first capacitor provided in a node to which a transistor to be controlled is connected through its back gate. This structure allows the application of desired voltage to the back gate so that the threshold voltage of the transistor is controlled at an optimal level and can be held for a long time. A second capacitor connected in parallel with the diode is optionally provided so that the voltage of the node can be changed temporarily.
摘要翻译：公开了能够控制并保持晶体管的阈值电压达到最佳水平的半导体电路及其驱动方法。还提供了存储装置，显示装置或包括半导体电路的电子装置。该半导体电路包括一个二极管和一个设置在一个节点上的第一电容器，待控制的晶体管通过其后门连接到该节点上。这种结构允许将期望的电压施加到背栅极，使得晶体管的阈值电压被控制在最佳水平并且可以保持很长时间。可选地提供与二极管并联连接的第二电容器，使得可以暂时改变节点的电压。

9. 发明授权

US07905397B2 Data management method and data management system 有权
标题翻译：数据管理方法和数据管理系统
公开(公告)号：US07905397B2
公开(公告)日：2011-03-15
申请号：US11440125
申请日：2006-05-25
申请人： Kazuaki Ohshima
发明人： Kazuaki Ohshima
IPC分类号： G06K5/00
CPC分类号： G06Q10/06 , G11C17/14 , G11C17/18 , H01L27/12
摘要： In managing an underground facility, considering the enormous number of documents, the number of people who are involved with the management of electric power, communication, gas, water, sewage or the like, and expended hours, enormous cost and time have been needed so far. A wireless chip is attached to each buried object itself in substitution for a boundary stake or a display stake of an underground facility or a ground facility. Then, data such as embedded date, position data, or an owner is written into a memory portion of the wireless chip. In addition, by incorporating a CUP in the wireless chip, only a terminal having an encryption function which has obtained permission of communication can communicate, and access by unspecified number of devices, leakage of position data or the like, an erasure of stored data, rewriting, and the like can be prevented. Such a system can surely perform management of facility data.
摘要翻译：在管理地下设施时，考虑到大量的文件，涉及电力，通讯，燃气，水，污水等管理人员的人数，以及花费时间，巨大的成本和时间都需要远。无线芯片附接到每个掩埋物体本身以代替地下设施或地面设施的边界桩或显示桩。然后，将诸如嵌入日期，位置数据或所有者的数据写入无线芯片的存储器部分。此外，通过在无线芯片中并入CUP，只有具有获得通信许可的加密功能的终端可以进行通信，通过未指定数量的设备的访问，位置数据的泄漏等，存储的数据的擦除，可以防止重写等。这样的系统可以肯定地执行设施数据的管理。

10. 发明申请

US20070121402A1 Semiconductor device and operating method thereof 有权
标题翻译：半导体器件及其操作方法
公开(公告)号：US20070121402A1
公开(公告)日：2007-05-31
申请号：US11600834
申请日：2006-11-17
申请人： Kazuaki Ohshima
发明人： Kazuaki Ohshima
IPC分类号： G11C7/00
CPC分类号： H01L27/1266 , G11C17/12 , H01L27/105 , H01L27/112 , H01L27/11293 , H01L27/1214 , H01L27/13
摘要： An object is to provide a semiconductor device capable of reducing an area of the semiconductor device, reading data reliably, and simplifying replacement of data. A memory cell and a data line are controlled with a reset signal, so that data can be reliably outputted in the semiconductor device. In addition, an element of data holding unit is included, and the data holding unit includes a plurality of memory cells. The area can be reduced by using such a memory cell. A transistor is not connected to GND, thereby simplifying the replacement of data in the memory cell.
摘要翻译：本发明的目的是提供能够减少半导体器件的面积，可靠地读取数据并简化数据替换的半导体器件。用复位信号控制存储单元和数据线，从而可以在半导体器件中可靠地输出数据。此外，包括数据保存单元的元素，并且数据保持单元包括多个存储单元。可以通过使用这样的存储单元来减少该区域。晶体管不连接到GND，从而简化了存储单元中的数据的替换。

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