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    • 5. 发明申请
    • Patterns of Semiconductor Device and Method of Forming the Same
    • 半导体器件的形式及其形成方法
    • US20100207248A1
    • 2010-08-19
    • US12650498
    • 2009-12-30
    • Sung Kee Park
    • Sung Kee Park
    • H01L29/00H01L21/308H01L21/28
    • H01L21/0338H01L21/0337
    • A method of forming patterns of a semiconductor device comprises providing a semiconductor substrate comprising a first region wherein first patterns are to be formed and a second region wherein second patterns are to be formed, each of the second patterns having a wider width than the first patterns, forming an etch target layer over the semiconductor substrate, forming first etch patterns over the etch target layer of the first and second regions, forming second etch patterns on both sidewalls of each of the first etch patterns, wherein the second etch pattern formed in the second region has a wider width than the second etch pattern formed in the first region, removing the first etch patterns, forming third etch patterns over the etch target layer of the second region, the third etch pattern overlapping part of the second pattern, and etching the etch target layer using the third etch patterns and the second etch patterns as an etch mask, to form the first and second patterns.
    • 一种形成半导体器件的图形的方法包括提供一种半导体衬底,该半导体衬底包括将要形成第一图案的第一区域和要形成第二图案的第二区域,每个第二图案的宽度比第一图案宽 在所述半导体衬底上形成蚀刻目标层,在所述第一和第二区域的所述蚀刻目标层上形成第一蚀刻图案,在所述第一蚀刻图案的每个的两个侧壁上形成第二蚀刻图案,其中形成在所述第一蚀刻图案中的所述第二蚀刻图案 第二区域具有比在第一区域中形成的第二蚀刻图案宽的宽度,去除第一蚀刻图案,在第二区域的蚀刻目标层上形成第三蚀刻图案,第二蚀刻图案与第二图案重叠部分,以及蚀刻 使用第三蚀刻图案和第二蚀刻图案作为蚀刻掩模的蚀刻目标层,以形成第一和第二图案。
    • 7. 发明授权
    • Content addressable memory (CAM) devices having soft priority resolution circuits therein and methods of operating same
    • 具有软优先级分辨率电路的内容可寻址存储器(CAM)设备及其操作方法
    • US07669005B1
    • 2010-02-23
    • US10613542
    • 2003-07-03
    • Kee ParkRobert J. ProebstingScott Yu-Fan ChuMichael MillerMark Baumann
    • Kee ParkRobert J. ProebstingScott Yu-Fan ChuMichael MillerMark Baumann
    • G06F12/00
    • G11C15/00H04L45/742
    • Content addressable memory (CAM) devices use both hard and soft priority techniques to allocate entries of different priority therein. The priorities of multiple CAM array blocks within the CAM device may be programmed before or as entries are loaded therein and may be reprogrammed during operation as the allocation of entries within the CAM device changes. The allocation of entries may change in response to additions or deletions of entries or as entries are reprioritized. The CAM devices include preferred priority resolution circuits that can resolve competing soft and hard priorities between multiple hit signals that are generated in response to a search operation. Such hit signals may be active to reflect the presence of at least one matching entry within a CAM array block. The resolution of which active hit signal has the highest overall priority among many can be used to facilitate the identification of the location (e.g., array address and row address) of a highest priority matching entry within the entire CAM device. A priority resolution circuit may also resolve competing hard priorities between two or more active hit signals having equivalent soft priority. This aspect of the priority resolution circuit is provided so that an active hit signal having a highest overall priority can be resolved whenever multiple CAM array blocks having the same soft priority are detected as having matching entries therein during a search operation.
    • 内容可寻址存储器(CAM)设备使用硬和软优先级技术来分配不同优先级的条目。 CAM设备内的多个CAM阵列块的优先级可以在条目加载之前被编程,也可以在操作期间被重新编程,因为CAM设备内的条目的分配改变。 条目的分配可能会随着条目的添加或删除而变化,或者条目被重新设定为优先级。 CAM设备包括优选的优先级分辨率电路,其可以解决响应于搜索操作而产生的多个命中信号之间的竞争的软和硬优先级。 这种命中信号可以是有效的,以反映CAM阵列块内至少一个匹配条目的存在。 可以使用哪个主动命中信号具有最高总体优先级的分辨率在许多之中,以便于识别整个CAM设备内的最高优先级匹配条目的位置(例如,阵列地址和行地址)。 优先级分辨率电路还可以解决具有相同软优先级的两个或更多个激活命中信号之间的竞争硬优先级。 提供优先级分辨率电路的这个方面,使得每当具有相同软优先级的每个CAM阵列块在搜索操作期间被检测为具有匹配条目时,可以解决具有最高总优先级的主动命中信号。