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1. 发明申请

US20120062532A1 ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS 审中-公开
标题翻译：电光设备和电子设备
公开(公告)号：US20120062532A1
公开(公告)日：2012-03-15
申请号：US13320041
申请日：2010-03-11
申请人： Kenya Watanabe
发明人： Kenya Watanabe
IPC分类号： G09G5/00
CPC分类号： G09G3/3614 , G09G2310/0205 , G09G2310/0283 , G09G2310/08
摘要： The electro-optical device includes a first electrode for inverting a polarity, a second electrode opposite to the first electrode, and liquid crystals interposed between these electrodes. Before a polarity inversion timing, the scanning line driver circuit simultaneously selects two or more scanning lines of the plural scanning lines, and the data line driver circuit outputs an offset potential with the polarity opposite to that of the potential of the first electrode thereafter, to a data line. On the other hand, after the polarity inversion timing, the scanning line driver circuit individually selects each of the plural scanning lines, and the data line driver circuit outputs the data potential corresponding to the potential polarity of the first electrode thereafter, to the data line.
摘要翻译：电光装置包括用于反转极性的第一电极，与第一电极相对的第二电极和插在这些电极之间的液晶。在极性反转定时之前，扫描线驱动电路同时选择多条扫描线的两条或更多条扫描线，数据线驱动电路输出与之前的第一电极电位极性相反的偏移电位，数据线。另一方面，在极性反转定时之后，扫描线驱动电路分别选择多条扫描线中的每条扫描线，并且数据线驱动电路此后将与第一电极的电位极性对应的数据电位输出到数据线。

2. 发明申请

US20110194724A1 VIBRATING BODY FOR ACOUSTIC TRANSDUCER AND SPEAKER DEVICE 有权
标题翻译：用于声学传感器和扬声器装置的振动体
公开(公告)号：US20110194724A1
公开(公告)日：2011-08-11
申请号：US12919458
申请日：2008-02-25
申请人： Kenya Watanabe , Yoshihiro Kimura , Masanori Ito
发明人： Kenya Watanabe , Yoshihiro Kimura , Masanori Ito
IPC分类号： H04R1/00
CPC分类号： H04R9/06 , H04R3/04 , H04R7/127 , H04R7/20 , H04R9/045 , H04R2499/11
摘要： A vibrating body for an acoustic transducer is provided, in which the high resonance frequency associated with inverse resonance can be outside the audible range and which can improve the acoustic characteristic of a speaker device. The vibrating body 1 for an acoustic transducer includes: a diaphragm 2 including a first vibrating part 2a and a second vibrating part 2b formed in proximity of the outer circumferential edge of the first vibrating part 2a; and an edge portion 3 formed in proximity of the outer circumferential edge of the diaphragm 2. In the vibrating body 1 for an acoustic transducer, first reinforcing portions 6a and 6b are formed so as to extend from the second vibrating part 2b to the edge portion 3 in a radial direction.
摘要翻译：提供了一种用于声学换能器的振动体，其中与反谐振相关联的高谐振频率可以在可听范围之外并且可以改善扬声器装置的声学特性。用于声学换能器的振动体1包括：隔膜2，包括形成在第一振动部分2a的外周边缘附近的第一振动部分2a和第二振动部分2b; 以及形成在隔膜2的外周边缘附近的边缘部分3.在用于声学换能器的振动体1中，第一加强部分6a和6b形成为从第二振动部分2b延伸到边缘部分 3在径向方向。

3. 发明授权

US07292464B2 Ferroelectric memory device 失效
标题翻译：铁电存储器件
公开(公告)号：US07292464B2
公开(公告)日：2007-11-06
申请号：US11155032
申请日：2005-06-16
申请人： Kenya Watanabe
发明人： Kenya Watanabe
IPC分类号： G11C11/22
CPC分类号： G11C11/22 , G11C29/50 , G11C2029/5002
摘要： A ferroelectric memory device is characterized in having a first n-type MOS transistor having a gate connected to a word line, a ferroelectric capacitor having one end connected through the first n-type MOS transistor to a bit line, and another end connected to a plate line, and a plate line control circuit that drives the plate line, wherein the plate line control circuit includes an inverter having a first p-type MOS transistor and a second n-type MOS transistor, and an output terminal connected to the plate line, a voltage source that supplies a voltage to be supplied to a source of the first p-type MOS transistor, and a third n-type MOS transistor provided between the voltage source and the output terminal.
摘要翻译：铁电存储器件的特征在于具有连接到字线的栅极的第一n型MOS晶体管，具有通过第一n型MOS晶体管连接到位线的一端的铁电电容器，以及连接到板线和驱动板线的板线控制电路，其中所述板线控制电路包括具有第一p型MOS晶体管和第二n型MOS晶体管的反相器，以及连接到所述板线的输出端子提供要提供给第一p型MOS晶体管的源极的电压的电压源和设置在电压源和输出端子之间的第三n型MOS晶体管。

4. 发明申请

US20060114740A1 Ferroelectric memory and method of driving the same 失效
标题翻译：铁电记忆及其驱动方法
公开(公告)号：US20060114740A1
公开(公告)日：2006-06-01
申请号：US11223600
申请日：2005-09-09
申请人： Kenya Watanabe
发明人： Kenya Watanabe
IPC分类号： G11C8/00
CPC分类号： G11C11/22
摘要： A ferroelectric memory includes: a memory cell array in which a plurality of memory cells are disposed, a plurality of wordlines, a plurality of platelines, and a plurality of wordline driver circuits; each of the memory cells including a ferroelectric capacitor. A wordline driver circuit circuits includes: a driver DRV which drives a wordline WL; a transfer transistor TRA provided between the driver DRV and the wordline WL; and a gate control circuit. The gate control circuit performs gate control which causes the transfer transistor TRA to be turned on, and performs gate control which causes the transfer transistor TRA to be turned off, before a voltage of the wordline WL is boosted (before a plateline PL is driven) after the transfer transistor TRA has been turned on.
摘要翻译：铁电存储器包括：其中设置有多个存储单元的存储单元阵列，多个字线，多个板条和多个字线驱动电路; 每个存储单元包括铁电电容器。字线驱动器电路电路包括：驱动字线WL的驱动器DRV; 设置在驱动器DRV和字线WL之间的转移晶体管TRA; 和门控电路。栅极控制电路执行栅极控制，使得传输晶体管TRA导通，并且在字线WL的电压被升高之前（在驱动板线PL之前）执行导致传输晶体管TRA截止的栅极控制，在转移晶体管TRA已经导通之后。

5. 发明授权

US07002835B2 Memory cell and semiconductor memory device 失效
标题翻译：存储单元和半导体存储器件
公开(公告)号：US07002835B2
公开(公告)日：2006-02-21
申请号：US10890248
申请日：2004-07-14
申请人： Kenya Watanabe
发明人： Kenya Watanabe
IPC分类号： G11C11/22
CPC分类号： G11C11/22 , H01L2924/01079 , H01L2924/014
摘要： Aspects of the invention can prevent delay in output timing of inverted data for each of ferroelectric capacitors, there can be provided NMOSs that can electrically connect upper electrodes of the ferroelectric capacitor with a plate line and electrically connect lower electrodes of the ferroelectric capacitor with bit lines. Further there can be provided NMOSs that can electrically connect the lower electrodes of the ferroelectric capacitor with the plate line, and electrically connect the upper electrodes of the ferroelectric capacitor with bit lines.
摘要翻译：本发明的各方面可以防止每个强电介质电容器的反相数据的输出定时的延迟，可以提供可以将铁电电容器的上电极与板线电连接并将铁电电容器的下电极与位线电连接的NMOS 。此外，可以提供可以将铁电电容器的下电极与板线电连接的NMOS，并将铁电电容器的上电极与位线电连接。

6. 发明授权

US09012560B2 Rubber composition and pneumatic tire 有权
标题翻译：橡胶组合物和充气轮胎
公开(公告)号：US09012560B2
公开(公告)日：2015-04-21
申请号：US13980594
申请日：2012-03-22
申请人： Tetsuya Kunisawa , Tsuyoshi Tsuchida , Kenichi Uesaka , Isamu Tsumori , Reika Otake , Noboru Okabe , Naoya Omura , Tatsuhiro Tanaka , Takafumi Taguchi , Kenya Watanabe , Toru Iizuka
发明人： Tetsuya Kunisawa , Tsuyoshi Tsuchida , Kenichi Uesaka , Isamu Tsumori , Reika Otake , Noboru Okabe , Naoya Omura , Tatsuhiro Tanaka , Takafumi Taguchi , Kenya Watanabe , Toru Iizuka
IPC分类号： C08L19/00 , C08K3/36 , B60C1/00 , C08C19/22 , C08C19/25 , C08C19/44 , C08F230/08 , C08K5/548 , C08L9/00 , C08L9/06 , C08L15/00
CPC分类号： C08L19/006 , B60C1/00 , B60C1/0016 , C08C19/22 , C08C19/25 , C08C19/44 , C08F230/08 , C08K3/36 , C08K5/548 , C08L9/00 , C08L9/06 , C08L15/00 , Y02T10/862
摘要： The present invention provides a rubber composition that can enhance the fuel economy, wet-grip performance, and abrasion resistance in a balanced manner, and a pneumatic tire using this rubber composition. The present invention relates to a rubber composition that contains a rubber component, silica, and a silane coupling agent, wherein the rubber component contains, based on 100% by mass of the rubber component, not less than 5% by mass of a conjugated diene polymer containing a constituent unit based on a conjugated diene and a constituent unit represented by formula (I) below, at least one terminal of the polymer being modified with a specific compound; an amount of the silica is 5 to 150 parts by mass per 100 parts by mass of the rubber component; and the silane coupling agent contains a mercapto group.
摘要翻译：本发明提供了能够以均衡的方式提高燃料经济性，湿抓地性能和耐磨性的橡胶组合物，以及使用该橡胶组合物的充气轮胎。本发明涉及含有橡胶成分，二氧化硅和硅烷偶联剂的橡胶组合物，其中橡胶成分以100质量％以上的橡胶成分为基准，含有5质量％以上的共轭二烯含有基于共轭二烯的构成单元的聚合物和由下式（I）表示的结构单元，所述聚合物的至少一个末端用特定化合物改性; 相对于100质量份的橡胶成分，二氧化硅的量为5〜150质量份。硅烷偶联剂含有巯基。

7. 发明申请

US20100053142A1 ELECTRO-OPTICAL DEVICE AND ELECTRONIC DEVICE 审中-公开
标题翻译：电光器件和电子器件
公开(公告)号：US20100053142A1
公开(公告)日：2010-03-04
申请号：US12543650
申请日：2009-08-19
申请人： Kenya WATANABE
发明人： Kenya WATANABE
IPC分类号： G06F3/038
CPC分类号： G02F1/1362 , G02F1/136213 , G02F1/136286 , G02F2001/136245 , G09G3/001 , G09G3/2022 , G09G3/3648 , G09G2300/0426 , G09G2300/0439 , G09G2300/0857
摘要： An electro-optical device includes: an active element layer in which a pixel circuit including a memory circuit for storing gradation data is formed; a pixel electrode formed to overlap with the active element layer, so that an electric potential in accordance with the gradation data is supplied thereto; an electro-optical layer driven in accordance with the electric potential of the pixel electrode; and first and second power supply lines for supplying power to the memory circuit, wherein the first and second power supply lines include portions interposed between the active element layer and the pixel electrode, so that the first and second power supply lines form a capacitor.
摘要翻译：电光装置包括：有源元件层，其中形成包括用于存储灰度数据的存储电路的像素电路; 形成为与有源元件层重叠的像素电极，使得根据灰度数据提供电位; 根据像素电极的电位驱动的电光层; 以及用于向存储器电路供电的第一和第二电源线，其中第一和第二电源线包括介于有源元件层和像素电极之间的部分，使得第一和第二电源线形成电容器。

8. 发明申请

US20080129905A1 LIQUID CRYSTAL DEVICE, ACTIVE MATRIX SUBSTRATE, AND ELECTRONIC APPARATUS 有权
标题翻译：液晶装置，有源矩阵基板和电子装置
公开(公告)号：US20080129905A1
公开(公告)日：2008-06-05
申请号：US11940084
申请日：2007-11-14
申请人： Kenya WATANABE
发明人： Kenya WATANABE
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3614 , G09G2300/0434 , G09G2300/0823 , G09G2300/0857 , G09G2320/0204 , G09G2320/0247 , G09G2320/0257
摘要： A liquid crystal device includes a liquid crystal element having a first pixel electrode and a second pixel electrode which control alignment of liquid crystal molecules by applying an electric field in a direction parallel to a surface of a substrate to a liquid crystal layer, a memory circuit which is disposed in a pixel circuit and which serves as a voltage source of a first voltage and a second voltage, and an application voltage inverting circuit which is disposed in the pixel circuit and which inverts voltages applied to the liquid crystal element by controlling each of the first voltage and the second voltage so as to be supplied to either the first pixel electrode or the second pixel electrode of the liquid crystal element.
摘要翻译：液晶装置包括具有第一像素电极和第二像素电极的液晶元件，该液晶元件通过在与液晶层的表面平行的方向上施加电场来控制液晶分子的取向，存储电路其设置在像素电路中并且用作第一电压和第二电压的电压源，以及施加电压反相电路，其设置在像素电路中，并且通过控制每一个控制来反转施加到液晶元件的电压第一电压和第二电压，以便被提供给液晶元件的第一像素电极或第二像素电极。

9. 发明申请

US20050128859A1 Delay circuit, ferroelectric memory device and electronic equipment 失效
标题翻译：延迟电路，铁电存储器件和电子设备
公开(公告)号：US20050128859A1
公开(公告)日：2005-06-16
申请号：US10997820
申请日：2004-11-24
申请人： Kenya Watanabe
发明人： Kenya Watanabe
IPC分类号： G11C11/22 , G11C7/10 , G11C7/22 , G11C8/02 , G11C11/409 , G11C29/02 , G11C29/50 , H03K5/14
CPC分类号： G11C11/22 , G11C7/1051 , G11C7/106 , G11C7/22 , G11C7/222 , G11C29/02 , G11C29/023 , G11C29/028 , G11C29/50 , G11C29/50012
摘要： A delay circuit generates an output signal by delaying an input signal, and includes a ferroelectric capacitor having a first end and a second end, a means for inverting a polarization of the ferroelectric capacitor by producing an electric potential difference between the first end and the second end based on an electric potential of the input signal and a generation means for generating the output signal by delaying the input signal based on a change in an electric potential of the second end caused by the polarization inversion.
摘要翻译：延迟电路通过延迟输入信号来产生输出信号，并且包括具有第一端和第二端的铁电电容器，用于通过在第一端和第二端之间产生电位差来反转铁电电容器的极化的装置基于输入信号的电位结束;以及生成装置，用于通过基于偏振反转引起的第二端的电位变化来延迟输入信号来产生输出信号。

10. 发明申请

US20050002216A1 Ferroelectric memory device 失效
公开(公告)号：US20050002216A1
公开(公告)日：2005-01-06
申请号：US10822807
申请日：2004-04-13
申请人： Kenya Watanabe , Mitsuhiro Yamamura
发明人： Kenya Watanabe , Mitsuhiro Yamamura
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A ferroelectric memory device, in which wordlines and bitlines are hierarchized and influence of disturbance-noise is reduced, includes: first sub-wordline select switches, each of which are disposed between one of the main-wordlines and one end of one of the sub-wordlines provided for the one main-wordline; first sub-bitline select switches, each of which are disposed between one of the main-bitlines and one end of one of the sub-bitlines provided for the one main-bitline; second sub-wordline select switches, each of which are disposed between the other end of one of the sub-wordlines and the unselected wordline potential supply line; and second sub-bitline select switches, each of which are disposed between the other end of one of the sub-bitlines and the unselected bitline potential supply line, each of the first and second sub-wordline select switches and first and second sub-bitline select switches being driven independently at least in one of the sector regions.

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