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    • 2. 发明授权
    • Method and system for data transfers across different address spaces
    • 跨不同地址空间进行数据传输的方法和系统
    • US07702881B2
    • 2010-04-20
    • US11669804
    • 2007-01-31
    • Becky G. BruceMichael D. SnyderGary L. WhisenhuntKumar Gala
    • Becky G. BruceMichael D. SnyderGary L. WhisenhuntKumar Gala
    • G06F12/00
    • G06F12/0284
    • A processing device includes a first storage location configured to store a first value associated with a first address space, a second storage location configured to store a second value associated with a second address space, and a third storage location configured to store a third value associated with a third address space. The processing device further includes a memory management unit, which includes a first input configured to receive a first address value associated with a data transfer operation, a second input configured to receive an identifier associated with the data transfer operation, and an address space select module configured to identify a select value from the first value, the second value and the third value based on the identifier. The memory management module further includes an address modification module configured to generate a second address value based on the first address value and the select value.
    • 处理设备包括被配置为存储与第一地址空间相关联的第一值的第一存储位置,被配置为存储与第二地址空间相关联的第二值的第二存储位置以及被配置为存储与第二地址空间相关联的第三值的第三存储位置 具有第三个地址空间。 处理装置还包括存储器管理单元,其包括被配置为接收与数据传送操作相关联的第一地址值的第一输入,被配置为接收与数据传送操作相关联的标识符的第二输入以及地址空间选择模块 被配置为基于所述标识符从所述第一值,所述第二值和所述第三值中识别选择值。 存储器管理模块还包括地址修改模块,该地址修改模块被配置为基于第一地址值和选择值生成第二地址值。
    • 3. 发明申请
    • METHOD AND SYSTEM FOR COMMUNICATION BETWEEN NODES
    • NODES之间的通信方法和系统
    • US20080239954A1
    • 2008-10-02
    • US12053427
    • 2008-03-21
    • Harlan T. BeverlyKumar Gala
    • Harlan T. BeverlyKumar Gala
    • G01R31/08
    • H04L29/12254H04L61/2038H04L67/02
    • A method of communicating with a network interface includes providing a packet to the network interface, where the packet includes an address field indicating a destination of the packet. The network interface analyzes the address field, and determines if it reflects an address associated with the network interface. If not, the network interface provides the packet to a network. If the network interface determines the address field reflects an address associated with the interface, it provides information in the packet to an application executing at the network interface. Accordingly, information targeted to an application can be communicated by associating an address, such as a network address, with the network interface, allowing for communication of the information without extensive processing of each packet at the interface.
    • 与网络接口通信的方法包括向网络接口提供分组,其中分组包括指示分组的目的地的地址字段。 网络接口分析地址字段,并确定它是否反映与网络接口相关联的地址。 如果没有,则网络接口将数据包提供给网络。 如果网络接口确定地址字段反映与该接口相关联的地址,则它将数据包中的信息提供给在网络接口上执行的应用程序。 因此,可以通过将诸如网络地址的地址与网络接口相关联来传送针对应用的信息,从而允许信息的通信,而不在接口处对每个分组进行广泛的处理。
    • 6. 发明申请
    • INTERPROCESSOR MESSAGE TRANSMISSION VIA COHERENCY-BASED INTERCONNECT
    • 通过基于互连的互联互通信息传输
    • US20080222389A1
    • 2008-09-11
    • US11682867
    • 2007-03-06
    • Becky G. BruceSanjay R. DeshpandeMichael D. SnyderGary L. WhisenhuntKumar Gala
    • Becky G. BruceSanjay R. DeshpandeMichael D. SnyderGary L. WhisenhuntKumar Gala
    • G06F15/76
    • G06F15/16G06F9/546G06F12/0833
    • A method includes communicating a first message between processors of a multiprocessor system via a coherency interconnect, whereby the first message includes coherency information. The method further includes communicating a second message between processors of the multiprocessor system via the coherency interconnect, whereby the second message includes interprocessor message information. A system includes a coherency interconnect and a processor. The processor includes an interface configured to receive messages from the coherency interconnect, each message including one of coherency information or interprocessor message information. The processor further includes a coherency management module configured to process coherency information obtained from at least one of the messages and an interrupt controller configured to generate an interrupt based on interprocessor message information obtained from at least one of the messages.
    • 一种方法包括经由一致性互连在多处理器系统的处理器之间传送第一消息,由此第一消息包括一致性信息。 该方法还包括经由一致性互连在多处理器系统的处理器之间传送第二消息,由此第二消息包括处理器间消息信息。 系统包括一致性互连和处理器。 处理器包括被配置为从一致性互连接收消息的接口,每个消息包括一致性信息或处理器间消息信息之一。 该处理器还包括一个相关性管理模块,被配置为处理从至少一个消息获得的一致性信息,以及中断控制器,该中断控制器被配置为基于从至少一个消息获得的处理器间消息信息生成中断。
    • 7. 发明申请
    • METHOD AND SYSTEM FOR DATA TRANSFERS ACROSS DIFFERENT ADDRESS SPACES
    • 用于不同地址空间的数据传输的方法和系统
    • US20080183943A1
    • 2008-07-31
    • US11669804
    • 2007-01-31
    • Becky G. BruceMichael D. SnyderGary L. WhisenhuntKumar Gala
    • Becky G. BruceMichael D. SnyderGary L. WhisenhuntKumar Gala
    • G06F12/02
    • G06F12/0284
    • A processing device includes a first storage location configured to store a first value associated with a first address space, a second storage location configured to store a second value associated with a second address space, and a third storage location configured to store a third value associated with a third address space. The processing device further includes a memory management unit, which includes a first input configured to receive a first address value associated with a data transfer operation, a second input configured to receive an identifier associated with the data transfer operation, and an address space select module configured to identify a select value from the first value, the second value and the third value based on the identifier. The memory management module further includes an address modification module configured to generate a second address value based on the first address value and the select value.
    • 处理设备包括被配置为存储与第一地址空间相关联的第一值的第一存储位置,被配置为存储与第二地址空间相关联的第二值的第二存储位置以及被配置为存储与第二地址空间相关联的第三值的第三存储位置 具有第三个地址空间。 处理装置还包括存储器管理单元,其包括被配置为接收与数据传送操作相关联的第一地址值的第一输入,被配置为接收与数据传送操作相关联的标识符的第二输入以及地址空间选择模块 被配置为基于所述标识符从所述第一值,所述第二值和所述第三值中识别选择值。 存储器管理模块还包括地址修改模块,该地址修改模块被配置为基于第一地址值和选择值生成第二地址值。
    • 8. 发明授权
    • Method and system for communication between nodes
    • 节点之间通信的方法和系统
    • US08687487B2
    • 2014-04-01
    • US12053427
    • 2008-03-21
    • Harlan T. BeverlyKumar Gala
    • Harlan T. BeverlyKumar Gala
    • H04J1/16H04J3/14
    • H04L29/12254H04L61/2038H04L67/02
    • A method of communicating with a network interface includes providing a packet to the network interface, where the packet includes an address field indicating a destination of the packet. The network interface analyzes the address field, and determines if it reflects an address associated with the network interface. If not, the network interface provides the packet to a network. If the network interface determines the address field reflects an address associated with the interface, it provides information in the packet to an application executing at the network interface. Accordingly, information targeted to an application can be communicated by associating an address, such as a network address, with the network interface, allowing for communication of the information without extensive processing of each packet at the interface.
    • 与网络接口通信的方法包括向网络接口提供分组,其中分组包括指示分组的目的地的地址字段。 网络接口分析地址字段,并确定它是否反映与网络接口相关联的地址。 如果没有,则网络接口将数据包提供给网络。 如果网络接口确定地址字段反映与该接口相关联的地址,则它将数据包中的信息提供给在网络接口上执行的应用程序。 因此,可以通过将诸如网络地址的地址与网络接口相关联来传送针对应用的信息,从而允许信息的通信,而不在接口处对每个分组进行广泛的处理。
    • 9. 发明授权
    • Interprocessor message transmission via coherency-based interconnect
    • 通过基于相干性互连的处理器间消息传输
    • US07941499B2
    • 2011-05-10
    • US11682867
    • 2007-03-06
    • Becky G. BruceSanjay R. DeshpandeMichael D. SnyderGary L. WhisenhuntKumar Gala
    • Becky G. BruceSanjay R. DeshpandeMichael D. SnyderGary L. WhisenhuntKumar Gala
    • G06F15/167
    • G06F15/16G06F9/546G06F12/0833
    • A method includes communicating a first message between processors of a multiprocessor system via a coherency interconnect, whereby the first message includes coherency information. The method further includes communicating a second message between processors of the multiprocessor system via the coherency interconnect, whereby the second message includes interprocessor message information. A system includes a coherency interconnect and a processor. The processor includes an interface configured to receive messages from the coherency interconnect, each message including one of coherency information or interprocessor message information. The processor further includes a coherency management module configured to process coherency information obtained from at least one of the messages and an interrupt controller configured to generate an interrupt based on interprocessor message information obtained from at least one of the messages.
    • 一种方法包括经由一致性互连在多处理器系统的处理器之间传送第一消息,由此第一消息包括一致性信息。 该方法还包括经由一致性互连在多处理器系统的处理器之间传送第二消息,由此第二消息包括处理器内消息信息。 系统包括一致性互连和处理器。 处理器包括被配置为从一致性互连接收消息的接口,每个消息包括一致性信息或处理器间消息信息之一。 该处理器还包括一个相关性管理模块,被配置为处理从至少一个消息获得的一致性信息,以及中断控制器,该中断控制器被配置为基于从至少一个消息获得的处理器间消息信息来生成中断。