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1. 发明授权

US08861660B2 Digital data-aided frequency offset estimation 有权
标题翻译：数字数据辅助频偏估计
公开(公告)号：US08861660B2
公开(公告)日：2014-10-14
申请号：US13645761
申请日：2012-10-05
申请人： MStar Semiconductor, Inc. , MStar Semiconductor, Inc. , MStar Software R&R (Shenzhen) Ltd.
发明人： Mark Murphy , Craig Edward Burnet , Cyril Valadon
IPC分类号： H04L1/00 , H04L1/02
CPC分类号： H04L27/0014 , H04L27/2657 , H04L27/2671 , H04L27/2675 , H04L27/2695 , H04L2027/0046 , H04L2027/0055 , H04L2027/0065 , H04L2027/0089
摘要： Techniques are provided herein for digital data-aided frequency offset estimation offering better performance and increased accuracy over existing solutions. These new techniques also allow a trade-off between complexity and accuracy to be performed. The embodiments of the techniques for frequency offset estimation can be used for correction in both feedback and feed-forward control.
摘要翻译：本文提供了用于数字数据辅助频偏估计的技术，可以提供比现有解决方案更好的性能和更高的精度。这些新技术还允许执行复杂性和准确性之间的折衷。用于频率偏移估计的技术的实施例可以用于反馈和前馈控制中的校正。

2. 发明授权

US09356766B2 Enabling half duplex frequency division duplex (HD-FDD) operation of user equipments in full duplex frequency division duplex (FD-FDD) network 有权
标题翻译：在全双工分频双工（FD-FDD）网络中启用用户设备的半双工分频双工（HD-FDD）操作
公开(公告)号：US09356766B2
公开(公告)日：2016-05-31
申请号：US13669744
申请日：2012-11-06
申请人： MSTAR SEMICONDUCTOR, INC. (CAYMAN ISLANDS) , MStar Software R&D (Shenzhen) Ltd. , MStar Semiconductor, Inc.
发明人： Francesc Boixadera , Cyril Valadon
IPC分类号： H04J1/00 , H04L5/16 , H04W24/02 , H04W48/10 , H04W28/18 , H04W84/18 , H04W72/04 , H04L5/00 , H04L5/14
CPC分类号： H04L5/16 , H04L5/0007 , H04L5/0053 , H04L5/0091 , H04L5/1469 , H04W24/02 , H04W28/18 , H04W48/10 , H04W72/0486 , H04W84/18
摘要： The current invention provides simplifications to the user equipment (UE) radio front end module for the cellular handset or dongle through modification of the existing 3GPP specifications for LTE and WCDMA/HSPA+ in order to support half duplex (HD) operation. The option to support HD operation is provided without mandating upgrades to all existing base stations that have already been deployed. The instant invention further prevents HD UEs from attaching to any base stations which do not support HD operations. The instant invention further provides inter-frequency cell search periods for enabling HD UEs to communicate with any base stations/cells supporting the HD operations. The instant invention further enables the HSPA+ system to support the HD-FDD mode.
摘要翻译：本发明通过修改用于LTE和WCDMA / HSPA +的现有3GPP规范来为蜂窝手机或加密狗的用户设备（UE）无线电前端模块提供简化，以便支持半双工（HD）操作。提供支持高清操作的选项，而不需要对已经部署的所有现有基站进行升级。本发明进一步防止HD UE附着到不支持HD操作的任何基站。本发明还提供跨频率小区搜索周期，以使得HD UE能够与支持HD操作的任何基站/小区进行通信。本发明还使HSPA +系统能够支持HD-FDD模式。

3. 发明授权

US09166475B2 Voltage regulator with fast and slow switching control 有权
标题翻译：电压调节器具有快速和慢速的开关控制
公开(公告)号：US09166475B2
公开(公告)日：2015-10-20
申请号：US13623969
申请日：2012-09-21
申请人： MStar Semiconductor, Inc. , MStar Semiconductor, Inc. , MStar Software R&D (Shenzhen) Ltd.
发明人： Simon George-Kelso , Francesc Boixadera
IPC分类号： G05F1/46 , H02M3/156 , G05F1/10 , H02M1/00
CPC分类号： H02M3/156 , G05F1/10 , G05F1/46 , H02M2001/0032 , Y02B70/16
摘要： Techniques are provided that can extend the efficiency of a switching regulator further into the low current region by making use of the available knowledge on predictable load variations and voltage ripple tolerance across different states, providing improved efficiency and reducing total current consumption. The load current requirement in low power states is provided using switch mode rather than linear regulation, the switch mode operation being controlled by a mode dependent control circuit so as to minimize the energy cost of the switching operation in each mode and thus obtain improved efficiency from the power source.
摘要翻译：提供了通过利用关于不同状态下的可预测负载变化和电压纹波耐受性的可用知识，可以进一步将开关调节器的效率进一步扩展到低电流区域的技术，从而提供改进的效率并降低总电流消耗。低功耗状态下的负载电流要求是采用开关模式而不是线性调节方式提供的，开关模式操作由模式相关的控制电路控制，从而最大程度地降低各模式下开关操作的能源成本，从而从电源。

4. 发明申请

US20140072020A1 DIGITAL DATA-AIDED FREQUENCY OFFSET ESTIMATION 有权
标题翻译：数字数据辅助频偏估计
公开(公告)号：US20140072020A1
公开(公告)日：2014-03-13
申请号：US13645761
申请日：2012-10-05
申请人： MSTAR SEMICONDUCTOR, INC. , MSTAR SEMICONDUCTOR, INC. , MSTAR SOFTWARE R&D (SHENZHEN) LTD.
发明人： Mark Murphy , Craig Edward Burnet , Cyril Valadon
IPC分类号： H04B17/00
CPC分类号： H04L27/0014 , H04L27/2657 , H04L27/2671 , H04L27/2675 , H04L27/2695 , H04L2027/0046 , H04L2027/0055 , H04L2027/0065 , H04L2027/0089
摘要： Techniques are provided herein for digital data-aided frequency offset estimation offering better performance and increased accuracy over existing solutions. These new techniques also allow a trade-off between complexity and accuracy to be performed. The embodiments of the techniques for frequency offset estimation can be used for correction in both feedback and feed-forward control.
摘要翻译：本文提供了用于数字数据辅助频偏估计的技术，可以提供比现有解决方案更好的性能和更高的精度。这些新技术还允许执行复杂性和准确性之间的折衷。用于频率偏移估计的技术的实施例可以用于反馈和前馈控制中的校正。

5. 发明授权

US09448967B2 Stream data processor 有权
标题翻译：流数据处理器
公开(公告)号：US09448967B2
公开(公告)日：2016-09-20
申请号：US13687102
申请日：2012-11-28
申请人： MStar Semiconductor, Inc. , MStar Semiconductor, Inc. , MStar Software R&D (Shenzhen) Ltd.
发明人： Wolfgang Kuechler
IPC分类号： G06F13/00 , G06F15/80
CPC分类号： G06F15/8015
摘要： Techniques are provided aimed at improving the flexibility and reducing the area and power consumption of digital baseband integrated circuits by using stream data processor based modem architecture. Semiconductor companies offering baseband ICs for handsets, face the challenges of improving die size efficiency, power efficiency, performance, time to market, and coping with evolving standards. Software defined radio based implementations offer a fast time to market. Dedicated hardware designs give the best die size and power efficiency. To combine the advantages of dedicated hardware with the advantages of conventional software defined radio solutions the stream data processor is partitioned into a stream processor unit, which implements processing functions in dedicated hardware and is hence die size and power efficient, and a flexible stream control unit which may be software defined to minimize the time to market of the product.
摘要翻译：提供了旨在通过使用基于流数据处理器的调制解调器架构来提高数字基带集成电路的灵活性和减小面积和功耗的技术。为手机提供基带IC的半导体公司面临着提高芯片尺寸效率，电源效率，性能，上市时间以及应对不断变化的标准的挑战。基于软件定义的基于无线电的实施提供了快速的上市时间专用硬件设计提供最佳的裸片尺寸和功率效率。为了将专用硬件的优点与常规软件定义的无线电解决方案的优点相结合，流数据处理器被划分为流处理器单元，其实现专用硬件中的处理功能，因此具有芯片尺寸和功率效率，以及灵活的流控制单元这可能是软件定义的，以最小化产品的上市时间。

6. 发明申请

US20140123148A1 STREAM DATA PROCESSOR 有权
标题翻译：流数据处理器
公开(公告)号：US20140123148A1
公开(公告)日：2014-05-01
申请号：US13687102
申请日：2012-11-28
申请人： MSTAR SEMICONDUCTOR, INC. , MSTAR SEMICONDUCTOR, INC. , MSTAR SOFTWARE R&D (SHENZHEN) LTD.
发明人： Wolfgang Kuechler
IPC分类号： G06F9/46
CPC分类号： G06F15/8015
摘要： Techniques are provided aimed at improving the flexibility and reducing the area and power consumption of digital baseband integrated circuits by using stream data processor based modem architecture. Semiconductor companies offering baseband ICs for handsets, face the challenges of improving die size efficiency, power efficiency, performance, time to market, and coping with evolving standards. Software defined radio based implementations offer a fast time to market. Dedicated hardware designs give the best die size and power efficiency. To combine the advantages of dedicated hardware with the advantages of conventional software defined radio solutions the stream data processor is partitioned into a stream processor unit, which implements processing functions in dedicated hardware and is hence die size and power efficient, and a flexible stream control unit which may be software defined to minimise the time to market of the product.
摘要翻译：提供了旨在通过使用基于流数据处理器的调制解调器架构来提高数字基带集成电路的灵活性和减小面积和功耗的技术。为手机提供基带IC的半导体公司面临着提高芯片尺寸效率，电源效率，性能，上市时间以及应对不断变化的标准的挑战。基于软件定义的基于无线电的实施提供了快速的上市时间。专用硬件设计可提供最佳的裸片尺寸和功率效率。为了将专用硬件的优点与常规软件定义的无线电解决方案的优点相结合，流数据处理器被划分为流处理器单元，其实现专用硬件中的处理功能，因此具有芯片尺寸和功率效率，以及灵活的流控制单元这可能是软件定义的，以最小化产品的上市时间。

7. 发明申请

US20140015505A1 Efficient Energy Use in Low Power Products 有权
标题翻译：低功耗产品的高效能源使用
公开(公告)号：US20140015505A1
公开(公告)日：2014-01-16
申请号：US13623969
申请日：2012-09-21
申请人： MSTAR SEMICONDUCTOR, INC. , MSTAR SEMICONDUCTOR, INC. , MSTAR SOFTWARE R&D (SHENZHEN) LTD.
发明人： Simon George-Kelso , Francesc Boixadera
IPC分类号： G05F1/46
CPC分类号： H02M3/156 , G05F1/10 , G05F1/46 , H02M2001/0032 , Y02B70/16
摘要： Techniques are provided that can extend the efficiency of a switching regulator further into the low current region by making use of the available knowledge on predictable load variations and voltage ripple tolerance across different states, providing improved efficiency and reducing total current consumption. The load current requirement in low power states is provided using switch mode rather than linear regulation, the switch mode operation being controlled by a mode dependent control circuit so as to minimize the energy cost of the switching operation in each mode and thus obtain improved efficiency from the power source.
摘要翻译：提供了通过利用关于不同状态下的可预测负载变化和电压纹波耐受性的可用知识，可以进一步将开关调节器的效率进一步扩展到低电流区域的技术，从而提供改进的效率并降低总电流消耗。低功耗状态下的负载电流要求是采用开关模式而不是线性调节方式提供的，开关模式操作由模式相关的控制电路控制，从而最大程度地降低各模式下开关操作的能源成本，从而从电源。

8. 发明授权

US10777147B2 Display device and corresponding regional dimming driving method 有权
公开(公告)号：US10777147B2
公开(公告)日：2020-09-15
申请号：US16189298
申请日：2018-11-13
申请人： MStar Semiconductor, Inc.
发明人： Hui Wu
IPC分类号： G09G5/10 , G09G3/34 , G09G3/20 , G02F1/13357
摘要： A regional dimming driving method for a display device is provided. The display device includes multiple backlight sources respectively corresponding to multiple display regions of the display device. The regional dimming driving method includes acquiring a brightness value of each display region according to input image data, processing and adjusting the brightness value of each display region to acquire an adjusted brightness value of regional dimming of each display region, and respectively driving the backlight sources according to the adjusted brightness values of regional dimming of the corresponding display regions. By processing and adjusting the brightness values of the display regions, display effects can be effectively provided.

9. 发明授权

US10598776B2 Method for determining sampling phase of sampling clock signal and associated electronic device 有权
公开(公告)号：US10598776B2
公开(公告)日：2020-03-24
申请号：US15639049
申请日：2017-06-30
申请人： MStar Semiconductor, Inc.
发明人： Ming-Han Weng , Wei-Yung Wang , Chih-Hung Lin , Jyun Yang Shih , Chun-Chia Chen
IPC分类号： H03K5/135 , H03K5/151 , H03L7/08 , H03L7/091 , G01S13/28 , H04N7/18 , G11C7/22
摘要： An electronic device includes a clock generating circuit, a receiving circuit and a training circuit. The clock generating circuit generates a sampling clock signal, a phase-early sampling clock signal and a phase-late sampling clock signal. The receiving circuit samples received data according to the sampling clock signal, the phase-early sampling clock signal and the phase-late sampling clock signal to generate a sample result. The training circuit controls the clock generating circuit to generate the sampling clock signal and the corresponding phase-early sampling clock signal and phase-late sampling clock signal that have different phases in a plurality of different time intervals, respectively, to cause the receiving circuit to generate a plurality of sample results. The training circuit further determines a sampling phase of the sampling clock signal according to the sample results.

10. 发明申请

US20190327442A1 DISPLAY APPARATUS AND SIGNAL PROCESSING METHOD THEREOF 审中-公开
公开(公告)号：US20190327442A1
公开(公告)日：2019-10-24
申请号：US16011711
申请日：2018-06-19
申请人： MStar Semiconductor, Inc.
发明人： Fu-Min LU , Chin-Yi HUANG , Cheng-Che HSU
IPC分类号： H04N5/91 , H04N5/262 , G06T1/20 , H04N21/472 , H04L25/03
摘要： A display apparatus includes a video processor, a graphics processor, a combining circuit, a retrieving circuit and a graphics controller. The video processor process target video information and generates a corresponding video signal. The graphics processor processes graphic data and generates a corresponding graphic signal. When the target video data changes from first video data to second video data, the retrieving circuit retrieves a static picture associated with the first video data and accordingly generates a retrieval result. The graphics controller utilizes the retrieval result as graphic data provided to the graphics processor. The combining circuit combines the graphic signal on the video signal to generate an output video signal.

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