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1. 发明授权

US08310039B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08310039B2
公开(公告)日：2012-11-13
申请号：US13227065
申请日：2011-09-07
申请人： Masaya Kawano
发明人： Masaya Kawano
IPC分类号： H01L23/48
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/11 , H01L2224/05001 , H01L2224/05009 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/13099 , H01L2224/16 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/10329 , H01L2924/13091 , H01L2924/19043 , H01L2924/30105 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor device having a through electrode excellent in performance as for an electrode and manufacturing stability is provided. There is provided a through electrode composed of a conductive small diameter plug and a conductive large diameter plug on a semiconductor device. A cross sectional area of the small diameter plug is made larger than a cross sectional area and a diameter of a connection plug, and is made smaller than a cross sectional area and a diameter of the large diameter plug. In addition, a protruding portion formed in such a way that the small diameter plug is projected from the silicon substrate is put into an upper face of the large diameter plug. Further, an upper face of the small diameter plug is connected to a first interconnect.
摘要翻译：提供一种具有电极性能优良的通电极和制造稳定性的半导体装置。在半导体器件上设置有由导电性小直径插头和导电性大直径插头构成的贯通电极。小直径插头的横截面面积大于连接插头的横截面积和直径，并且被制成小于大直径插头的横截面面积和直径。此外，将形成为使得小直径插头从硅衬底突出的方式形成的突出部分放入大直径插头的上表面。此外，小直径插头的上表面连接到第一互连。

2. 发明授权

US08304915B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08304915B2
公开(公告)日：2012-11-06
申请号：US13055372
申请日：2009-07-23
申请人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
发明人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H05K1/185 , H01L23/5389 , H01L24/19 , H01L2224/04105 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01057 , H01L2924/01058 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/3511 , H05K1/115 , H05K3/4644 , H05K2201/0352 , H05K2201/10674 , H05K2203/0152 , H05K2203/0156 , H05K2203/063 , H05K2203/1469 , H01L2924/00
摘要： A semiconductor device includes a plural number of interconnects and a plural number of vias are stacked. A semiconductor element is enclosed in an insulation layer. At least one of the vias provided in insulation layers and/or at least one of interconnects provided in the interconnect layers are of cross-sectional shapes different from those of the vias formed in another one of the insulation layers and/or interconnects provided in another one of the interconnect layers.
摘要翻译：半导体器件包括多个互连件，并且堆叠多个通孔。半导体元件封装在绝缘层中。提供在绝缘层中的至少一个通孔和/或设置在互连层中的至少一个互连件的横截面形状与在另一个绝缘层中提供的另一个绝缘层和/或互连中形成的通孔的截面形状不同互连层之一。

3. 发明申请

US20120211872A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20120211872A1
公开(公告)日：2012-08-23
申请号：US13461230
申请日：2012-05-01
申请人： Masaya KAWANO , Koji SOEJIMA , Nobuaki TAKAHASHI
发明人： Masaya KAWANO , Koji SOEJIMA , Nobuaki TAKAHASHI
IPC分类号： H01L23/522
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/13 , H01L2224/13025 , H01L2224/14181
摘要： A falling off of a through electrode is inhibited without decreasing a reliability of a semiconductor device including a through electrode. A semiconductor device 100 includes: a silicon substrate 101; a through electrode 129 extending through the silicon substrate 101; and a first insulating ring 130 provided in a circumference of a side surface of the through electrode 129 and extending through the semiconductor substrate 101. In addition, the semiconductor device 100 also includes a protruding portion 146, being provided at least in the vicinity of a back surface of a device-forming surface of the semiconductor substrate 101 so as to contact with the through electrode 129, and protruding in a direction along the surface of the semiconductor substrate 101 toward an interior of the through electrode 129.
摘要翻译：在不降低包括通孔的半导体器件的可靠性的情况下，抑制穿通电极的脱落。半导体器件100包括：硅衬底101; 穿过硅衬底101的通孔电极129; 以及设置在贯通电极129的侧面的周围并延伸穿过半导体基板101的第一绝缘环130.此外，半导体器件100还包括突出部分146，其设置在至少在半导体衬底101的器件形成表面的背表面与通孔129接触，并沿着半导体衬底101的表面朝向通孔129的内部突出。

4. 发明申请

US20120100715A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THROUGH ELECTRODE 审中-公开
标题翻译：制造包括电极的半导体器件的方法
公开(公告)号：US20120100715A1
公开(公告)日：2012-04-26
申请号：US13331640
申请日：2011-12-20
申请人： Nobuaki TAKAHASHI , Masahiro KOMURO , Koji SOEJIMA , Satoshi MATSUI , Masaya KAWANO
发明人： Nobuaki TAKAHASHI , Masahiro KOMURO , Koji SOEJIMA , Satoshi MATSUI , Masaya KAWANO
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/12 , H01L2224/0401 , H01L2224/05001 , H01L2224/0554 , H01L2224/06181 , H01L2224/1147 , H01L2224/11472 , H01L2224/11901 , H01L2224/13009 , H01L2224/13025 , H01L2224/13099 , H01L2224/131 , H01L2224/14181 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04953 , H01L2924/10329 , H01L2924/00014
摘要： The present invention provides a semiconductor device including at least one of an insulating layer and a semiconductor layer each including a hole formed therein, and a through electrode provided in the hole. In the semiconductor device, the side wall of the hole is constituted of a first region from the opening of the hole to a predetermined position between the opening of the hole and the bottom surface of the hole, and a second region from the predetermined position to the bottom surface of the hole. The through electrode includes a seed layer and a plating layer. The seed layer covers the second region and the bottom surface of the hole without covering the first region. In addition, the plating layer covers the seed layer and at least a part of the first region.
摘要翻译：本发明提供一种半导体器件，其包括绝缘层和各自包括形成在其中的孔的半导体层中的至少一个，以及设置在孔中的通孔。在半导体装置中，孔的侧壁由从孔的开口到孔的开口部与孔的底面之间的规定位置的第一区域和从规定位置到第二区域孔的底面。通孔包括种子层和镀层。种子层覆盖孔的第二区域和底部表面而不覆盖第一区域。此外，电镀层覆盖种子层和第一区域的至少一部分。

5. 发明授权

US08035231B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08035231B2
公开(公告)日：2011-10-11
申请号：US12114238
申请日：2008-05-02
申请人： Yoichiro Kurita , Masaya Kawano , Koji Soejima
发明人： Yoichiro Kurita , Masaya Kawano , Koji Soejima
IPC分类号： H01L23/48
CPC分类号： H01L23/3128 , H01L21/563 , H01L21/6835 , H01L23/481 , H01L23/49816 , H01L23/49822 , H01L24/81 , H01L25/0655 , H01L25/0657 , H01L2221/68345 , H01L2221/68359 , H01L2221/68363 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/81005 , H01L2224/8121 , H01L2224/81815 , H01L2224/83005 , H01L2224/83051 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06572 , H01L2225/06582 , H01L2225/06586 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/18161 , H01L2924/19041 , H05K3/4644 , H05K3/4676 , H05K3/4688 , Y10T29/4913 , H01L2924/00 , H01L2224/0401
摘要： The semiconductor device 1 includes interconnect layers 10, 20, an IC chip 30, via plugs 42, 44, a seal resin 50, and solder balls 60. The interconnect layer 10 includes a via plug 42. An end face of the via plug 42 on the side of the interconnect layer 20 is smaller in area than the opposite end face, i.e. the end face on the side of the IC chip 30. An end face of the via plug 44 on the side of the interconnect layer 10 is smaller in area than the opposite end face, i.e. the end face on the side of the solder balls 60. The thermal decomposition temperature of the insulating resin 14 constituting the interconnect layer 10 is higher than that of the insulating resin 24 constituting the interconnect layer 20.
摘要翻译：半导体器件1包括互连层10,20，IC芯片30，经由插头42,44，密封树脂50和焊球60.互连层10包括通孔塞42.通孔插塞42的端面在互连层20一侧的面积比相对端面即IC芯片30一侧的端面的面积小。在互连层10一侧的通路插塞44的端面较小构成互连层10的绝缘树脂14的热分解温度高于构成互连层20的绝缘树脂24的热分解温度。

6. 发明申请

US20110147058A1 ELECTRONIC DEVICE AND METHOD OF MANUFACTURING ELECTRONIC DEVICE 审中-公开
标题翻译：电子设备及制造电子设备的方法
公开(公告)号：US20110147058A1
公开(公告)日：2011-06-23
申请号：US12973162
申请日：2010-12-20
申请人： Masaya KAWANO , Koji SOEJIMA
发明人： Masaya KAWANO , Koji SOEJIMA
IPC分类号： H05K1/09 , H05K1/18 , H05K3/10
CPC分类号： H05K3/4682 , H01L21/4846 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H05K3/205 , H05K3/4644 , H05K3/4647 , H05K2201/09481 , H05K2201/09563 , H05K2201/096 , H05K2201/09781 , H05K2201/10545 , H05K2201/10674 , Y10T29/49155 , H01L2924/00
摘要： A multilayer wiring substrate has a configuration in which a first wiring layer including a plurality of first conductive members formed in a first insulating film, and formed to be exposed at a second surface side, and a second wiring layer including a plurality of second conductive members formed in a second insulating film which is formed on a first surface side on the side opposite to the second surface are laminated. The plurality of second conductive members is respectively connected directly to any of the plurality of first conductive members or connected through a different conductive material. The plurality of first conductive members is connected directly to any of the plurality of second conductive members or connected through a different conductive material, but includes dummy conductive members which do not form current pathways connecting with connected second conductive member.
摘要翻译：多层布线基板具有这样的构造，其中，第一布线层包括形成在第一绝缘膜中并形成为在第二表面侧露出的多个第一导电部件和包括多个第二导电部件的第二布线层形成在形成在与第二表面相对的一侧上的第一表面侧上的第二绝缘膜中。多个第二导电构件分别直接连接到多个第一导电构件中的任一个或通过不同的导电材料连接。多个第一导电构件直接连接到多个第二导电构件中的任一个或通过不同的导电材料连接，但是包括不形成与连接的第二导电构件连接的电流路径的虚拟导电构件。

7. 发明授权

US07928001B2 Electronic device and method of manufacturing the same 有权
标题翻译：电子设备及其制造方法
公开(公告)号：US07928001B2
公开(公告)日：2011-04-19
申请号：US11865750
申请日：2007-10-02
申请人： Yoichiro Kurita , Koji Soejima , Masaya Kawano
发明人： Yoichiro Kurita , Koji Soejima , Masaya Kawano
IPC分类号： H01L21/4763
CPC分类号： H01L23/3128 , H01L21/4857 , H01L21/6835 , H01L23/3135 , H01L23/5389 , H01L25/0652 , H01L25/18 , H01L2221/68345 , H01L2224/0554 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81005 , H01L2224/83005 , H01L2225/06565 , H01L2924/00014 , H01L2924/01079 , H01L2924/09701 , H01L2924/15192 , H01L2924/15311 , H01L2924/15321 , H01L2924/18161 , H01L2924/19041 , H01L2924/19105 , H05K3/0058 , H05K3/284 , H05K3/4682 , H05K2201/0195 , H05K2201/09527 , H05K2201/096 , H05K2201/09972 , H05K2203/016 , H05K2203/0733 , H05K2203/1469 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： The electronic device includes a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the lower surface of the first interconnect layer. The first interconnect layer includes a via plug (first conductive plug). An end face of the via plug on the side of the second interconnect layer is smaller in area than the opposite end face. The via plug is exposed on the surface of the first interconnect layer facing the second interconnect layer. An insulating resin forming the first interconnect layer is higher in thermal decomposition temperature than an insulating resin forming the second interconnect layer.
摘要翻译：电子设备包括第一互连层和第二互连层。第二互连层设置在第一互连层的下表面上。第一互连层包括通孔插头（第一导电插头）。通孔塞在第二互连层一侧的端面的面积小于相对端面。通孔插头暴露在面向第二互连层的第一互连层的表面上。形成第一互连层的绝缘树脂的热分解温度高于形成第二互连层的绝缘树脂。

8. 发明授权

US07898073B2 Semiconductor device and semiconductor module employing thereof 有权
标题翻译：半导体装置及其半导体模块
公开(公告)号：US07898073B2
公开(公告)日：2011-03-01
申请号：US12820478
申请日：2010-06-22
申请人： Satoshi Matsui , Masaya Kawano
发明人： Satoshi Matsui , Masaya Kawano
IPC分类号： H01L23/04
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/585 , H01L24/05 , H01L2224/0401 , H01L2224/05009 , H01L2224/05551 , H01L2224/05552 , H01L2224/05553 , H01L2224/05555 , H01L2224/13025 , H01L2224/14181 , H01L2224/16 , H01L2224/16146 , H01L2224/16225 , H01L2225/06513
摘要： A semiconductor device is provided with a silicon substrate and a structure filled in a through hole that has a rectangular cross section and extends through the silicon substrate. The structure comprises a pipe-shaped through electrode, stripe-shaped through electrodes, silicons, a first insulating film, a second insulating film and a third insulating film. The pipe-shaped through electrode is utilized as a pipe-shaped electric conductor that extends through the silicon substrate. In addition, the stripe-shaped through electrodes are provided in the interior of the pipe-shaped through electrode so that the stripe-shaped through electrodes extend through the silicon substrate and is spaced away from the pipe-shaped through electrode. A plurality of through electrodes are provided in substantially parallel within the inner region of the pipe-shaped through electrode.
摘要翻译：半导体器件设置有硅衬底和填充有通孔的结构，其具有矩形横截面并延伸穿过硅衬底。该结构包括管状贯通电极，条形穿通电极，硅，第一绝缘膜，第二绝缘膜和第三绝缘膜。管状贯通电极用作延伸穿过硅衬底的管状电导体。此外，条状贯通电极设置在管状贯通电极的内部，使得条状贯通电极延伸穿过硅衬底并与管状通电极间隔开。多个贯通电极大致平行地设置在管状贯通电极的内部区域内。

9. 发明申请

US20100297811A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100297811A1
公开(公告)日：2010-11-25
申请号：US12853660
申请日：2010-08-10
申请人： Masaya KAWANO , Koji SOEJIMA , Yoichiro KURITA
发明人： Masaya KAWANO , Koji SOEJIMA , Yoichiro KURITA
IPC分类号： H01L21/50 , H01L21/768
CPC分类号： H05K3/423 , H01L21/4846 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2221/68345 , H01L2224/16145 , H01L2224/16225 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06586 , H01L2924/00014 , H01L2924/01078 , H01L2924/10253 , H01L2924/15173 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2924/3011 , H01L2924/3025 , H05K1/113 , H05K1/114 , H05K3/025 , H05K3/064 , H05K2203/016 , H05K2203/0733 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method of manufacturing according to an embodiment of the present invention includes forming a seed metal layer 20a on a supporting substrate 70, forming an interconnect layer 10 including an interconnect 18 on the seed metal layer 20a, removing the supporting substrate 70 after forming the interconnect layer 10, and patterning the seed metal layer 20a thus to form an interconnect 20 after removing the supporting substrate.
摘要翻译：根据本发明的实施例的制造方法包括在支撑衬底70上形成种子金属层20a，在种子金属层20a上形成包括互连18的互连层10，在形成互连之后移除支撑衬底70 层10，并且图案化种子金属层20a，从而在去除支撑衬底之后形成互连20。

10. 发明申请

US20100258918A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE EMPLOYING THEREOF 有权
标题翻译：半导体器件和半导体器件
公开(公告)号：US20100258918A1
公开(公告)日：2010-10-14
申请号：US12820478
申请日：2010-06-22
申请人： Satoshi Matsui , Masaya Kawano
发明人： Satoshi Matsui , Masaya Kawano
IPC分类号： H01L23/538 , H01L23/48
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/585 , H01L24/05 , H01L2224/0401 , H01L2224/05009 , H01L2224/05551 , H01L2224/05552 , H01L2224/05553 , H01L2224/05555 , H01L2224/13025 , H01L2224/14181 , H01L2224/16 , H01L2224/16146 , H01L2224/16225 , H01L2225/06513
摘要： A semiconductor device is provided with a silicon substrate and a structure filled in a through hole that has a rectangular cross section and extends through the silicon substrate. The structure comprises a pipe-shaped through electrode, stripe-shaped through electrodes, silicons, a first insulating film, a second insulating film and a third insulating film. The pipe-shaped through electrode is utilized as a pipe-shaped electric conductor that extends through the silicon substrate. In addition, the stripe-shaped through electrodes are provided in the interior of the pipe-shaped through electrode so that the stripe-shaped through electrodes extend through the silicon substrate and is spaced away from the pipe-shaped through electrode. A plurality of through electrodes are provided in substantially parallel within the inner region of the pipe-shaped through electrode.
摘要翻译：半导体器件设置有硅衬底和填充有通孔的结构，其具有矩形横截面并延伸穿过硅衬底。该结构包括管状贯通电极，条形穿通电极，硅，第一绝缘膜，第二绝缘膜和第三绝缘膜。管状贯通电极用作延伸穿过硅衬底的管状电导体。此外，条状贯通电极设置在管状贯通电极的内部，使得条状贯通电极延伸穿过硅衬底并与管状通电极间隔开。多个贯通电极大致平行地设置在管状贯通电极的内部区域内。

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