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1. 发明申请

US20100148340A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100148340A1
公开(公告)日：2010-06-17
申请号：US12638358
申请日：2009-12-15
申请人： Akihito TAKANO , Naohiro Mashino
发明人： Akihito TAKANO , Naohiro Mashino
IPC分类号： H01L23/28 , H01L21/98
CPC分类号： H01L21/568 , H01L21/561 , H01L23/3128 , H01L23/3135 , H01L24/91 , H01L25/0657 , H01L25/50 , H01L2224/24145 , H01L2225/06551 , H01L2225/06579 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/30105 , H01L2924/00
摘要： A method of manufacturing a semiconductor device includes: (a) half-dicing a semiconductor wafer including plural semiconductor chips, thereby forming dicing grooves in the semiconductor wafer, wherein each semiconductor chip includes a circuit and pads and wherein the semiconductor wafer includes: a first surface on which the circuit and the pads are formed; and a second surface opposite to the first surface, (b) connecting the pads to each other by conductive connectors; (c) sealing the first surface of the semiconductor wafer, the dicing grooves and the conductive connectors with a resin; (d) grinding the second surface of the semiconductor wafer, thereby forming a group of sealed chips; (e) dividing the group of sealed chips into individual sealed chips; (f) mounting and stacking the individual sealed chips on a wiring substrate having connection terminals thereon; and (g) electrically-connecting the conductive connectors and the connection terminals using a conductive member.
摘要翻译：一种制造半导体器件的方法包括：（a）对包括多个半导体芯片的半导体晶片进行半切割，从而在半导体晶片中形成切割槽，其中每个半导体芯片包括电路和焊盘，并且其中半导体晶片包括：第一形成电路和焊盘的表面; 和与第一表面相对的第二表面，（b）通过导电连接器将焊盘彼此连接; （c）用树脂密封半导体晶片的第一表面，切割槽和导电连接器; （d）研磨半导体晶片的第二表面，从而形成一组密封芯片; （e）将密封芯片组分成单独的密封芯片; （f）将各个密封芯片安装并堆叠在其上具有连接端子的布线基板上; 和（g）使用导电构件电连接导电连接器和连接端子。

2. 发明申请

US20090243035A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME AND SEMICONDUCTOR DEVICE MOUNTING STRUCTURE 审中-公开
标题翻译：半导体器件及其制造方法和半导体器件安装结构
公开(公告)号：US20090243035A1
公开(公告)日：2009-10-01
申请号：US12408927
申请日：2009-03-23
申请人： Naohiro MASHINO
发明人： Naohiro MASHINO
IPC分类号： H01L23/488 , H01L21/98
CPC分类号： H01L23/645 , H01L23/48 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L25/105 , H01L2224/05568 , H01L2224/05573 , H01L2224/13144 , H01L2224/8121 , H01L2224/81815 , H01L2224/83101 , H01L2224/838 , H01L2224/94 , H01L2225/06513 , H01L2225/06531 , H01L2225/06541 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0781 , H01L2924/19042 , H01L2924/30107 , H01L2224/81 , H01L2224/83 , H01L2224/05599
摘要： In a semiconductor device that is formed by joining two semiconductor elements together to oppose device layers to each other, inductor patterns for transmitting and receiving a signal and feeding a power and bumps for connecting electrically the semiconductor elements and for supporting the inductor patterns and the semiconductor elements being arranged opposedly in an electrically isolated state are provided on a surface of the device layer of at least one of semiconductor elements and an electrically insulating material is filled in a space between opposing surfaces of the semiconductor elements.
摘要翻译：在通过将两个半导体元件结合在一起以将器件层彼此相对而形成的半导体器件中，用于发送和接收信号并馈送功率的电感器图案和用于将半导体元件电连接并用于支撑电感器图案和半导体在半导体元件中的至少一个的器件层的表面上设置以电绝缘状态相反排列的元件，并且电绝缘材料填充在半导体元件的相对表面之间的空间中。

3. 发明申请

US20070170065A1 Method for filling through hole 有权
标题翻译：填充通孔的方法
公开(公告)号：US20070170065A1
公开(公告)日：2007-07-26
申请号：US11645580
申请日：2006-12-27
申请人： Naohiro Mashino
发明人： Naohiro Mashino
IPC分类号： C25D5/02
CPC分类号： C25D5/18 , C25D5/026 , C25D17/02 , H05K3/423 , H05K3/426 , H05K2201/09563 , H05K2203/1476
摘要： It is characterized in that in the case of filling a through hole formed in a substrate with a plated metal by electrolytic plating, the electrolytic plating is started by a high current density higher than Constant Current Density capable of fully filling the through hole when the electrolytic plating is performed with a current density held constant as a current density of the electrolytic plating, and the electrolytic plating is continued by being changed to a current density lower than the high current density by the time of reaching formation of a seam diameter in which an inside diameter does not decrease even when the electrolytic plating is continued after the electrolytic plating at the high current density is started.
摘要翻译：其特征在于，在通过电解电镀填充形成在基板上的电镀金属的通孔的情况下，电解电镀开始于高电流密度的高电流密度下，当电解质以电流密度保持恒定的方式进行电镀，作为电解电镀的电流密度，并且通过在形成接缝直径的时刻通过改变为低于高电流密度的电流密度来继续进行电解电镀，其中即使开始在高电流密度下的电解电镀之后继续进行电解电镀，内径也不降低。

4. 发明授权

US06545353B2 Multilayer wiring board and semiconductor device 失效
标题翻译：多层布线板和半导体器件
公开(公告)号：US06545353B2
公开(公告)日：2003-04-08
申请号：US09848799
申请日：2001-05-04
申请人： Naohiro Mashino
发明人： Naohiro Mashino
IPC分类号： H01L2334
CPC分类号： H01L23/49822 , H01L23/642 , H01L2224/16 , H01L2924/01019 , H01L2924/01078 , H01L2924/09701 , H01L2924/15311 , H01L2924/3011 , H05K1/053 , H05K1/056 , H05K1/141 , H05K1/162 , H05K3/445 , H05K3/4608 , H05K2201/0175 , H05K2201/0179 , H05K2201/09509 , H05K2201/09554 , H05K2201/09809 , H05K2203/0315
摘要： A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser dielectric layer and the condenser electrode metal layer. Integral with the structure of the wiring board is a discrete capacitor component with the metal substrate and the condenser electrode forming the two plates thereof with the dielectric layer there between. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole. An insulating layer is formed on the condenser electrode metal layer and is provided with a via hole to communicate with the metal substrate through the second and first contact holes. A metal substrate contact metal layer formed on an inner wall of the via hole, so that the metal substrate contact metal layer comes into electrical contact with the metal substrate.
摘要翻译：多层布线板包括：作为芯的金属基板，形成为覆盖金属层的电容器电介质层和形成为覆盖电容器电介质层的电容器电极金属层，从而由金属基板限定冷凝器，电容电介质层和电容器电极金属层。与布线板的结构一体是具有分离的电容器部件，其中金属基板和电容器电极形成其两个板之间的介电层。电容电介质层设置有与金属基板连通的第一接触孔，并且电容器电极金属层设置有与第一接触孔连通的第二接触孔，第二接触孔的直径大于第一接触孔。绝缘层形成在电容器电极金属层上，并且设置有通孔，以通过第二和第一接触孔与金属基板连通。金属基板接触金属层形成在通孔的内壁上，金属基板接触金属层与金属基板电接触。

5. 发明授权

US5886759A Liquid crystal display device having a side edge type back light system with a hue layer in the vicinity of the light source 失效
标题翻译：具有在光源附近具有色调层的侧边缘型背光系统的液晶显示装置
公开(公告)号：US5886759A
公开(公告)日：1999-03-23
申请号：US611635
申请日：1996-03-06
申请人： Naohiro Mashino , Hisao Hirayama
发明人： Naohiro Mashino , Hisao Hirayama
IPC分类号： G02B6/00 , F21V8/00 , G01D11/28 , G02F1/1335 , G02F1/13357 , F21V7/04
CPC分类号： G02B6/0043 , G01D11/28 , G02B6/0061 , G02B6/0051 , G02B6/0055 , G02B6/0056
摘要： In order to provide a liquid crystal display (LCD) device capable of improving the display quality by preventing light leakage in the end portion of a display window on the side adjacent a fluorescent tube, a liquid crystal display device has a LCD panel, a light guide placed under the LCD panel, a fluorescent tube placed close to and along at least one side of the light guide, a lamp reflector sheet for covering substantially the whole length of the fluorescent tube, a diffusion sheet placed on the light guide under the LCD panel, and a reflective sheet placed under the light guide, wherein the surface of the lamp reflector sheet, reflective sheet or the diffusion sheet on the one side of the light guide is printed in color.
摘要翻译：为了提供能够通过防止荧光管旁边的显示窗的端部的漏光而提高显示质量的液晶显示（LCD）装置，液晶显示装置具有LCD面板，光放置在LCD面板下面的引导件，靠近并沿着导光体的至少一侧放置的荧光灯，用于覆盖荧光管的整个长度的灯反射器片，放置在LCD下方的导光体上的漫射片面板和布置在光导下的反射片，其中灯反射片的表面，反射片或在光导的一侧上的漫射片的颜色被印刷。

6. 发明授权

US08004382B2 Inductor device, and method of manufacturing the same 有权
标题翻译：电感器件及其制造方法
公开(公告)号：US08004382B2
公开(公告)日：2011-08-23
申请号：US12708829
申请日：2010-02-19
申请人： Naohiro Mashino
发明人： Naohiro Mashino
IPC分类号： H01F5/00
CPC分类号： H01F17/0013 , H01F41/046 , H01F2017/008 , Y10T29/4902 , Y10T29/49073
摘要： An inductor device includes a first magnetic body pattern layer in which slits are provided and which is made to a pattern, a lower insulating layer formed on the first magnetic body pattern layer, a planar coil layer formed on the lower insulating layer, an upper insulating layer formed on the planar coil layer, and a second magnetic body pattern layer formed on the upper insulating layer and in which slits are provided and which is made to a pattern, wherein the first magnetic body pattern layer and the second magnetic body pattern layer are arranged to intersect orthogonally with the planar coil layer.
摘要翻译：一种电感器件，包括：第一磁性体图形层，其中设置狭缝并形成图案，形成在第一磁性体图案层上的下部绝缘层，形成在下部绝缘层上的平面线圈层，上部绝缘层形成在平面线圈层上的第一磁性体图形层和形成在上部绝缘层上并且设置狭缝的第二磁性体图案层，并且被制成图案，其中第一磁性体图案层和第二磁性体图案层为布置成与平面线圈层正交地相交。

7. 发明授权

US07929320B2 Inductor built-in wiring board having shield function 有权
标题翻译：电感内置线路板具有屏蔽功能
公开(公告)号：US07929320B2
公开(公告)日：2011-04-19
申请号：US12165885
申请日：2008-07-01
申请人： Naohiro Mashino
发明人： Naohiro Mashino
IPC分类号： H05K9/00
CPC分类号： H05K1/0219 , H01F2017/008 , H05K1/0218 , H05K1/165 , H05K2201/09236 , H05K2201/09972 , H05K2201/10371
摘要： There is provided a wiring board having a shield function. The wiring board includes: a plurality of conductive shield patterns adapted to surround a circumference of at least one electronic component mounting area on the wiring board, the plurality of conductive shield patterns being adjacent to each other; and at least one inductor formed of a conductive pattern and provided between the conductive shield patterns.
摘要翻译：提供了具有屏蔽功能的布线板。所述布线板包括：多个导电屏蔽图形，其适于围绕所述布线板上的至少一个电子部件安装区域的圆周，所述多个导电屏蔽图案彼此相邻; 以及由导电图案形成的至少一个电感器，并设置在导电屏蔽图案之间。

8. 发明授权

US07655504B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07655504B2
公开(公告)日：2010-02-02
申请号：US12153313
申请日：2008-05-16
申请人： Naohiro Mashino
发明人： Naohiro Mashino
IPC分类号： H01L21/00
CPC分类号： H01L25/50 , H01L23/481 , H01L25/0657 , H01L2224/05568 , H01L2224/05573 , H01L2224/16145 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2924/01322
摘要： Two semiconductor substrates are first bonded together by means of a metal bump, while respective one-side surfaces on which device patterns are formed are faced each other, and a resin is then filled into a gap between the respective one-side surfaces and thereafter each of the semiconductor substrates is polished and thinned to a prescribed thickness. Furthermore, a via hole and an insulating film are formed; part of a portion in contact with the metal bump, of the insulating film, is opened; the inside of the via hole is filled with a conductor; and an electrode pad is formed on the conductor, to thereby form structures. Finally, a required number of structures are electrically connected with each other through the electrode pad and stacked to thereby obtain a semiconductor device.
摘要翻译：首先通过金属凸块将两个半导体基板接合在一起，同时形成有器件图案的各个单面相对，然后将树脂填充到各个单面表面之间的间隙中，然后每个的半导体衬底被抛光并变薄到规定的厚度。此外，形成通孔和绝缘膜; 绝缘膜的与金属凸块接触的部分的一部分被打开; 通孔的内部填充有导体; 并且在导体上形成电极焊盘，从而形成结构。最后，所需数量的结构通过电极焊盘彼此电连接并堆叠，从而获得半导体器件。

9. 发明申请

US20080233677A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20080233677A1
公开(公告)日：2008-09-25
申请号：US12153313
申请日：2008-05-16
申请人： Naohiro Mashino
发明人： Naohiro Mashino
IPC分类号： H01L21/58
CPC分类号： H01L25/50 , H01L23/481 , H01L25/0657 , H01L2224/05568 , H01L2224/05573 , H01L2224/16145 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2924/01322
摘要： Two semiconductor substrates are first bonded together by means of a metal bump, while respective one-side surfaces on which device patterns are formed are faced each other, and a resin is then filled into a gap between the respective one-side surfaces and thereafter each of the semiconductor substrates is polished and thinned to a prescribed thickness. Furthermore, a via hole and an insulating film are formed; part of a portion in contact with the metal bump, of the insulating film, is opened; the inside of the via hole is filled with a conductor; and an electrode pad is formed on the conductor, to thereby form structures. Finally, a required number of structures are electrically connected with each other through the electrode pad and stacked to thereby obtain a semiconductor device.
摘要翻译：首先通过金属凸块将两个半导体基板接合在一起，同时形成有器件图案的各个单面相对，然后将树脂填充到各个单面表面之间的间隙中，其后每个的半导体衬底被抛光并变薄到规定的厚度。此外，形成通孔和绝缘膜; 绝缘膜的与金属凸块接触的部分的一部分被打开; 通孔的内部填充有导体; 并且在导体上形成电极焊盘，从而形成结构。最后，所需数量的结构通过电极焊盘彼此电连接并堆叠，从而获得半导体器件。

10. 发明授权

US07205230B2 Process for manufacturing a wiring board having a via 失效
标题翻译：具有通路的布线基板的制造方法
公开(公告)号：US07205230B2
公开(公告)日：2007-04-17
申请号：US10914227
申请日：2004-08-10
申请人： Naohiro Mashino
发明人： Naohiro Mashino
IPC分类号： H01L21/44
CPC分类号： H05K3/22 , H01L2924/0002 , H05K3/102 , H05K3/423 , H05K3/4602 , H05K2201/09536 , H05K2201/09563 , H05K2201/096 , H05K2201/09745 , H05K2201/1025 , H05K2203/107 , H05K2203/128 , H01L2924/00
摘要： A process for manufacturing a wiring board comprising a substrate made of an insulation material and having first and second surfaces, first and second conductor patterns formed on the first and second surfaces, respectively, and a via conductor penetrating the substrate to electrically connect the first conductor pattern with the second conductor pattern; the process comprising the following steps of: forming the substrate with a through-hole penetrating thereto and defining openings at the first and second surfaces, respectively; plating the substrate with a metal so that a metal layer having a predetermined thickness is formed on the respective first and second surfaces of the substrate and the through-hole is substantially filled with the metal to be the via conductor; irradiating a laser beam, as a plurality of spots, around a metal-less portion of the plated metal, such as a dimple or seam, at positions corresponding to the openings of the through-hole, so that the a part of the plated metal melts to fill the metal-less portion with the molten metal.
摘要翻译：一种制造布线板的方法，包括由绝缘材料制成并具有第一和第二表面的基底，分别形成在第一和第二表面上的第一和第二导体图案，以及穿过基板的通孔导体，以将第一导体图案与第二导体图案; 该方法包括以下步骤：用穿透其的通孔形成基底并分别在第一和第二表面处限定开口; 用金属电镀基板，使得在基板的相应的第一和第二表面上形成具有预定厚度的金属层，并且通孔基本上填充有作为通孔导体的金属; 在对应于通孔的开口的位置处，将激光束作为多个点照射在电镀金属的无金属部分（例如凹坑或接缝）周围，使得电镀金属的一部分熔化以用熔融金属填充无金属部分。

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