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1. 发明授权

US12052830B2 Method and process for creating high-performance coax sockets 有权
公开(公告)号：US12052830B2
公开(公告)日：2024-07-30
申请号：US17542867
申请日：2021-12-06
申请人： R&D Circuits
发明人： Donald Eric Thompson
IPC分类号： H05K3/42 , C25D3/38 , C25D5/02 , C25D7/00 , H05K1/02 , H05K1/18 , H05K3/00 , H05K3/36
CPC分类号： H05K3/426 , C25D3/38 , C25D5/02 , C25D7/00 , H05K1/0222 , H05K1/182 , H05K3/0047 , H05K3/368 , H05K2201/09072 , H05K2201/09545 , H05K2201/10303 , H05K2201/10325 , H05K2201/10409 , H05K2203/0723
摘要： The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.

2. 发明授权

US11917768B2 Single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor 有权
公开(公告)号：US11917768B2
公开(公告)日：2024-02-27
申请号：US17584003
申请日：2022-01-25
申请人： RICHVIEW ELECTRONICS CO., LTD.
发明人： Siping Bai , Xianglan Wu , Zhijian Wang , Zhigang Yang , Jinqiang Zhang
IPC分类号： H05K3/06 , H05K3/42 , H05K3/10 , C23C14/48 , H05K1/11 , H05K3/04 , H05K3/46
CPC分类号： H05K3/429 , C23C14/48 , H05K1/115 , H05K3/105 , H05K3/42 , H05K3/422 , H05K3/423 , H05K3/427 , H05K3/048 , H05K3/06 , H05K3/108 , H05K3/421 , H05K3/426 , H05K3/4617 , H05K2201/0355 , H05K2201/096 , H05K2203/0565 , H05K2203/0769 , H05K2203/092 , H05K2203/1423
摘要： A multi-layer circuit board, successively constituted by surface sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, surface sticking layer, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial outer surface of said surface sticking layer is formed with a circuit pattern layer of conductive seed layer, wherein said conductive seed layer comprises a ion implantation layer implanting below the hole wall of said hole and below partial outer surface of said surface sticking layer.

3. 发明申请

US20180206346A1 PRINTED CIRCUIT BOARD MANUFACTURING METHOD AND PRINTED CIRCUIT BOARD THEREOF 审中-公开
公开(公告)号：US20180206346A1
公开(公告)日：2018-07-19
申请号：US15786658
申请日：2017-10-18
申请人： Unlimiter MFA Co., Ltd.
发明人： Kuo-Ping YANG , Yi-Yen CHIANG , Neo Bob Chih-Yung YOUNG , Lin-He CHU , Wen-Chiang WU
IPC分类号： H05K3/42 , H05K3/00 , H05K3/12 , H05K3/34 , H05K1/11
CPC分类号： H05K3/426 , H05K1/115 , H05K3/0047 , H05K3/12 , H05K3/1216 , H05K3/3447 , H05K3/3452 , H05K3/3484 , H05K3/3494 , H05K2201/099 , H05K2203/045 , H05K2203/046 , H05K2203/0557 , H05K2203/1344
摘要： A printed circuit board manufacturing method and a printed circuit board thereof are disclosed. The printed circuit board manufacturing method includes the steps of: providing a dielectric; performing a layout process on a surface of the dielectric; drilling the dielectric to form at least one plated through hole, wherein the at least one plated through hole has an annular ring disposed on the surface of the dielectric; and coating a solder resist on the surface of the dielectric to cover at least one part of the annular ring.

4. 发明授权

US09744624B2 Method for manufacturing circuit board 有权
公开(公告)号：US09744624B2
公开(公告)日：2017-08-29
申请号：US14742070
申请日：2015-06-17
申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.
发明人： Jaen-Don Lan , Pin-Chung Lin , Chen-Rui Tseng , Cheng-En Ho , Yu-An Chen
IPC分类号： H05K3/46 , B23K26/402 , H05K3/42 , B23K26/382 , B23K103/00
CPC分类号： B23K26/402 , B23K26/382 , B23K26/389 , B23K2101/40 , B23K2103/172 , B23K2103/30 , B23K2103/42 , B23K2103/50 , H05K3/426 , H05K3/4644 , H05K2201/0341
摘要： Disclosed is a method for manufacturing a circuit board, including preparing a substrate having a resin layer and a stop layer, forming at least one conduction hole penetrating the resin layer and stopping at the stop layer, forming a first metal layer through a sputtering process, forming a second metal layer on the first metal layer through a chemical plating process, forming a third metal layer having a circuit pattern, exposing part of the second metal layer and filling up the conduction hole through an electroplating process, and etching the second metal layer and the first metal layer under the second metal layer to expose the resin layer under the first metal layer. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and stable. The etched circuit pattern has a line width/pitch less than 10 μm for fine line width/pitch.

5. 发明授权

US09674967B2 Via in a printed circuit board 有权
公开(公告)号：US09674967B2
公开(公告)日：2017-06-06
申请号：US15184426
申请日：2016-06-16
申请人： SIERRA CIRCUITS, INC.
发明人： Konstantine Karavakis , Kenneth S. Bahl
IPC分类号： H05K1/11 , H05K3/42 , H05K3/38 , H05K1/09 , H05K3/00
CPC分类号： H05K3/426 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/387 , H05K2201/0221 , H05K2201/0236 , H05K2203/0709 , Y10T29/49167
摘要： A via in a printed circuit board is composed of a patterned metal layer that extends through a hole in dielectric laminate material that has been covered with catalytic adhesive material on both faces of the dielectric laminate material. The layer of catalytic adhesive coats a portion of the dielectric laminate material around the hole. The patterned metal layer is placed over the catalytic adhesive material on both faces of the dielectric laminate material and within the hole.

6. 发明授权

US09629260B2 Printed circuit board and method of manufacturing the same 有权
公开(公告)号：US09629260B2
公开(公告)日：2017-04-18
申请号：US14169097
申请日：2014-01-30
申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人： Seung Wook Park , Young Do Kweon , Jin Gu Kim
IPC分类号： H05K1/11 , H05K3/42 , H05K3/10 , H05K1/03 , H05K3/28
CPC分类号： H05K3/426 , H05K1/036 , H05K3/108 , H05K3/285 , H05K2201/0959 , H05K2203/1476
摘要： Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board according to a preferred embodiment of the present invention includes a base substrate; a through via formed to penetrate through the base substrate; and circuit patterns formed on one side and the other side of the base substrate and formed to be thinner than an inner wall of the through via.

7. 发明授权

US09578747B2 Structure of via hole of electrical circuit board 有权
标题翻译：电路板通孔结构
公开(公告)号：US09578747B2
公开(公告)日：2017-02-21
申请号：US14827668
申请日：2015-08-17
申请人： ADVANCED FLEXIBLE CIRCUITS CO., LTD.
发明人： Kuo-Fu Su , Gwun-Jin Lin
IPC分类号： H05K1/11 , H05K1/00 , H05K1/02 , H05K3/00 , H05K3/42
CPC分类号： H05K1/115 , H05K1/028 , H05K1/0298 , H05K3/002 , H05K3/426 , Y10T29/49165
摘要： A structure of via hole of electrical circuit board includes an adhesive layer and a conductor layer that are formed after wiring is formed on a carrier board. At least one through hole extends in a vertical direction through the carrier board, the wiring, the adhesive layer, and the conductor layer and forms a hole wall surface. The conductor layer shows a height difference with respect to an exposed zone of the circuit trace in the vertical direction. A conductive cover section covers the conductor layer and the hole wall surface of the through hole. The carrier board is a single-sided board, a double-sided board, a multi-layered board, or a combination thereof, and the single-sided board, the double-sided board, and multi-layered board can be flexible boards, rigid boards, or composite boards combining flexible and rigid boards.
摘要翻译：电路板的通孔的结构包括在载体板上形成布线之后形成的粘合剂层和导体层。至少一个通孔在垂直方向上穿过载板，布线，粘合剂层和导体层延伸并形成孔壁表面。导体层相对于垂直方向上的电路迹线的暴露区域显示高度差。导电覆盖部分覆盖导体层和通孔的孔壁表面。载板是单面板，双面板，多层板或其组合，单面板，双面板和多层板可以是柔性板，刚性板，或组合柔性和刚性板的复合板。

8. 发明申请

US20160353584A1 PROCESS FOR PRODUCING A WIRING BOARD 有权
标题翻译：生产接线板的方法
公开(公告)号：US20160353584A1
公开(公告)日：2016-12-01
申请号：US14957861
申请日：2015-12-03
申请人： KIYOKAWA PLATING INDUSTRY CO., LTD.
发明人： Shojiro Honda , Yosuke Haruki , Hajime Kiyokawa
IPC分类号： H05K3/42 , C25D5/48 , C25D3/38 , C25D5/54 , C25D7/12 , C25D5/02
CPC分类号： H05K3/423 , C25D3/38 , C25D5/022 , C25D5/48 , C25D5/54 , C25D7/123 , H05K3/426 , H05K2201/09563 , H05K2203/1383
摘要： A process for efficiently producing a wiring board in which an insulating substrate 1 having a through hole 2 is used, which includes forming a seed layer 3 on one surface of the insulating substrate 1, covering the surface of the insulating substrate 1 on which the seed layer 3 is formed with a masking film 4, arranging the insulating substrate 1 and a positive electrode 5 so that the surface of the insulating substrate 1 opposite to the surface of the insulating substrate 1 on which the seed layer 3 of the insulating substrate 1 is formed is faced to the positive electrode 5, carrying out electroplating to form a metal layer 8 in the through hole 2, and then removing the masking film 4.
摘要翻译：一种用于有效地制造其中使用具有通孔2的绝缘基板1的布线板的方法，其包括在绝缘基板1的一个表面上形成种子层3，覆盖绝缘基板1的表面，其上种子层3形成有掩模膜4，布置绝缘基板1和正极5，使得绝缘基板1的与绝缘基板1的种子层3的绝缘基板1的表面相反的表面是绝缘基板1的表面，形成在正电极5上，进行电镀以在通孔2中形成金属层8，然后除去掩模膜4。

9. 发明申请

US20160353569A1 WIRING SUBSTRATE AND METHOD OF MAKING WIRING SUBSTRATE 有权
标题翻译：接线基板和接线基板的制作方法
公开(公告)号：US20160353569A1
公开(公告)日：2016-12-01
申请号：US15158777
申请日：2016-05-19
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.
发明人： Jun FURUICHI , Noriyoshi SHIMIZU
IPC分类号： H05K1/02 , H05K3/46 , H05K1/11
CPC分类号： H05K1/0298 , H01L21/4857 , H01L23/49822 , H01L23/49827 , H05K1/036 , H05K1/0366 , H05K1/115 , H05K3/0044 , H05K3/108 , H05K3/426 , H05K3/4602 , H05K3/4623 , H05K3/4644 , H05K2201/0183 , H05K2201/0191 , H05K2201/0376 , H05K2201/09536 , H05K2201/09563 , H05K2201/0979 , H05K2203/025
摘要： A wiring substrate includes a core layer having a penetrating hole, a first insulating layer disposed on a first surface of the core layer and having a first opening at a position of the penetrating hole, the first insulating layer containing no filler, a penetrating electrode disposed in the penetrating hole and in the first opening, and a first wiring layer laminated both on the first insulating layer at a first surface thereof facing away from the core layer and on an end face of the penetrating electrode, wherein the first surface of the first insulating layer and the end face of the penetrating electrode are planarized.
摘要翻译：布线基板包括具有穿透孔的芯层，设置在芯层的第一表面上的第一绝缘层，并且在穿透孔的位置处具有第一开口，第一绝缘层不包含填料，设置穿透电极在所述贯通孔和所述第一开口中的第一表面以及在所述第一绝缘层上层叠的第一布线层，所述第一布线层在其背离所述芯层的第一表面和所述穿透电极的端面上，绝缘层和穿透电极的端面被平坦化。

10. 发明授权

US09443788B2 Through-hole electrode substrate 有权
标题翻译：通孔电极基板
公开(公告)号：US09443788B2
公开(公告)日：2016-09-13
申请号：US13966633
申请日：2013-08-14
申请人： Dai Nippon Printing Co., Ltd.
发明人： Takamasa Takano
IPC分类号： H05K1/11 , H01L23/48 , H01L21/48 , H01L21/768 , H01L23/14 , H01L23/498 , H05K3/42 , H05K3/44
CPC分类号： H01L23/49827 , H01L21/486 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49833 , H01L23/49838 , H01L23/49866 , H01L23/49894 , H01L24/17 , H01L2224/16225 , H01L2224/16235 , H01L2924/014 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/15747 , H01L2924/15786 , H01L2924/1579 , H05K1/113 , H05K3/426 , H05K3/445 , H05K2201/09436 , H05K2201/09581 , H05K2201/09609 , H05K2201/09836 , H05K2201/09854 , H05K2201/10378 , H05K2203/0733 , H05K2203/1178 , Y10T29/49117 , Y10T29/49124 , Y10T29/49165 , H01L2224/05647 , H01L2924/01024 , H01L2924/01079
摘要： A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.
摘要翻译：一种制造通孔电极基板的方法包括在基板上形成多个通孔，通过在多个通孔中填充导电材料形成多个通孔电极，在一个通孔上形成第一绝缘层在所述第一绝缘层上形成多个第一开口，所述多个第一开口将与所述多个通孔电极中的每一个相对应的多个通孔电极暴露在所述第一绝缘层上，并且使用所述关系来校正所述多个第一开口的位置在多个通孔中的倾斜通孔的打开位置的测量距离值的偏移量与多个通孔中的倾斜通孔的打开位置的设计距离值之间，相对于基板的中心位置。

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