专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07407877B2 Self-coplanarity bumping shape for flip-chip 有权
标题翻译：倒装芯片的自共形凸起形状
公开(公告)号：US07407877B2
公开(公告)日：2008-08-05
申请号：US11145247
申请日：2005-06-03
申请人： Young-Do Kweon , Rajendra D. Pendse , Nazir Ahmad , Kyung-Moon Kim
发明人： Young-Do Kweon , Rajendra D. Pendse , Nazir Ahmad , Kyung-Moon Kim
IPC分类号： H01L21/44 , H01L21/50 , H01L21/48 , H01L23/52 , H01L23/48 , H01L23/485 , H01L23/498
CPC分类号： H01L24/12 , H01L23/49816 , H01L24/11 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/05624 , H01L2224/0603 , H01L2224/1134 , H01L2224/11831 , H01L2224/1184 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/14 , H01L2224/1403 , H01L2224/81801 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/351 , H01L2924/00014 , H01L2224/13099 , H01L2224/05552 , H01L2924/00
摘要： A stud bump structure for electrical interconnection between a pair of members includes a base portion, and a stem portion. The base portion is affixed to a pad or trace in one of the pair of members to be interconnected (such as an integrated circuit chip), and the stem end is configured to contact a metal pad on the other member (such as a printed circuit board) to complete the interconnect. According to the invention, the stem end is truncated to form a transverse plane, and the stem is more compliant than the base. Also, a method for forming a stud bump on a contact surface, includes forming a bump base portion on the surface, drawing out a generally conical tail from a top of the base, and truncating the tail to form a stem portion having a planar transverse top surface and having a length from the top of the base portion to the top surface. In some embodiments the tail portion, at least, of the stud bump is formed using a wire bonding tool. Also, a method for forming an interconnect between a first member and a second member of an electronic package includes providing one of the members with the stud bumps of the invention and then bringing the corresponding bumps and pads together in a bonding process, the compliance of the stems portions of the bumps accommodating the variance from coplanarity of the pad surfaces.
摘要翻译：用于一对构件之间的电互连的柱形凸块结构包括基部和杆部。基座部分固定在要互连的一对构件之一（例如集成电路芯片）中的垫或轨迹中，并且杆端构造成接触另一构件上的金属垫（例如印刷电路板）完成互连。根据本发明，杆端被截断以形成横向平面，并且杆比基座更顺从。此外，在接触表面上形成柱形凸块的方法包括在表面上形成凸起基部，从基部的顶部抽出大致圆锥形的尾部，并且使尾部截断以形成具有平面横向并且具有从基部的顶部到顶表面的长度。在一些实施例中，至少螺柱凸块的尾部部分使用引线接合工具形成。此外，用于在电子封装的第一部件和第二部件之间形成互连的方法包括：使部件中的一个部件具有本发明的螺柱凸块，然后在相互粘接过程中将相应的凸块和焊盘接合在一起，凸块的杆部分容纳与焊盘表面的共面性的差异。

2. 发明授权

US07211901B2 Self-coplanarity bumping shape for flip chip 有权
标题翻译：倒装芯片的自共形凸起形状
公开(公告)号：US07211901B2
公开(公告)日：2007-05-01
申请号：US11145246
申请日：2005-06-03
申请人： Young-Do Kweon , Rajendra D. Pendse , Nazir Ahmad , Kyung-Moon Kim
发明人： Young-Do Kweon , Rajendra D. Pendse , Nazir Ahmad , Kyung-Moon Kim
IPC分类号： H01L23/52 , H01L23/48 , H01L23/40 , H01L23/485 , H01L23/498
CPC分类号： H01L24/12 , H01L23/49816 , H01L24/11 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/05624 , H01L2224/0603 , H01L2224/1134 , H01L2224/11831 , H01L2224/1184 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/14 , H01L2224/1403 , H01L2224/81801 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/351 , H01L2924/00014 , H01L2224/13099 , H01L2224/05552 , H01L2924/00
摘要： A stud bump structure for electrical interconnection between a pair of members includes a base portion, and a stem portion. The base portion is affixed to a pad or trace in one of the pair of members to be interconnected (such as an integrated circuit chip), and the stem end is configured to contact a metal pad on the other member (such as a printed circuit board) to complete the interconnect. According to the invention, the stem end is truncated to form a transverse plane, and the stem is more compliant than the base. Also, a method for forming a stud bump on a contact surface, includes forming a bump base portion on the surface, drawing out a generally conical tail from a top of the base, and truncating the tail to form a stem portion having a planar transverse top surface and having a length from the top of the base portion to the top surface. In some embodiments the tail portion, at least, of the stud bump is formed using a wire bonding tool. Also, a method for forming an interconnect between a first member and a second member of an electronic package includes providing one of the members with the stud bumps of the invention and then bringing the corresponding bumps and pads together in a bonding process, the compliance of the stems portions of the bumps accommodating the variance from coplanarity of the pad surfaces.
摘要翻译：用于一对构件之间的电互连的柱形凸块结构包括基部和杆部。基座部分固定在要互连的一对构件之一（例如集成电路芯片）中的垫或轨迹中，并且杆端构造成接触另一构件上的金属垫（例如印刷电路板）完成互连。根据本发明，杆端被截断以形成横向平面，并且杆比基座更顺从。此外，在接触表面上形成柱形凸块的方法包括在表面上形成凸起基部，从基部的顶部抽出大致圆锥形的尾部，并且使尾部截断以形成具有平面横向并且具有从基部的顶部到顶表面的长度。在一些实施例中，至少螺柱凸块的尾部部分使用引线接合工具形成。此外，用于在电子封装的第一部件和第二部件之间形成互连的方法包括：使部件中的一个部件具有本发明的螺柱凸块，然后在相互粘接过程中将相应的凸块和焊盘接合在一起，凸块的杆部分容纳与焊盘表面的共面性的差异。

3. 发明授权

US06514296B1 Method of making energy storage device having electrodes coated with insulating microprotrusions 失效
标题翻译：制造具有涂覆有绝缘微突起的电极的储能装置的方法
公开(公告)号：US06514296B1
公开(公告)日：2003-02-04
申请号：US09174764
申请日：1998-10-19
申请人： K. C. Tsai , Gary E. Mason , Mark L. Goodwin , Nazir Ahmad , Davy Wu , Douglas Cromack , Robert R. Tong , James M. Poplett , Ronald L. Anderson , James P. Nelson , Alan B. McEwen
发明人： K. C. Tsai , Gary E. Mason , Mark L. Goodwin , Nazir Ahmad , Davy Wu , Douglas Cromack , Robert R. Tong , James M. Poplett , Ronald L. Anderson , James P. Nelson , Alan B. McEwen
IPC分类号： H01G900
CPC分类号： H01G9/155 , H01G11/56 , H01M2/0212 , H01M2/08 , H01M2/1673 , H01M2/36 , H01M4/00 , H01M4/04 , H01M4/0404 , H01M4/0409 , H01M4/0416 , H01M4/0419 , H01M4/0428 , H01M4/0438 , H01M4/045 , H01M4/0471 , H01M4/58 , H01M6/48 , H01M10/0418 , Y02E60/13 , Y10T29/417
摘要： A dry preunit (10), includes a plurality of cells (110, 112, 114) in a true bipolar configuration, which are stacked and bonded together, to impart to the device an integral and unitary construction. Each cell (114) includes two electrically conductive electrodes (111A, 111B) that are spaced apart by a predetermined distance. The cell (114) also includes two identical dielectric gaskets (121, 123) that are interposed, in registration with each other, between the electrodes (111A, 11B), for separating and electrically insulating these electrodes. When the electrodes (111A, 111B), and the gaskets (121, 123) are bonded together, at least one fill gap (130) is formed for each cell. Each cell (114) also includes a porous and conductive coating layer (119, 120) that is formed on one surface of each electrode. The coating layer (119) includes a set of closely spaced-apart peripheral microprotrusions (125), and a set of distally spaced-apart central microprotrusions (127). These microprotrusions (125, 127) impart structural support to the cells, and provide additional insulation between the electrodes. An energy storage device (10A) such as a capacitor, is created with the addition of an electrolyte to the gap (130) of the dry preunit (10) and subsequent sealing of the fill ports.
摘要翻译：干燥预处理器（10）包括真实双极配置的多个单元（110,112,114），它们堆叠并结合在一起，以赋予器件整体和整体结构。每个单元（114）包括间隔开预定距离的两个导电电极（111A，111B）。电池（114）还包括在电极（111A，11B）之间插入彼此对准的两个相同的电介质垫圈（121,123），用于分离和电绝缘这些电极。当电极（111A，111B）和垫圈（121,123）结合在一起时，为每个电池形成至少一个填充间隙（130）。每个电池（114）还包括形成在每个电极的一个表面上的多孔和导电涂层（119,120）。涂层（119）包括一组紧密间隔开的周边微突起（125）和一组远离间隔开的中心微突起（127）。这些微突起（125,127）赋予细胞结构支撑，并在电极之间提供额外的绝缘。通过向干燥预浸料（10）的间隙（130）添加电解液并随后密封填充口而产生诸如电容器的能量存储装置（10A）。

4. 发明授权

US5800857A Energy storage device and methods of manufacture 失效
标题翻译：储能装置及制造方法
公开(公告)号：US5800857A
公开(公告)日：1998-09-01
申请号：US718569
申请日：1996-09-30
申请人： Nazir Ahmad , Keh-Chi Tsai
发明人： Nazir Ahmad , Keh-Chi Tsai
IPC分类号： H01G9/00 , H01G9/155 , H01M2/02 , H01M2/08 , H01M2/16 , H01M2/36 , H01M4/00 , H01M4/04 , H01M4/58 , H01M6/48 , H01M10/04 , B05D5/12
CPC分类号： H01G9/155 , H01M10/0418 , H01M2/0212 , H01M2/08 , H01M2/1673 , H01M4/00 , H01M4/04 , H01M4/58 , H01M6/48 , H01M2/36 , H01M4/0438 , Y02E60/13 , Y10T29/41 , Y10T29/417
摘要： A dry preunit (10), includes a plurality of cells (110, 112, 114) in a true bipolar configuration, which are stacked and bonded together, to impart to the device an integral and unitary construction. Each cell (114) includes two electrically conductive electrodes (111A, 111B) that are spaced apart by a predetermined distance. The cell (114) also includes two identical dielectric gaskets (121, 123) that are interposed, in registration with each other, between the electrodes (111A, 111B), for separating and electrically insulating these electrodes. When the electrodes (111A, 111B), and the gaskets (121, 123) are bonded together, at least one fill gap (130) is formed for each cell. Each cell (114) also includes a porous and conductive coating layer (119, 120) that is formed on one surface of each electrode. The coating layer (119) includes a set of closely spaced-apart peripheral microprotrusions (125), and a set of distally spaced-apart central microprotrusions (127). These microprotrusions (125, 127) impart structural support to the cells, and provide additional insulation between the electrodes. An energy storage device (10A) such as a capacitor, is created with the addition of an electrolyte to the gap (130) of the dry preunit (10) and subsequent sealing of the fill ports. Organic polymers in organic solvents are used to seal the edges of electrodes of porous metal oxides, metal nitrides, or metal carbides to reduce or eliminate leakage current. The preparation of metal nitrides and metal carbides are claimed for electrode use.
摘要翻译： PCT No.PCT / US95 / 03985第 371日期1996年9月30日 102（e）1996年9月30日PCT 1995年3月30日PCT PCT。公开号WO95 / 26833 日期1995年10月12日干燥单元（10）包括多个单元（110,112,114），其具有真正的双极结构，它们堆叠并结合在一起，以赋予器件整体和整体结构。每个单元（114）包括间隔开预定距离的两个导电电极（111A，111B）。电池（114）还包括在电极（111A，111B）之间插入彼此对准的两个相同的电介质垫圈（121,123），用于分离和电绝缘这些电极。当电极（111A，111B）和垫圈（121,123）结合在一起时，为每个电池形成至少一个填充间隙（130）。每个电池（114）还包括形成在每个电极的一个表面上的多孔和导电涂层（119,120）。涂层（119）包括一组紧密间隔开的周边微突起（125）和一组远离间隔开的中心微突起（127）。这些微突起（125,127）赋予细胞结构支撑，并在电极之间提供额外的绝缘。通过向干燥预浸料（10）的间隙（130）添加电解液并随后密封填充口而产生诸如电容器的能量存储装置（10A）。有机溶剂中的有机聚合物用于密封多孔金属氧化物，金属氮化物或金属碳化物电极的边缘，以减少或消除漏电流。要求用于电极使用的金属氮化物和金属碳化物的制备。

5. 发明授权

US09112080B1 Electrical connectors of building integrable photovoltaic modules 有权
标题翻译：建筑集成光伏组件的电连接器
公开(公告)号：US09112080B1
公开(公告)日：2015-08-18
申请号：US13046461
申请日：2011-03-11
申请人： Jason S. Corneille , Michael Meyers , Adam C. Sherman , Nazir Ahmad
发明人： Jason S. Corneille , Michael Meyers , Adam C. Sherman , Nazir Ahmad
IPC分类号： H01L31/0465 , H01L31/05
CPC分类号： H01L31/0504 , H01L31/02013 , H01L31/0465 , H01L31/0481 , H01L31/05 , H01L31/052 , H01L31/18 , H01L31/186 , H02S20/23 , H02S20/25 , H02S40/36 , H02S40/42 , Y02B10/12 , Y02E10/50
摘要： Provided are novel building integrable photovoltaic (BIP) modules and methods of fabricating thereof. A module may be fabricated from an insert having one or more photovoltaic cells by electrically interconnecting and mechanically integrating one or more connectors with the insert. Each connector may have one or more conductive elements, such as metal sockets and/or pins. At least two of all conductive elements are electrically connected to the photovoltaic cells using, for example, bus bars. These and other electrical components are electrically insulated using a temperature resistant material having a Relative Temperature Index (RTI) of at least about 115° C. The insulation may be provided before or during module fabrication by, for example, providing a prefabricated insulating housing and/or injection molding the temperature resistant material. The temperature resistant material and/or other materials may be used for mechanical integration of the one or more connectors with the insert.
摘要翻译：提供了新型建筑可积分光伏（BIP）模块及其制造方法。可以通过将一个或多个连接器与插入件电互连并机械地集成，从具有一个或多个光伏电池的插件制造模块。每个连接器可以具有一个或多个导电元件，例如金属插座和/或引脚。使用例如汇流条，所有导电元件中的至少两个电连接到光伏电池。这些和其它电气部件使用具有至少约115℃的相对温度指数（RTI）的耐温材料进行电绝缘。绝缘可以在模块制造之前或期间提供，例如通过提供预制绝缘壳体和 /或注射成型耐温材料。耐温材料和/或其他材料可以用于一个或多个连接器与插入件的机械一体化。

6. 发明申请

US20080277747A1 MEMS device support structure for sensor packaging 审中-公开
标题翻译：用于传感器封装的MEMS器件支撑结构
公开(公告)号：US20080277747A1
公开(公告)日：2008-11-13
申请号：US12151771
申请日：2008-05-08
申请人： Nazir Ahmad
发明人： Nazir Ahmad
IPC分类号： H01L29/84 , H01L21/00
CPC分类号： G01L19/04 , G01C19/5663 , G01K1/12 , G01P1/023
摘要： A sensor device and a method of forming comprises a die pad receives a MEMS device. The MEMS device has a first coefficient of thermal expansion (CTE). The die pad is made of a material having a second CTE compliant with the first CTE. The sensor device includes a support structure with a CTE not compliant with the first and second CTE. The support structure has a cylindrical port that protrudes from a base and is coupled to the die pad. The cylindrical port has a height and wall thickness which minimize forces felt by the die pad and MEMS device when the support structure undergoes thermal expansion or contraction. The base and cylindrical port can have different or similar outer diameters. The die pad has an aperture which communicates with an aperture of the MEMS device, whereby the die pad aperture has a smaller diameter than the MEMS aperture.
摘要翻译：一种传感器装置和一种形成方法包括：芯片接收MEMS器件。 MEMS器件具有第一热膨胀系数（CTE）。芯片焊盘由具有与第一CTE兼容的第二CTE的材料制成。传感器装置包括具有不符合第一和第二CTE的CTE的支撑结构。支撑结构具有从基部突出并连接到管芯焊盘的圆柱形端口。圆柱形端口具有高度和壁厚度，其最小化当支撑结构经受热膨胀或收缩时芯片垫和MEMS装置感觉到的力。基座和圆柱形端口可具有不同或类似的外径。管芯焊盘具有与MEMS器件的孔连通的孔，由此管芯焊盘孔的直径小于MEMS孔径。

7. 发明申请

US20170161890A1 SYSTEM, APPARATUS AND METHOD FOR DISPENSED ADHESIVE MATERIAL INSPECTION 审中-公开
公开(公告)号：US20170161890A1
公开(公告)日：2017-06-08
申请号：US15413087
申请日：2017-01-23
申请人： Quyen Duc Chu , Nazir Ahmad
发明人： Quyen Duc Chu , Nazir Ahmad
IPC分类号： G06T7/00 , G06K9/46 , G06K9/62 , H04N5/225
CPC分类号： G06T7/0008 , G01N21/00 , G01N21/6456 , G01N21/8851 , G01N2021/646 , G06K9/4604 , G06K9/4661 , G06K9/6215 , G06K2009/4666 , G06T7/0006 , G06T2207/10064 , G06T2207/10141 , G06T2207/30108 , H04N5/2256
摘要： Apparatus, system and method for detecting defects in an adhesion area that includes an adhesive mixed with a fluorescent material. One or more illumination devices may illuminate the fluorescent material in the adhesion area with a light of a predetermined wavelength. A camera may be configured to capture an image of the illuminated adhesion area. A processing device, communicatively coupled to the camera, may be configured to process the captured image by applying one or more boundary areas to the captured image and determining an image characteristic within each of the boundary areas, wherein the image characteristic is used by the processing device to determine the presence of a defect in the adhesive, such as an excess of adhesive or an insufficient application of adhesive.

8. 发明授权

US09312150B2 Semiconductor device and method of forming a metallurgical interconnection between a chip and a substrate in a flip chip package 有权
标题翻译：半导体器件和在倒装芯片封装中形成芯片和衬底之间的冶金互连的方法
公开(公告)号：US09312150B2
公开(公告)日：2016-04-12
申请号：US13268048
申请日：2011-10-07
申请人： Nazir Ahmad , Young-Do Kweon , Samuel Tam , Kyung-Moon Kim , Rajendra D. Pendse
发明人： Nazir Ahmad , Young-Do Kweon , Samuel Tam , Kyung-Moon Kim , Rajendra D. Pendse
IPC分类号： H01L21/56 , H01L23/00
CPC分类号： H01L21/563 , H01L24/29 , H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/29111 , H01L2224/29144 , H01L2224/2919 , H01L2224/73203 , H01L2224/81203 , H01L2224/81801 , H01L2224/83102 , H01L2224/83191 , H01L2224/83194 , H01L2224/92125 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01058 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/07802 , H01L2924/181 , H01L2924/01028 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.
摘要翻译：用于形成金属互连和倒装芯片与衬底的聚合物粘附的方法包括提供具有在其凸起侧上形成的一组凸块的芯片和在其上的金属化层上具有一组互连点的衬底，提供测量量在突起侧的芯片的中间区域中的聚合物粘合剂，使芯片与衬底对准，使得该组凸块与该组互连点对准，将芯片和衬底朝向彼此挤压，使得一部分聚合物粘合剂接触基板，并且凸点接触互连点，并且将凸块加热到足够高的温度以在凸块和互连点之间形成冶金连接。

9. 发明申请

US20120217635A9 Packaging Structure and Method 审中-公开
标题翻译：包装结构与方法
公开(公告)号：US20120217635A9
公开(公告)日：2012-08-30
申请号：US13245181
申请日：2011-09-26
申请人： Nazir Ahmad , Young-Do Kwon , Samuel Tam , Kyung-Moon Kim , Rajendra D. Pendse
发明人： Nazir Ahmad , Young-Do Kwon , Samuel Tam , Kyung-Moon Kim , Rajendra D. Pendse
IPC分类号： H01L23/48 , H01L21/60
CPC分类号： H01L21/563 , H01L24/29 , H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/29111 , H01L2224/29144 , H01L2224/2919 , H01L2224/73203 , H01L2224/81203 , H01L2224/81801 , H01L2224/83102 , H01L2224/83191 , H01L2224/83194 , H01L2224/92125 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01058 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/07802 , H01L2924/181 , H01L2924/01028 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A method of making a semiconductor device includes providing a substrate and forming a conductive layer on the substrate. The conductive layer includes a first metal. A semiconductor die is provided. A bump is formed on the semiconductor die. The bump includes a second metal. The semiconductor die is positioned proximate to the substrate to contact the bump to the conductive layer and form a bonding interface. The bump and the conductive layer are metallurgically reacted at a melting point of the first metal to dissolve a portion of the second metal from an end of the bump. The bonding interface is heated to the melting point of the first metal for a time sufficient to melt a portion of the first metal from the conductive layer. A width of the conductive layer is no greater than a width of the bump.
摘要翻译：制造半导体器件的方法包括提供衬底并在衬底上形成导电层。导电层包括第一金属。提供半导体管芯。在半导体管芯上形成凸块。凸块包括第二金属。半导体管芯靠近衬底定位，以将凸点接触到导电层并形成接合界面。凸块和导电层在第一金属的熔点处被冶金反应以从凸块的端部溶解第二金属的一部分。将接合界面加热到第一金属的熔点足以从导电层熔化第一金属的一部分的时间。导电层的宽度不大于凸块的宽度。

10. 发明授权

US08119450B2 Interconnecting a chip and a substrate by bonding pure metal bumps and pure metal spots 有权
标题翻译：通过粘合纯金属凸块和纯金属点来互连芯片和基板
公开(公告)号：US08119450B2
公开(公告)日：2012-02-21
申请号：US12472083
申请日：2009-05-26
申请人： Nazir Ahmad , Young-Do Kweon , Samuel Tam , Kyung-Moon Kim , Rajendra D. Pendse
发明人： Nazir Ahmad , Young-Do Kweon , Samuel Tam , Kyung-Moon Kim , Rajendra D. Pendse
IPC分类号： H01L21/00 , H01L21/44
CPC分类号： H01L21/563 , H01L24/29 , H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/29111 , H01L2224/29144 , H01L2224/2919 , H01L2224/73203 , H01L2224/81203 , H01L2224/81801 , H01L2224/83102 , H01L2224/83191 , H01L2224/83194 , H01L2224/92125 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01058 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/07802 , H01L2924/181 , H01L2924/01028 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points. Also, a flip chip package is made by the method. The metallurgical connection includes an alloy of gold and tin at the interface between the bumps and the interconnect points.
摘要翻译：用于形成金属互连和倒装芯片与衬底的聚合物粘附的方法包括提供具有在其凸起侧上形成的一组凸块的芯片和在其上的金属化层上具有一组互连点的衬底，提供测量量在突起侧的芯片的中间区域中的聚合物粘合剂，使芯片与衬底对准，使得该组凸块与该组互连点对准，将芯片和衬底朝向彼此挤压，使得一部分聚合物粘合剂接触基板，并且凸点接触互连点，并且将凸块加热到足够高的温度以在凸块和互连点之间形成冶金连接。此外，通过该方法制造倒装芯片封装。冶金连接包括在凸块和互连点之间的界面处的金和锡的合金。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式