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    • 1. 发明授权
    • Burst comparison and sequential technique for determining servo control
in a mass storage disk device
    • 用于确定大容量存储盘装置中的伺服控制的突发比较和顺序技术
    • US5576910A
    • 1996-11-19
    • US441676
    • 1995-05-15
    • Paul M. RomanoLarry D. KingMike MachadoPetro EstakhriSon HoPhuc TranMaryam Imam
    • Paul M. RomanoLarry D. KingMike MachadoPetro EstakhriSon HoPhuc TranMaryam Imam
    • G11B5/596
    • G11B5/59655
    • A burst magnitude comparator and an instruction sequencer are employed in a servo system controller to rapidly determine position correction information for moving a transducer head over the center line of a track recorded on a disk in a mass storage disk drive. The burst magnitude comparator selects at least two burst signals derived from bursts recorded at predetermined locations relative to the center line from which to derive a correction control signal, based on a predetermined relationship of the burst signals, and supplies the selected burst signals in a predetermined order to facilitate calculation of the correction signal by a data processor used with the servo system controller. An instruction sequencer controls a sequence of converting the analog burst signals from the head to digital burst signals without intervention or control from the data processor. By ordering the signals with the burst magnitude comparator and by sequencing the conversion of the signals, the calculation is speeded and the processing and code requirements for the data processor are greatly reduced, thereby reducing transport delay and freeing the resources of the processor for use in other, potentially more important tasks associated with the servo controller.
    • 在伺服系统控制器中采用脉冲串幅度比较器和指令定序器来快速地确定位置校正信息,用于将传感器头移动到记录在大容量存储盘驱动器中的盘上的轨道的中心线上。 脉冲串幅度比较器基于脉冲串信号的预定关系,从相对于中心线记录的脉冲串中选出至少两个突发信号,并将其提供给预定的脉冲信号 为了便于利用伺服系统控制器使用的数据处理器来计算校正信号。 指令定序器控制从头到数字突发信号转换模拟脉冲串信号的顺序,而不需要来自数据处理器的干预或控制。 通过用脉冲串幅度比较器排序信号并对信号的转换进行排序,计算速度加快,数据处理器的处理和编码要求大大降低,从而减少了传输延迟并释放了处理器的资源,用于 与伺服控制器相关的其他可能更重要的任务。
    • 2. 发明授权
    • Calibration method for writing to optical media
    • 用于写入光学介质的校准方法
    • US06868050B1
    • 2005-03-15
    • US09639376
    • 2000-08-15
    • Paul Phuc TranWei Qian
    • Paul Phuc TranWei Qian
    • G11B7/007G11B7/125G11B7/00G11B5/09
    • G11B7/1267G11B7/00736
    • The present invention provides a method and system for calibration of writing to an optical medium. The method includes: sampling marks in a calibration area of the optical medium; and converting the sampled marks into a digital format utilizing an ADC, the ADC also utilized by a servo control. The present invention provides a controller with an integrated servo and recording processor which allows a single ADC to be used for converting sample marks used in calibrating the writing to an optical media. No separate subsystem for converting sample marks is thus necessary. Less components are required, reducing the cost of manufacturing the controller. With less components, the risk of component failure is reduced as well.
    • 本发明提供了一种用于校准写入光学介质的方法和系统。 该方法包括:在光学介质的校准区域中采样标记; 并使用ADC将采样标记转换为数字格式,ADC也由伺服控制使用。 本发明提供一种具有集成伺服和记录处理器的控制器,其允许单个ADC用于将用于校准写入的采样标记转换为光学介质。 因此,不需要用于转换样品标记的独立子系统。 需要较少的部件,降低制造控制器的成本。 使用较少的组件,组件故障的风险也会降低。
    • 3. 发明授权
    • Integrated controller to process both optical reads and optical writes of multiple optical media
    • 集成控制器,用于处理多个光学介质的光学读取和光学写入
    • US06691203B1
    • 2004-02-10
    • US09652254
    • 2000-08-30
    • Joseph ChenLi-Chun Robert ChenLam DangPaul Phuc TranTom Vu
    • Joseph ChenLi-Chun Robert ChenLam DangPaul Phuc TranTom Vu
    • G06F1200
    • G06F3/061G06F3/0658G06F3/0677G11B20/18H03M13/29H03M13/2909H03M13/293
    • The present invention provides an integrated controller to process both optical reads and optical writes of multiple optical media. The integrated controller includes a host interface; a buffer manager coupled to the host interface; an embedded memory coupled to the buffer manager; an integrated encoding/decoding engine coupled to the buffer manager; a data channel interface coupled to the integrated encoding/decoding engine; and an integrated servo/recording processor coupled to the integrated encoding/decoding engine and the data channel interface, where the integrated servo/recording processor includes a set of write strategies. The present invention provides a controller which integrates the functionality of the conventional controllers into an integrated processor. With the controller in accordance with the present invention, a single drive may be provided which can read CD-based and DVD-based formats, read and write to Write Once Media, and read and write to Rewritable Media. The architecture of the controller is designed such that its manufacture is cost effective and a performance penalty for the host does not occur. In addition, the controller may also be used with conventional optical drives. Thus, with the present invention, the same controller may be used for all conventional optical drives as well as with an integrated drive.
    • 本发明提供一种用于处理多个光学介质的光学读取和光学写入的集成控制器。 集成控制器包括主机接口; 耦合到主机接口的缓冲器管理器; 耦合到缓冲器管理器的嵌入式存储器; 耦合到缓冲器管理器的集成编码/解码引擎; 耦合到所述集成编码/解码引擎的数据信道接口; 以及耦合到集成编码/解码引擎和数据通道接口的集成伺服/记录处理器,其中集成伺服/记录处理器包括一组写入策略。 本发明提供了一种将常规控制器的功能集成到集成处理器中的控制器。 利用根据本发明的控制器,可以提供单个驱动器,其可以读取基于CD的和基于DVD的格式,读写写入一次媒体,以及读写到可重写媒体。 控制器的架构设计使其制造成本有效,并且不会发生主机的性能损失。 此外,控制器也可以与传统的光驱一起使用。 因此,利用本发明,相同的控制器可以用于所有常规光驱以及集成驱动器。
    • 7. 发明授权
    • Sequence, timing and synchronization technique for servo system
controller of a computer disk mass storage device
    • 计算机磁盘大容量存储设备的伺服系统控制器的顺序,定时和同步技术
    • US5477103A
    • 1995-12-19
    • US72135
    • 1993-06-04
    • Paul M. RomanoLarry D. KingMike MachadoPetro EstakhriSon HoPhuc TranMaryam Imam
    • Paul M. RomanoLarry D. KingMike MachadoPetro EstakhriSon HoPhuc TranMaryam Imam
    • G11B19/12G11B19/28G05B19/29
    • G11B19/28G11B19/12
    • A servo system controller for a disk drive device which includes a rotating mass storage disk incorporates a timing error determining circuit for determining rotational speed variations in the disk from information contained in a servo field recorded in a track. A timing error signal is supplied when the speed variation exceeds a threshold, thus indicating an unacceptable level of speed variation. A digital synchronizer responds to asynchronous servo data signals from the disk to establish a cell clock signal occurring about a normal frequency, a cell during which only one servo data signal will occur, and a cell data signal which occurs during the cell. The cell clock signal clocks logical operations on a synchronous basis, and servo data signals are reliably captured. A concurrence determining circuit determines the degree of concurrence between the predetermined series of cell data signals and an actual pattern of signals derived from the servo field, and recognizes the servo control information from less than complete concurrence of the derived pattern and the actual expected pattern. Normal operation is permitted even through slight inconsistences may be detected, improving data throughput while still achieving an adequate level of error tolerance.
    • 一种包括旋转大容量存储盘的磁盘驱动装置的伺服系统控制器包括一个定时误差确定电路,用于根据记录在磁道中的伺服磁场中包含的信息确定磁盘的转速变化。 当速度变化超过阈值时提供定时误差信号,从而指示不可接受的速度变化水平。 数字同步器响应于来自盘的异步伺服数据信号,以建立围绕正常频率发生的单元时钟信号,即仅将发生一个伺服数据信号的单元以及在单元期间发生的单元数据信号。 单元时钟信号在同步的基础上对逻辑运算进行时钟运算,并可靠地捕获伺服数据信号。 同步确定电路确定预定的一系列单元数据信号与从伺服磁场导出的实际信号模式之间的并发程度,并且从导出图案和实际期望图案的完全同意中识别伺服控制信息。 即使可以检测到轻微的不一致,允许正常操作,提高数据吞吐量,同时仍能达到足够的容错水平。
    • 9. 发明授权
    • CD-ROM subcode R-W channel de-interleaving and de-scrambling method and
apparatus
    • CD-ROM子码R-W信道解交织和去加扰方法和装置
    • US5502696A
    • 1996-03-26
    • US311069
    • 1994-09-23
    • Tony J. YoonMichael J. McGrathPhuc Tran
    • Tony J. YoonMichael J. McGrathPhuc Tran
    • G11B27/10G11B27/30G11B17/22
    • G11B27/3063G11B27/105G11B2220/213G11B2220/2545
    • A subcode R-W channel data de-interleaving and de-scrambling method and apparatus includes the ability to de-interleave and de-scramble the encoded subchannel data without the necessity of storage elements, by dynamically calculating the final location of each byte of data within a packet as it is read from the CD-Rom. A pack counter monitors the pack number of the current byte of data. An index counter monitors the location of the current data within a pack. A subtractor uses the values from the pack counter and the index counter to obtain an input value, a first portion of which is supplied to a first offset generator. A second portion of the subtractor output is used to select a base address. The first offset generator determines the pack number of the current byte of data after the de-interleave process. A second offset generator receives a value from the index counter and generates a corresponding value. The results from the first offset generator and the second offset generator are both input into a first adder. The output of the first adder is added to the selected base address by a second adder in order to calculate the final address. The final address is transmitted with the current byte of data to an external buffer memory, where it is stored in the specified address. Preferably the present invention is included in a dedicated integrated circuit which calculates the final address of each byte of subchannel R-W data as it is read.
    • 子码RW信道数据解交织和去加扰方法和装置包括通过动态地计算数据的每个字节的最终位置,来对编码的子信道数据进行解交织和去加扰,而不需要存储元件 包从CD-ROM读取。 包计数器监视当前数据字节的包数。 索引计数器监视包中当前数据的位置。 减法器使用来自包计数器和索引计数器的值来获得输入值,其输入值的第一部分被提供给第一偏移发生器。 减法器输出的第二部分用于选择基地址。 第一个偏移生成器确定解交织处理后的数据的当前字节的包数。 第二偏移生成器从索引计数器接收值并生成相应的值。 来自第一偏移发生器和第二偏移发生器的结果都被输入到第一加法器。 第一加法器的输出由第二加法器添加到所选择的基地址,以便计算最终地址。 最终地址与当前数据字节一起发送到外部缓冲存储器,存储在指定的地址中。 优选地,本发明被包括在专用集成电路中,该集成电路在读取时计算子信道R-W数据的每个字节的最终地址。